1 /* $NetBSD: pciide_apollo_reg.h,v 1.9 2001/05/04 15:25:06 bouyer Exp $ */ 2 3 /* 4 * Copyright (c) 1998 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by the University of 17 * California, Berkeley and its contributors. 18 * 4. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 25 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * 33 */ 34 35 /* 36 * Registers definitions for VIA technologies's Apollo controllers (VT82V580VO, 37 * VT82C586A and VT82C586B). Available from http://www.via.com.tw/ or 38 * http://www.viatech.com/ 39 */ 40 41 /* misc. configuration registers */ 42 #define APO_IDECONF 0x40 43 #define APO_IDECONF_EN(channel) (0x00000001 << (1 - (channel))) 44 #define APO_IDECONF_SERR_EN 0x00000100 /* 580 only */ 45 #define APO_IDECONF_DS_SOURCE 0x00000200 /* 580 only */ 46 #define APO_IDECONF_ALT_INTR_EN 0x00000400 /* 580 only */ 47 #define APO_IDECONF_PERR_EN 0x00000800 /* 580 only */ 48 #define APO_IDECONF_WR_BUFF_EN(channel) (0x00001000 << ((1 - (channel)) << 1)) 49 #define APO_IDECONF_RD_PREF_EN(channel) (0x00002000 << ((1 - (channel)) << 1)) 50 #define APO_IDECONF_DEVSEL_TME 0x00010000 /* 580 only */ 51 #define APO_IDECONF_MAS_CMD_MON 0x00020000 /* 580 only */ 52 #define APO_IDECONF_IO_NAT(channel) \ 53 (0x00400000 << (1 - (channel))) /* 580 only */ 54 #define APO_IDECONF_FIFO_TRSH(channel, x) \ 55 ((x) & 0x3) << ((1 - (channel)) << 1 + 24) 56 #define APO_IDECONF_FIFO_CONF_MASK 0x60000000 57 58 /* Misc. controls register */ 59 #define APO_CTLMISC 0x44 60 #define APO_CTLMISC_BM_STS_RTY 0x00000008 61 #define APO_CTLMISC_FIFO_HWS 0x00000010 62 #define APO_CTLMISC_WR_IRDY_WS 0x00000020 63 #define APO_CTLMISC_RD_IRDY_WS 0x00000040 64 #define APO_CTLMISC_INTR_SWP 0x00004000 65 #define APO_CTLMISC_DRDY_TIME_MASK 0x00030000 66 #define APO_CTLMISC_FIFO_FLSH_RD(channel) (0x00100000 << (1 - (channel))) 67 #define APO_CTLMISC_FIFO_FLSH_DMA(channel) (0x00400000 << (1 - (channel))) 68 69 /* data port timings controls */ 70 #define APO_DATATIM 0x48 71 #define APO_DATATIM_MASK(channel) (0xffff << ((1 - (channel)) << 4)) 72 #define APO_DATATIM_RECOV(channel, drive, x) (((x) & 0xf) << \ 73 (((1 - (channel)) << 4) + ((1 - (drive)) << 3))) 74 #define APO_DATATIM_PULSE(channel, drive, x) (((x) & 0xf) << \ 75 (((1 - (channel)) << 4) + ((1 - (drive)) << 3) + 4)) 76 77 /* misc timings control */ 78 #define APO_MISCTIM 0x4c 79 80 /* Ultra-DMA/33 control (586A/B only) */ 81 #define APO_UDMA 0x50 82 #define APO_UDMA_MASK(channel) (0xffff << ((1 - (channel)) << 4)) 83 #define APO_UDMA_TIME(channel, drive, x) (((x) & 0xf) << \ 84 (((1 - (channel)) << 4) + ((1 - (drive)) << 3))) 85 #define APO_UDMA_PIO_MODE(channel, drive) (0x20 << \ 86 (((1 - (channel)) << 4) + ((1 - (drive)) << 3))) 87 #define APO_UDMA_EN(channel, drive) (0x40 << \ 88 (((1 - (channel)) << 4) + ((1 - (drive)) << 3))) 89 #define APO_UDMA_EN_MTH(channel, drive) (0x80 << \ 90 (((1 - (channel)) << 4) + ((1 - (drive)) << 3))) 91 #define APO_UDMA_CLK66(channel) (0x08 << ((1 - (channel)) << 4)) 92 93 static int8_t apollo_udma100_tim[] = {0x0f, 0x07, 0x04, 0x02, 0x01, 0x00}; /* XXX check modes others than 2, 4, 5 */ 94 static int8_t apollo_udma66_tim[] = {0x03, 0x03, 0x02, 0x01, 0x00}; 95 static int8_t apollo_udma33_tim[] = {0x03, 0x02, 0x00}; 96 static int8_t apollo_pio_set[] = {0x0a, 0x0a, 0x0a, 0x02, 0x02}; 97 static int8_t apollo_pio_rec[] = {0x08, 0x08, 0x08, 0x02, 0x00}; 98