1 /* $NetBSD: pci_usrreq.c,v 1.22 2009/07/30 04:38:24 macallan Exp $ */ 2 3 /* 4 * Copyright 2001 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 /* 39 * User -> kernel interface for PCI bus access. 40 */ 41 42 #include <sys/cdefs.h> 43 __KERNEL_RCSID(0, "$NetBSD: pci_usrreq.c,v 1.22 2009/07/30 04:38:24 macallan Exp $"); 44 45 #include <sys/param.h> 46 #include <sys/conf.h> 47 #include <sys/device.h> 48 #include <sys/ioctl.h> 49 #include <sys/proc.h> 50 #include <sys/systm.h> 51 #include <sys/errno.h> 52 #include <sys/fcntl.h> 53 #include <sys/kauth.h> 54 55 #include <dev/pci/pcireg.h> 56 #include <dev/pci/pcivar.h> 57 #include <dev/pci/pciio.h> 58 59 #include "opt_pci.h" 60 61 static int 62 pciopen(dev_t dev, int flags, int mode, struct lwp *l) 63 { 64 device_t dv; 65 66 dv = device_lookup(&pci_cd, minor(dev)); 67 if (dv == NULL) 68 return ENXIO; 69 70 return 0; 71 } 72 73 static int 74 pciioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l) 75 { 76 struct pci_softc *sc = device_lookup_private(&pci_cd, minor(dev)); 77 struct pciio_bdf_cfgreg *bdfr; 78 struct pciio_businfo *binfo; 79 pcitag_t tag; 80 81 switch (cmd) { 82 case PCI_IOC_BDF_CFGREAD: 83 case PCI_IOC_BDF_CFGWRITE: 84 bdfr = data; 85 if (bdfr->bus > 255 || bdfr->device >= sc->sc_maxndevs || 86 bdfr->function > 7) 87 return EINVAL; 88 tag = pci_make_tag(sc->sc_pc, bdfr->bus, bdfr->device, 89 bdfr->function); 90 91 if (cmd == PCI_IOC_BDF_CFGREAD) { 92 bdfr->cfgreg.val = pci_conf_read(sc->sc_pc, tag, 93 bdfr->cfgreg.reg); 94 } else { 95 if ((flag & FWRITE) == 0) 96 return EBADF; 97 pci_conf_write(sc->sc_pc, tag, bdfr->cfgreg.reg, 98 bdfr->cfgreg.val); 99 } 100 return 0; 101 102 case PCI_IOC_BUSINFO: 103 binfo = data; 104 binfo->busno = sc->sc_bus; 105 binfo->maxdevs = sc->sc_maxndevs; 106 return 0; 107 108 default: 109 return ENOTTY; 110 } 111 } 112 113 static paddr_t 114 pcimmap(dev_t dev, off_t offset, int prot) 115 { 116 struct pci_softc *sc = device_lookup_private(&pci_cd, minor(dev)); 117 118 if (kauth_authorize_generic(kauth_cred_get(), KAUTH_GENERIC_ISSUSER, 119 NULL) != 0) { 120 return -1; 121 } 122 /* 123 * Since we allow mapping of the entire bus, we 124 * take the offset to be the address on the bus, 125 * and pass 0 as the offset into that range. 126 * 127 * XXX Need a way to deal with linear/prefetchable/etc. 128 * 129 * XXX we rely on MD mmap() methods to enforce limits since these 130 * are hidden in *_tag_t structs if they exist at all 131 */ 132 133 #ifdef PCI_MAGIC_IO_RANGE 134 /* 135 * first, check if someone's trying to map the IO range 136 * XXX this assumes 64kB IO space even though some machines can have 137 * significantly more than that - macppc's bandit host bridge allows 138 * 8MB IO space and sparc64 may have the entire 4GB available. The 139 * firmware on both tries to use the lower 64kB first though and 140 * exausting it is pretty difficult so we should be safe 141 */ 142 if ((offset >= PCI_MAGIC_IO_RANGE) && 143 (offset < (PCI_MAGIC_IO_RANGE + 0x10000))) { 144 return bus_space_mmap(sc->sc_iot, offset - PCI_MAGIC_IO_RANGE, 145 0, prot, 0); 146 } 147 #endif /* PCI_MAGIC_IO_RANGE */ 148 return bus_space_mmap(sc->sc_memt, offset, 0, prot, 0); 149 } 150 151 const struct cdevsw pci_cdevsw = { 152 pciopen, nullclose, noread, nowrite, pciioctl, 153 nostop, notty, nopoll, pcimmap, nokqfilter, D_OTHER, 154 }; 155 156 /* 157 * pci_devioctl: 158 * 159 * PCI ioctls that can be performed on devices directly. 160 */ 161 int 162 pci_devioctl(pci_chipset_tag_t pc, pcitag_t tag, u_long cmd, void *data, 163 int flag, struct lwp *l) 164 { 165 struct pciio_cfgreg *r = (void *) data; 166 167 switch (cmd) { 168 case PCI_IOC_CFGREAD: 169 r->val = pci_conf_read(pc, tag, r->reg); 170 break; 171 172 case PCI_IOC_CFGWRITE: 173 if ((flag & FWRITE) == 0) 174 return EBADF; 175 pci_conf_write(pc, tag, r->reg, r->val); 176 break; 177 178 default: 179 return EPASSTHROUGH; 180 } 181 182 return 0; 183 } 184