1 /* $NetBSD: pci.c,v 1.24 1996/10/21 22:56:55 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1995, 1996 Christopher G. Demetriou. All rights reserved. 5 * Copyright (c) 1994 Charles Hannum. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by Charles Hannum. 18 * 4. The name of the author may not be used to endorse or promote products 19 * derived from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * PCI bus autoconfiguration. 35 */ 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/device.h> 40 41 #include <dev/pci/pcireg.h> 42 #include <dev/pci/pcivar.h> 43 44 int pcimatch __P((struct device *, void *, void *)); 45 void pciattach __P((struct device *, struct device *, void *)); 46 47 struct cfattach pci_ca = { 48 sizeof(struct device), pcimatch, pciattach 49 }; 50 51 struct cfdriver pci_cd = { 52 NULL, "pci", DV_DULL 53 }; 54 55 int pciprint __P((void *, const char *)); 56 int pcisubmatch __P((struct device *, void *, void *)); 57 58 int 59 pcimatch(parent, match, aux) 60 struct device *parent; 61 void *match, *aux; 62 { 63 struct cfdata *cf = match; 64 struct pcibus_attach_args *pba = aux; 65 66 if (strcmp(pba->pba_busname, cf->cf_driver->cd_name)) 67 return (0); 68 69 /* Check the locators */ 70 if (cf->pcibuscf_bus != PCIBUS_UNK_BUS && 71 cf->pcibuscf_bus != pba->pba_bus) 72 return (0); 73 74 /* sanity */ 75 if (pba->pba_bus < 0 || pba->pba_bus > 255) 76 return (0); 77 78 /* 79 * XXX check other (hardware?) indicators 80 */ 81 82 return 1; 83 } 84 85 void 86 pciattach(parent, self, aux) 87 struct device *parent, *self; 88 void *aux; 89 { 90 struct pcibus_attach_args *pba = aux; 91 bus_space_tag_t iot, memt; 92 pci_chipset_tag_t pc; 93 int bus, device, maxndevs, function, nfunctions; 94 95 pci_attach_hook(parent, self, pba); 96 printf("\n"); 97 98 iot = pba->pba_iot; 99 memt = pba->pba_memt; 100 pc = pba->pba_pc; 101 bus = pba->pba_bus; 102 maxndevs = pci_bus_maxdevs(pc, bus); 103 104 for (device = 0; device < maxndevs; device++) { 105 pcitag_t tag; 106 pcireg_t id, class, intr, bhlcr; 107 struct pci_attach_args pa; 108 int pin; 109 110 tag = pci_make_tag(pc, bus, device, 0); 111 id = pci_conf_read(pc, tag, PCI_ID_REG); 112 if (id == 0 || id == 0xffffffff) 113 continue; 114 115 bhlcr = pci_conf_read(pc, tag, PCI_BHLC_REG); 116 nfunctions = PCI_HDRTYPE_MULTIFN(bhlcr) ? 8 : 1; 117 118 for (function = 0; function < nfunctions; function++) { 119 tag = pci_make_tag(pc, bus, device, function); 120 id = pci_conf_read(pc, tag, PCI_ID_REG); 121 if (id == 0 || id == 0xffffffff) 122 continue; 123 class = pci_conf_read(pc, tag, PCI_CLASS_REG); 124 intr = pci_conf_read(pc, tag, PCI_INTERRUPT_REG); 125 126 pa.pa_iot = iot; 127 pa.pa_memt = memt; 128 pa.pa_pc = pc; 129 pa.pa_device = device; 130 pa.pa_function = function; 131 pa.pa_tag = tag; 132 pa.pa_id = id; 133 pa.pa_class = class; 134 135 if (bus == 0) { 136 pa.pa_intrswiz = 0; 137 pa.pa_intrtag = tag; 138 } else { 139 pa.pa_intrswiz = pba->pba_intrswiz + device; 140 pa.pa_intrtag = pba->pba_intrtag; 141 } 142 pin = PCI_INTERRUPT_PIN(intr); 143 if (pin == PCI_INTERRUPT_PIN_NONE) { 144 /* no interrupt */ 145 pa.pa_intrpin = 0; 146 } else { 147 /* 148 * swizzle it based on the number of 149 * busses we're behind and our device 150 * number. 151 */ 152 pa.pa_intrpin = /* XXX */ 153 ((pin + pa.pa_intrswiz - 1) % 4) + 1; 154 } 155 pa.pa_intrline = PCI_INTERRUPT_LINE(intr); 156 157 config_found_sm(self, &pa, pciprint, pcisubmatch); 158 } 159 } 160 } 161 162 int 163 pciprint(aux, pnp) 164 void *aux; 165 const char *pnp; 166 { 167 register struct pci_attach_args *pa = aux; 168 char devinfo[256]; 169 170 if (pnp) { 171 pci_devinfo(pa->pa_id, pa->pa_class, 1, devinfo); 172 printf("%s at %s", devinfo, pnp); 173 } 174 printf(" dev %d function %d", pa->pa_device, pa->pa_function); 175 return (UNCONF); 176 } 177 178 int 179 pcisubmatch(parent, match, aux) 180 struct device *parent; 181 void *match, *aux; 182 { 183 struct cfdata *cf = match; 184 struct pci_attach_args *pa = aux; 185 186 if (cf->pcicf_dev != PCI_UNK_DEV && 187 cf->pcicf_dev != pa->pa_device) 188 return 0; 189 if (cf->pcicf_function != PCI_UNK_FUNCTION && 190 cf->pcicf_function != pa->pa_function) 191 return 0; 192 return ((*cf->cf_attach->ca_match)(parent, match, aux)); 193 } 194 195 int 196 pci_io_find(pc, pcitag, reg, iobasep, iosizep) 197 pci_chipset_tag_t pc; 198 pcitag_t pcitag; 199 int reg; 200 bus_addr_t *iobasep; 201 bus_size_t *iosizep; 202 { 203 pcireg_t addrdata, sizedata; 204 int s; 205 206 if (reg < PCI_MAPREG_START || reg >= PCI_MAPREG_END || (reg & 3)) 207 panic("pci_io_find: bad request"); 208 209 /* XXX? 210 * Section 6.2.5.1, `Address Maps', tells us that: 211 * 212 * 1) The builtin software should have already mapped the device in a 213 * reasonable way. 214 * 215 * 2) A device which wants 2^n bytes of memory will hardwire the bottom 216 * n bits of the address to 0. As recommended, we write all 1s and see 217 * what we get back. 218 */ 219 addrdata = pci_conf_read(pc, pcitag, reg); 220 221 s = splhigh(); 222 pci_conf_write(pc, pcitag, reg, 0xffffffff); 223 sizedata = pci_conf_read(pc, pcitag, reg); 224 pci_conf_write(pc, pcitag, reg, addrdata); 225 splx(s); 226 227 if (PCI_MAPREG_TYPE(addrdata) != PCI_MAPREG_TYPE_IO) 228 panic("pci_io_find: not an I/O region"); 229 230 if (iobasep != NULL) 231 *iobasep = PCI_MAPREG_IO_ADDR(addrdata); 232 if (iosizep != NULL) 233 *iosizep = PCI_MAPREG_IO_SIZE(sizedata); 234 235 return (0); 236 } 237 238 int 239 pci_mem_find(pc, pcitag, reg, membasep, memsizep, cacheablep) 240 pci_chipset_tag_t pc; 241 pcitag_t pcitag; 242 int reg; 243 bus_addr_t *membasep; 244 bus_size_t *memsizep; 245 int *cacheablep; 246 { 247 pcireg_t addrdata, sizedata; 248 int s; 249 250 if (reg < PCI_MAPREG_START || reg >= PCI_MAPREG_END || (reg & 3)) 251 panic("pci_find_mem: bad request"); 252 253 /* 254 * Section 6.2.5.1, `Address Maps', tells us that: 255 * 256 * 1) The builtin software should have already mapped the device in a 257 * reasonable way. 258 * 259 * 2) A device which wants 2^n bytes of memory will hardwire the bottom 260 * n bits of the address to 0. As recommended, we write all 1s and see 261 * what we get back. 262 */ 263 addrdata = pci_conf_read(pc, pcitag, reg); 264 265 s = splhigh(); 266 pci_conf_write(pc, pcitag, reg, 0xffffffff); 267 sizedata = pci_conf_read(pc, pcitag, reg); 268 pci_conf_write(pc, pcitag, reg, addrdata); 269 splx(s); 270 271 if (PCI_MAPREG_TYPE(addrdata) == PCI_MAPREG_TYPE_IO) 272 panic("pci_find_mem: I/O region"); 273 274 switch (PCI_MAPREG_MEM_TYPE(addrdata)) { 275 case PCI_MAPREG_MEM_TYPE_32BIT: 276 case PCI_MAPREG_MEM_TYPE_32BIT_1M: 277 break; 278 case PCI_MAPREG_MEM_TYPE_64BIT: 279 /* XXX */ printf("pci_find_mem: 64-bit region\n"); 280 /* XXX */ return (1); 281 default: 282 printf("pci_find_mem: reserved region type\n"); 283 return (1); 284 } 285 286 if (membasep != NULL) 287 *membasep = PCI_MAPREG_MEM_ADDR(addrdata); /* PCI addr */ 288 if (memsizep != NULL) 289 *memsizep = PCI_MAPREG_MEM_SIZE(sizedata); 290 if (cacheablep != NULL) 291 *cacheablep = PCI_MAPREG_MEM_CACHEABLE(addrdata); 292 293 return 0; 294 } 295