1 /* $NetBSD: ohci_pci.c,v 1.51 2014/01/28 17:24:42 skrll Exp $ */ 2 3 /* 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart@augustsson.net) at 9 * Carlstedt Research & Technology. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #include <sys/cdefs.h> 34 __KERNEL_RCSID(0, "$NetBSD: ohci_pci.c,v 1.51 2014/01/28 17:24:42 skrll Exp $"); 35 36 #include "ehci.h" 37 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/kernel.h> 41 #include <sys/device.h> 42 #include <sys/proc.h> 43 #include <sys/queue.h> 44 45 #include <sys/bus.h> 46 47 #include <dev/pci/pcivar.h> 48 #include <dev/pci/pcidevs.h> 49 #include <dev/pci/usb_pci.h> 50 51 #include <dev/usb/usb.h> 52 #include <dev/usb/usbdi.h> 53 #include <dev/usb/usbdivar.h> 54 #include <dev/usb/usb_mem.h> 55 56 #include <dev/usb/ohcireg.h> 57 #include <dev/usb/ohcivar.h> 58 59 struct ohci_pci_softc { 60 ohci_softc_t sc; 61 #if NEHCI > 0 62 struct usb_pci sc_pci; 63 #endif 64 pci_chipset_tag_t sc_pc; 65 pcitag_t sc_tag; 66 void *sc_ih; /* interrupt vectoring */ 67 }; 68 69 static int 70 ohci_pci_match(device_t parent, cfdata_t match, void *aux) 71 { 72 struct pci_attach_args *pa = (struct pci_attach_args *) aux; 73 74 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_SERIALBUS && 75 PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_SERIALBUS_USB && 76 PCI_INTERFACE(pa->pa_class) == PCI_INTERFACE_OHCI) 77 return 1; 78 79 return 0; 80 } 81 82 static void 83 ohci_pci_attach(device_t parent, device_t self, void *aux) 84 { 85 struct ohci_pci_softc *sc = device_private(self); 86 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 87 pci_chipset_tag_t pc = pa->pa_pc; 88 pcitag_t tag = pa->pa_tag; 89 char const *intrstr; 90 pci_intr_handle_t ih; 91 pcireg_t csr; 92 usbd_status r; 93 const char *vendor; 94 95 sc->sc.sc_dev = self; 96 sc->sc.sc_bus.hci_private = sc; 97 98 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_NS && 99 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_NS_USB) { 100 sc->sc.sc_flags = OHCIF_SUPERIO; 101 } 102 103 pci_aprint_devinfo(pa, "USB Controller"); 104 105 /* check if memory space access is enabled */ 106 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 107 #ifdef DEBUG 108 printf("csr: %08x\n", csr); 109 #endif 110 if ((csr & PCI_COMMAND_MEM_ENABLE) == 0) { 111 aprint_error_dev(self, "memory access is disabled\n"); 112 return; 113 } 114 115 /* Map I/O registers */ 116 if (pci_mapreg_map(pa, PCI_CBMEM, PCI_MAPREG_TYPE_MEM, 0, 117 &sc->sc.iot, &sc->sc.ioh, NULL, &sc->sc.sc_size)) { 118 sc->sc.sc_size = 0; 119 aprint_error_dev(self, "can't map mem space\n"); 120 return; 121 } 122 123 /* Disable interrupts, so we don't get any spurious ones. */ 124 bus_space_write_4(sc->sc.iot, sc->sc.ioh, OHCI_INTERRUPT_DISABLE, 125 OHCI_ALL_INTRS); 126 127 sc->sc_pc = pc; 128 sc->sc_tag = tag; 129 sc->sc.sc_bus.dmatag = pa->pa_dmat; 130 131 /* Enable the device. */ 132 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, 133 csr | PCI_COMMAND_MASTER_ENABLE); 134 135 /* Map and establish the interrupt. */ 136 if (pci_intr_map(pa, &ih)) { 137 aprint_error_dev(self, "couldn't map interrupt\n"); 138 goto fail; 139 } 140 141 /* 142 * Allocate IRQ 143 */ 144 intrstr = pci_intr_string(pc, ih); 145 sc->sc_ih = pci_intr_establish(pc, ih, IPL_SCHED, ohci_intr, sc); 146 if (sc->sc_ih == NULL) { 147 aprint_error_dev(self, "couldn't establish interrupt"); 148 if (intrstr != NULL) 149 aprint_error(" at %s", intrstr); 150 aprint_error("\n"); 151 goto fail; 152 } 153 aprint_normal_dev(self, "interrupting at %s\n", intrstr); 154 155 /* Figure out vendor for root hub descriptor. */ 156 vendor = pci_findvendor(pa->pa_id); 157 sc->sc.sc_id_vendor = PCI_VENDOR(pa->pa_id); 158 if (vendor) 159 strlcpy(sc->sc.sc_vendor, vendor, sizeof(sc->sc.sc_vendor)); 160 else 161 snprintf(sc->sc.sc_vendor, sizeof(sc->sc.sc_vendor), 162 "vendor 0x%04x", PCI_VENDOR(pa->pa_id)); 163 164 r = ohci_init(&sc->sc); 165 if (r != USBD_NORMAL_COMPLETION) { 166 aprint_error_dev(self, "init failed, error=%d\n", r); 167 goto fail; 168 } 169 170 #if NEHCI > 0 171 usb_pci_add(&sc->sc_pci, pa, self); 172 #endif 173 174 if (!pmf_device_register1(self, ohci_suspend, ohci_resume, 175 ohci_shutdown)) 176 aprint_error_dev(self, "couldn't establish power handler\n"); 177 178 /* Attach usb device. */ 179 sc->sc.sc_child = config_found(self, &sc->sc.sc_bus, usbctlprint); 180 return; 181 182 fail: 183 if (sc->sc_ih) { 184 pci_intr_disestablish(sc->sc_pc, sc->sc_ih); 185 sc->sc_ih = NULL; 186 } 187 if (sc->sc.sc_size) { 188 bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size); 189 sc->sc.sc_size = 0; 190 } 191 return; 192 } 193 194 static int 195 ohci_pci_detach(device_t self, int flags) 196 { 197 struct ohci_pci_softc *sc = device_private(self); 198 int rv; 199 200 rv = ohci_detach(&sc->sc, flags); 201 if (rv) 202 return rv; 203 204 pmf_device_deregister(self); 205 206 ohci_shutdown(self, flags); 207 208 if (sc->sc.sc_size) { 209 /* Disable interrupts, so we don't get any spurious ones. */ 210 bus_space_write_4(sc->sc.iot, sc->sc.ioh, 211 OHCI_INTERRUPT_DISABLE, OHCI_ALL_INTRS); 212 } 213 214 if (sc->sc_ih != NULL) { 215 pci_intr_disestablish(sc->sc_pc, sc->sc_ih); 216 sc->sc_ih = NULL; 217 } 218 if (sc->sc.sc_size) { 219 bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size); 220 sc->sc.sc_size = 0; 221 } 222 #if NEHCI > 0 223 usb_pci_rem(&sc->sc_pci); 224 #endif 225 return 0; 226 } 227 228 CFATTACH_DECL3_NEW(ohci_pci, sizeof(struct ohci_pci_softc), 229 ohci_pci_match, ohci_pci_attach, ohci_pci_detach, ohci_activate, NULL, 230 ohci_childdet, DVF_DETACH_SHUTDOWN); 231