xref: /netbsd-src/sys/dev/pci/nfsmb.c (revision 267197ec1eebfcb9810ea27a89625b6ddf68e3e7) 
1 /*	$NetBSD: nfsmb.c,v 1.11 2008/01/14 20:30:10 xtraeme Exp $	*/
2 /*
3  * Copyright (c) 2007 KIYOHARA Takashi
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
17  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
18  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
19  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
20  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
21  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
23  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
24  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25  * POSSIBILITY OF SUCH DAMAGE.
26  *
27  */
28 #include <sys/cdefs.h>
29 __KERNEL_RCSID(0, "$NetBSD: nfsmb.c,v 1.11 2008/01/14 20:30:10 xtraeme Exp $");
30 
31 #include <sys/param.h>
32 #include <sys/device.h>
33 #include <sys/errno.h>
34 #include <sys/kernel.h>
35 #include <sys/rwlock.h>
36 #include <sys/proc.h>
37 
38 #include <sys/bus.h>
39 
40 #include <dev/i2c/i2cvar.h>
41 
42 #include <dev/pci/pcivar.h>
43 #include <dev/pci/pcireg.h>
44 #include <dev/pci/pcidevs.h>
45 
46 #include <dev/pci/nfsmbreg.h>
47 
48 
49 struct nfsmbc_attach_args {
50 	int nfsmb_num;
51 	bus_space_tag_t nfsmb_iot;
52 	int nfsmb_addr;
53 };
54 
55 struct nfsmb_softc;
56 struct nfsmbc_softc {
57 	struct device sc_dev;
58 
59 	pci_chipset_tag_t sc_pc;
60 	pcitag_t sc_tag;
61 	struct pci_attach_args *sc_pa;
62 
63 	bus_space_tag_t sc_iot;
64 	struct device *sc_nfsmb[2];
65 };
66 
67 struct nfsmb_softc {
68 	struct device sc_dev;
69 	int sc_num;
70 	struct device *sc_nfsmbc;
71 
72 	bus_space_tag_t sc_iot;
73 	bus_space_handle_t sc_ioh;
74 
75 	struct i2c_controller sc_i2c;	/* i2c controller info */
76 	krwlock_t sc_rwlock;
77 };
78 
79 
80 static int nfsmbc_match(struct device *, struct cfdata *, void *);
81 static void nfsmbc_attach(struct device *, struct device *, void *);
82 static int nfsmbc_print(void *, const char *);
83 
84 static int nfsmb_match(struct device *, struct cfdata *, void *);
85 static void nfsmb_attach(struct device *, struct device *, void *);
86 static int nfsmb_acquire_bus(void *, int);
87 static void nfsmb_release_bus(void *, int);
88 static int nfsmb_exec(
89     void *, i2c_op_t, i2c_addr_t, const void *, size_t, void *, size_t, int);
90 static int nfsmb_check_done(struct nfsmb_softc *);
91 static int
92     nfsmb_send_1(struct nfsmb_softc *, uint8_t, i2c_addr_t, i2c_op_t, int);
93 static int nfsmb_write_1(
94     struct nfsmb_softc *, uint8_t, uint8_t, i2c_addr_t, i2c_op_t, int);
95 static int nfsmb_write_2(
96     struct nfsmb_softc *, uint8_t, uint16_t, i2c_addr_t, i2c_op_t, int);
97 static int nfsmb_receive_1(struct nfsmb_softc *, i2c_addr_t, i2c_op_t, int);
98 static int
99     nfsmb_read_1(struct nfsmb_softc *, uint8_t, i2c_addr_t, i2c_op_t, int);
100 static int
101     nfsmb_read_2(struct nfsmb_softc *, uint8_t, i2c_addr_t, i2c_op_t, int);
102 
103 
104 CFATTACH_DECL(nfsmbc, sizeof(struct nfsmbc_softc),
105     nfsmbc_match, nfsmbc_attach, NULL, NULL);
106 
107 static int
108 nfsmbc_match(struct device *parent, struct cfdata *match, void *aux)
109 {
110 	struct pci_attach_args *pa = aux;
111 
112 	if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_NVIDIA) {
113 		switch (PCI_PRODUCT(pa->pa_id)) {
114 		case PCI_PRODUCT_NVIDIA_NFORCE2_SMBUS:
115 		case PCI_PRODUCT_NVIDIA_NFORCE2_400_SMBUS:
116 		case PCI_PRODUCT_NVIDIA_NFORCE3_SMBUS:
117 		case PCI_PRODUCT_NVIDIA_NFORCE3_250_SMBUS:
118 		case PCI_PRODUCT_NVIDIA_NFORCE4_SMBUS:
119 		case PCI_PRODUCT_NVIDIA_NFORCE430_SMBUS:
120 		case PCI_PRODUCT_NVIDIA_MCP04_SMBUS:
121 		case PCI_PRODUCT_NVIDIA_MCP55_SMB:
122 		case PCI_PRODUCT_NVIDIA_MCP61_SMB:
123 		case PCI_PRODUCT_NVIDIA_MCP65_SMB:
124 		case PCI_PRODUCT_NVIDIA_MCP67_SMB:
125 		case PCI_PRODUCT_NVIDIA_MCP73_SMB:
126 			return 1;
127 		}
128 	}
129 
130 	return 0;
131 }
132 
133 static void
134 nfsmbc_attach(struct device *parent, struct device *self, void *aux)
135 {
136 	struct nfsmbc_softc *sc = (struct nfsmbc_softc *) self;
137 	struct pci_attach_args *pa = aux;
138 	struct nfsmbc_attach_args nfsmbca;
139 	pcireg_t reg;
140 	int baseregs[2];
141 	char devinfo[256];
142 
143 	aprint_naive("\n");
144 	pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo));
145 	aprint_normal(": %s (rev. 0x%02x)\n", devinfo,
146 	    PCI_REVISION(pa->pa_class));
147 
148 	sc->sc_pc = pa->pa_pc;
149 	sc->sc_tag = pa->pa_tag;
150 	sc->sc_pa = pa;
151 	sc->sc_iot = pa->pa_iot;
152 
153 	nfsmbca.nfsmb_iot = sc->sc_iot;
154 
155 	switch (PCI_PRODUCT(pa->pa_id)) {
156 	case PCI_PRODUCT_NVIDIA_NFORCE2_SMBUS:
157 	case PCI_PRODUCT_NVIDIA_NFORCE2_400_SMBUS:
158 	case PCI_PRODUCT_NVIDIA_NFORCE3_SMBUS:
159 	case PCI_PRODUCT_NVIDIA_NFORCE3_250_SMBUS:
160 	case PCI_PRODUCT_NVIDIA_NFORCE4_SMBUS:
161 		baseregs[0] = NFORCE_OLD_SMB1;
162 		baseregs[1] = NFORCE_OLD_SMB2;
163 		break;
164 	default:
165 		baseregs[0] = NFORCE_SMB1;
166 		baseregs[1] = NFORCE_SMB2;
167 		break;
168 	}
169 
170 	reg = pci_conf_read(pa->pa_pc, pa->pa_tag, baseregs[0]);
171 	nfsmbca.nfsmb_num = 1;
172 	nfsmbca.nfsmb_addr = NFORCE_SMBBASE(reg);
173 	sc->sc_nfsmb[0] = config_found(&sc->sc_dev, &nfsmbca, nfsmbc_print);
174 
175 	reg = pci_conf_read(pa->pa_pc, pa->pa_tag, baseregs[1]);
176 	nfsmbca.nfsmb_num = 2;
177 	nfsmbca.nfsmb_addr = NFORCE_SMBBASE(reg);
178 	sc->sc_nfsmb[1] = config_found(&sc->sc_dev, &nfsmbca, nfsmbc_print);
179 }
180 
181 static int
182 nfsmbc_print(void *aux, const char *pnp)
183 {
184 	struct nfsmbc_attach_args *nfsmbcap = aux;
185 
186 	if (pnp)
187 		aprint_normal("nfsmb SMBus %d at %s",
188 		    nfsmbcap->nfsmb_num, pnp);
189 	else
190 		aprint_normal(" SMBus %d", nfsmbcap->nfsmb_num);
191 	return UNCONF;
192 }
193 
194 
195 CFATTACH_DECL(nfsmb, sizeof(struct nfsmb_softc),
196     nfsmb_match, nfsmb_attach, NULL, NULL);
197 
198 static int
199 nfsmb_match(struct device *parent, struct cfdata *match, void *aux)
200 {
201 	struct nfsmbc_attach_args *nfsmbcap = aux;
202 
203 	if (nfsmbcap->nfsmb_num == 1 || nfsmbcap->nfsmb_num == 2)
204 		return 1;
205 	return 0;
206 }
207 
208 static void
209 nfsmb_attach(struct device *parent, struct device *self, void *aux)
210 {
211 	struct nfsmb_softc *sc = (struct nfsmb_softc *) self;
212 	struct nfsmbc_attach_args *nfsmbcap = aux;
213 	struct i2cbus_attach_args iba;
214 
215 	aprint_naive("\n");
216 	aprint_normal("\n");
217 
218 	sc->sc_nfsmbc = parent;
219 	sc->sc_num = nfsmbcap->nfsmb_num;
220 	sc->sc_iot = nfsmbcap->nfsmb_iot;
221 
222 	/* register with iic */
223 	sc->sc_i2c.ic_cookie = sc;
224 	sc->sc_i2c.ic_acquire_bus = nfsmb_acquire_bus;
225 	sc->sc_i2c.ic_release_bus = nfsmb_release_bus;
226 	sc->sc_i2c.ic_send_start = NULL;
227 	sc->sc_i2c.ic_send_stop = NULL;
228 	sc->sc_i2c.ic_initiate_xfer = NULL;
229 	sc->sc_i2c.ic_read_byte = NULL;
230 	sc->sc_i2c.ic_write_byte = NULL;
231 	sc->sc_i2c.ic_exec = nfsmb_exec;
232 
233 	rw_init(&sc->sc_rwlock);
234 
235 	if (bus_space_map(sc->sc_iot, nfsmbcap->nfsmb_addr, NFORCE_SMBSIZE, 0,
236 	    &sc->sc_ioh) != 0) {
237 		aprint_error("%s: failed to map SMBus space\n",
238 		    sc->sc_dev.dv_xname);
239 		return;
240 	}
241 
242 	iba.iba_type = I2C_TYPE_SMBUS;
243 	iba.iba_tag = &sc->sc_i2c;
244 	(void) config_found_ia(&sc->sc_dev, "i2cbus", &iba, iicbus_print);
245 }
246 
247 static int
248 nfsmb_acquire_bus(void *cookie, int flags)
249 {
250 	struct nfsmb_softc *sc = cookie;
251 
252 	rw_enter(&sc->sc_rwlock, RW_WRITER);
253 	return 0;
254 }
255 
256 static void
257 nfsmb_release_bus(void *cookie, int flags)
258 {
259 	struct nfsmb_softc *sc = cookie;
260 
261 	rw_exit(&sc->sc_rwlock);
262 }
263 
264 static int
265 nfsmb_exec(void *cookie, i2c_op_t op, i2c_addr_t addr, const void *cmd,
266 	   size_t cmdlen, void *vbuf, size_t buflen, int flags)
267 {
268 	struct nfsmb_softc *sc  = (struct nfsmb_softc *)cookie;
269 	uint8_t *p = vbuf;
270 	int rv;
271 
272 	if (I2C_OP_READ_P(op) && (cmdlen == 0) && (buflen == 1)) {
273 		rv = nfsmb_receive_1(sc, addr, op, flags);
274 		if (rv == -1)
275 			return -1;
276 		*p = (uint8_t)rv;
277 		return 0;
278 	}
279 
280 	if ((I2C_OP_READ_P(op)) && (cmdlen == 1) && (buflen == 1)) {
281 		rv = nfsmb_read_1(sc, *(const uint8_t*)cmd, addr, op, flags);
282 		if (rv == -1)
283 			return -1;
284 		*p = (uint8_t)rv;
285 		return 0;
286 	}
287 
288 	if ((I2C_OP_READ_P(op)) && (cmdlen == 1) && (buflen == 2)) {
289 		rv = nfsmb_read_2(sc, *(const uint8_t*)cmd, addr, op, flags);
290 		if (rv == -1)
291 			return -1;
292 		*p = (uint8_t)rv;
293 		return 0;
294 	}
295 
296 	if ((I2C_OP_WRITE_P(op)) && (cmdlen == 0) && (buflen == 1))
297 		return nfsmb_send_1(sc, *(uint8_t*)vbuf, addr, op, flags);
298 
299 	if ((I2C_OP_WRITE_P(op)) && (cmdlen == 1) && (buflen == 1))
300 		return nfsmb_write_1(sc, *(const uint8_t*)cmd, *(uint8_t*)vbuf,
301 		    addr, op, flags);
302 
303 	if ((I2C_OP_WRITE_P(op)) && (cmdlen == 1) && (buflen == 2))
304 		return nfsmb_write_2(sc,
305 		    *(const uint8_t*)cmd, *((uint16_t *)vbuf), addr, op, flags);
306 
307 	return -1;
308 }
309 
310 static int
311 nfsmb_check_done(struct nfsmb_softc *sc)
312 {
313 	int us;
314 	uint8_t stat;
315 
316 	us = 10 * 1000;	/* XXXX: wait maximum 10 msec */
317 	do {
318 		delay(10);
319 		us -= 10;
320 		if (us <= 0)
321 			return -1;
322 	} while (bus_space_read_1(sc->sc_iot, sc->sc_ioh,
323 	    NFORCE_SMB_PROTOCOL) != 0);
324 
325 	stat = bus_space_read_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_STATUS);
326 	if ((stat & NFORCE_SMB_STATUS_DONE) &&
327 	    !(stat & NFORCE_SMB_STATUS_STATUS))
328 		return 0;
329 	return -1;
330 }
331 
332 /* ARGSUSED */
333 static int
334 nfsmb_send_1(struct nfsmb_softc *sc, uint8_t val, i2c_addr_t addr, i2c_op_t op,
335 	     int flags)
336 {
337 	uint8_t data;
338 
339 	/* store cmd */
340 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_COMMAND, val);
341 
342 	/* write smbus slave address to register */
343 	data = addr << 1;
344 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_ADDRESS, data);
345 
346 	/* write smbus protocol to register */
347 	data = I2C_OP_READ_P(op) | NFORCE_SMB_PROTOCOL_BYTE;
348 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_PROTOCOL, data);
349 
350 	return nfsmb_check_done(sc);
351 }
352 
353 /* ARGSUSED */
354 static int
355 nfsmb_write_1(struct nfsmb_softc *sc, uint8_t cmd, uint8_t val, i2c_addr_t addr,
356 	      i2c_op_t op, int flags)
357 {
358 	uint8_t data;
359 
360 	/* store cmd */
361 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_COMMAND, cmd);
362 
363 	/* store data */
364 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_DATA, val);
365 
366 	/* write smbus slave address to register */
367 	data = addr << 1;
368 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_ADDRESS, data);
369 
370 	/* write smbus protocol to register */
371 	data = I2C_OP_READ_P(op) | NFORCE_SMB_PROTOCOL_BYTE_DATA;
372 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_PROTOCOL, data);
373 
374 	return nfsmb_check_done(sc);
375 }
376 
377 static int
378 nfsmb_write_2(struct nfsmb_softc *sc, uint8_t cmd, uint16_t val,
379 	      i2c_addr_t addr, i2c_op_t op, int flags)
380 {
381 	uint8_t data, low, high;
382 
383 	/* store cmd */
384 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_COMMAND, cmd);
385 
386 	/* store data */
387 	low = val;
388 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_DATA, low);
389 	high = val >> 8;
390 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_DATA, high);
391 
392 	/* write smbus slave address to register */
393 	data = addr << 1;
394 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_ADDRESS, data);
395 
396 	/* write smbus protocol to register */
397 	data = I2C_OP_READ_P(op) | NFORCE_SMB_PROTOCOL_WORD_DATA;
398 	if (flags & I2C_F_PEC)
399 		data |= NFORCE_SMB_PROTOCOL_PEC;
400 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_PROTOCOL, data);
401 
402 	return nfsmb_check_done(sc);
403 }
404 
405 /* ARGSUSED */
406 static int
407 nfsmb_receive_1(struct nfsmb_softc *sc, i2c_addr_t addr, i2c_op_t op, int flags)
408 {
409 	uint8_t data;
410 
411 	/* write smbus slave address to register */
412 	data = addr << 1;
413 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_ADDRESS, data);
414 
415 	/* write smbus protocol to register */
416 	data = I2C_OP_READ_P(op) | NFORCE_SMB_PROTOCOL_BYTE;
417 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_PROTOCOL, data);
418 
419 	/* check for errors */
420 	if (nfsmb_check_done(sc) < 0)
421 		return -1;
422 
423 	/* read data */
424 	return bus_space_read_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_DATA);
425 }
426 
427 /* ARGSUSED */
428 static int
429 nfsmb_read_1(struct nfsmb_softc *sc, uint8_t cmd, i2c_addr_t addr, i2c_op_t op,
430 	     int flags)
431 {
432 	uint8_t data;
433 
434 	/* store cmd */
435 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_COMMAND, cmd);
436 
437 	/* write smbus slave address to register */
438 	data = addr << 1;
439 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_ADDRESS, data);
440 
441 	/* write smbus protocol to register */
442 	data = I2C_OP_READ_P(op) | NFORCE_SMB_PROTOCOL_BYTE_DATA;
443 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_PROTOCOL, data);
444 
445 	/* check for errors */
446 	if (nfsmb_check_done(sc) < 0)
447 		return -1;
448 
449 	/* read data */
450 	return bus_space_read_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_DATA);
451 }
452 
453 static int
454 nfsmb_read_2(struct nfsmb_softc *sc, uint8_t cmd, i2c_addr_t addr, i2c_op_t op,
455 	     int flags)
456 {
457 	uint8_t data, low, high;
458 
459 	/* store cmd */
460 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_COMMAND, cmd);
461 
462 	/* write smbus slave address to register */
463 	data = addr << 1;
464 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_ADDRESS, data);
465 
466 	/* write smbus protocol to register */
467 	data = I2C_OP_READ_P(op) | NFORCE_SMB_PROTOCOL_BYTE_DATA;
468 	if (flags & I2C_F_PEC)
469 		data |= NFORCE_SMB_PROTOCOL_PEC;
470 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_PROTOCOL, data);
471 
472 	/* check for errors */
473 	if (nfsmb_check_done(sc) < 0)
474 		return -1;
475 
476 	/* read data */
477 	low = bus_space_read_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_DATA);
478 	high = bus_space_read_1(sc->sc_iot, sc->sc_ioh, NFORCE_SMB_DATA);
479 	return low | high << 8;
480 }
481