1 /* $NetBSD: ld_virtio.c,v 1.5 2012/02/02 19:43:06 tls Exp $ */ 2 3 /* 4 * Copyright (c) 2010 Minoura Makoto. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __KERNEL_RCSID(0, "$NetBSD: ld_virtio.c,v 1.5 2012/02/02 19:43:06 tls Exp $"); 30 31 #include <sys/param.h> 32 #include <sys/systm.h> 33 #include <sys/kernel.h> 34 #include <sys/buf.h> 35 #include <sys/bus.h> 36 #include <sys/device.h> 37 #include <sys/disk.h> 38 #include <sys/mutex.h> 39 #include <sys/rnd.h> 40 41 #include <dev/pci/pcidevs.h> 42 #include <dev/pci/pcireg.h> 43 #include <dev/pci/pcivar.h> 44 45 #include <dev/ldvar.h> 46 #include <dev/pci/virtioreg.h> 47 #include <dev/pci/virtiovar.h> 48 49 /* 50 * ld_virtioreg: 51 */ 52 /* Configuration registers */ 53 #define VIRTIO_BLK_CONFIG_CAPACITY 0 /* 64bit */ 54 #define VIRTIO_BLK_CONFIG_SIZE_MAX 8 /* 32bit */ 55 #define VIRTIO_BLK_CONFIG_SEG_MAX 12 /* 32bit */ 56 #define VIRTIO_BLK_CONFIG_GEOMETRY_C 16 /* 16bit */ 57 #define VIRTIO_BLK_CONFIG_GEOMETRY_H 18 /* 8bit */ 58 #define VIRTIO_BLK_CONFIG_GEOMETRY_S 19 /* 8bit */ 59 #define VIRTIO_BLK_CONFIG_BLK_SIZE 20 /* 32bit */ 60 61 /* Feature bits */ 62 #define VIRTIO_BLK_F_BARRIER (1<<0) 63 #define VIRTIO_BLK_F_SIZE_MAX (1<<1) 64 #define VIRTIO_BLK_F_SEG_MAX (1<<2) 65 #define VIRTIO_BLK_F_GEOMETRY (1<<4) 66 #define VIRTIO_BLK_F_RO (1<<5) 67 #define VIRTIO_BLK_F_BLK_SIZE (1<<6) 68 #define VIRTIO_BLK_F_SCSI (1<<7) 69 #define VIRTIO_BLK_F_FLUSH (1<<9) 70 71 /* Command */ 72 #define VIRTIO_BLK_T_IN 0 73 #define VIRTIO_BLK_T_OUT 1 74 #define VIRTIO_BLK_T_BARRIER 0x80000000 75 76 /* Status */ 77 #define VIRTIO_BLK_S_OK 0 78 #define VIRTIO_BLK_S_IOERR 1 79 80 /* Request header structure */ 81 struct virtio_blk_req_hdr { 82 uint32_t type; /* VIRTIO_BLK_T_* */ 83 uint32_t ioprio; 84 uint64_t sector; 85 } __packed; 86 /* 512*virtio_blk_req_hdr.sector byte payload and 1 byte status follows */ 87 88 89 /* 90 * ld_virtiovar: 91 */ 92 struct virtio_blk_req { 93 struct virtio_blk_req_hdr vr_hdr; 94 uint8_t vr_status; 95 struct buf *vr_bp; 96 bus_dmamap_t vr_cmdsts; 97 bus_dmamap_t vr_payload; 98 }; 99 100 struct ld_virtio_softc { 101 struct ld_softc sc_ld; 102 device_t sc_dev; 103 104 struct virtio_softc *sc_virtio; 105 struct virtqueue sc_vq[1]; 106 107 struct virtio_blk_req *sc_reqs; 108 bus_dma_segment_t sc_reqs_segs[1]; 109 110 kmutex_t sc_lock; 111 112 int sc_readonly; 113 }; 114 115 static int ld_virtio_match(device_t, cfdata_t, void *); 116 static void ld_virtio_attach(device_t, device_t, void *); 117 static int ld_virtio_detach(device_t, int); 118 119 CFATTACH_DECL_NEW(ld_virtio, sizeof(struct ld_virtio_softc), 120 ld_virtio_match, ld_virtio_attach, ld_virtio_detach, NULL); 121 122 static int 123 ld_virtio_match(device_t parent, cfdata_t match, void *aux) 124 { 125 struct virtio_softc *va = aux; 126 127 if (va->sc_childdevid == PCI_PRODUCT_VIRTIO_BLOCK) 128 return 1; 129 130 return 0; 131 } 132 133 static int ld_virtio_vq_done(struct virtqueue *); 134 static int ld_virtio_dump(struct ld_softc *, void *, int, int); 135 static int ld_virtio_start(struct ld_softc *, struct buf *); 136 137 static int 138 ld_virtio_alloc_reqs(struct ld_virtio_softc *sc, int qsize) 139 { 140 int allocsize, r, rsegs, i; 141 struct ld_softc *ld = &sc->sc_ld; 142 void *vaddr; 143 144 allocsize = sizeof(struct virtio_blk_req) * qsize; 145 r = bus_dmamem_alloc(sc->sc_virtio->sc_dmat, allocsize, 0, 0, 146 &sc->sc_reqs_segs[0], 1, &rsegs, BUS_DMA_NOWAIT); 147 if (r != 0) { 148 aprint_error_dev(sc->sc_dev, 149 "DMA memory allocation failed, size %d, " 150 "error code %d\n", allocsize, r); 151 goto err_none; 152 } 153 r = bus_dmamem_map(sc->sc_virtio->sc_dmat, 154 &sc->sc_reqs_segs[0], 1, allocsize, 155 &vaddr, BUS_DMA_NOWAIT); 156 if (r != 0) { 157 aprint_error_dev(sc->sc_dev, 158 "DMA memory map failed, " 159 "error code %d\n", r); 160 goto err_dmamem_alloc; 161 } 162 sc->sc_reqs = vaddr; 163 memset(vaddr, 0, allocsize); 164 for (i = 0; i < qsize; i++) { 165 struct virtio_blk_req *vr = &sc->sc_reqs[i]; 166 r = bus_dmamap_create(sc->sc_virtio->sc_dmat, 167 offsetof(struct virtio_blk_req, vr_bp), 168 1, 169 offsetof(struct virtio_blk_req, vr_bp), 170 0, 171 BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW, 172 &vr->vr_cmdsts); 173 if (r != 0) { 174 aprint_error_dev(sc->sc_dev, 175 "command dmamap creation failed, " 176 "error code %d\n", r); 177 goto err_reqs; 178 } 179 r = bus_dmamap_load(sc->sc_virtio->sc_dmat, vr->vr_cmdsts, 180 &vr->vr_hdr, 181 offsetof(struct virtio_blk_req, vr_bp), 182 NULL, BUS_DMA_NOWAIT); 183 if (r != 0) { 184 aprint_error_dev(sc->sc_dev, 185 "command dmamap load failed, " 186 "error code %d\n", r); 187 goto err_reqs; 188 } 189 r = bus_dmamap_create(sc->sc_virtio->sc_dmat, 190 ld->sc_maxxfer, 191 (ld->sc_maxxfer / NBPG) + 2, 192 ld->sc_maxxfer, 193 0, 194 BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW, 195 &vr->vr_payload); 196 if (r != 0) { 197 aprint_error_dev(sc->sc_dev, 198 "payload dmamap creation failed, " 199 "error code %d\n", r); 200 goto err_reqs; 201 } 202 } 203 return 0; 204 205 err_reqs: 206 for (i = 0; i < qsize; i++) { 207 struct virtio_blk_req *vr = &sc->sc_reqs[i]; 208 if (vr->vr_cmdsts) { 209 bus_dmamap_destroy(sc->sc_virtio->sc_dmat, 210 vr->vr_cmdsts); 211 vr->vr_cmdsts = 0; 212 } 213 if (vr->vr_payload) { 214 bus_dmamap_destroy(sc->sc_virtio->sc_dmat, 215 vr->vr_payload); 216 vr->vr_payload = 0; 217 } 218 } 219 bus_dmamem_unmap(sc->sc_virtio->sc_dmat, sc->sc_reqs, allocsize); 220 err_dmamem_alloc: 221 bus_dmamem_free(sc->sc_virtio->sc_dmat, &sc->sc_reqs_segs[0], 1); 222 err_none: 223 return -1; 224 } 225 226 static void 227 ld_virtio_attach(device_t parent, device_t self, void *aux) 228 { 229 struct ld_virtio_softc *sc = device_private(self); 230 struct ld_softc *ld = &sc->sc_ld; 231 struct virtio_softc *vsc = device_private(parent); 232 uint32_t features; 233 int qsize, maxxfersize; 234 235 if (vsc->sc_child != NULL) { 236 aprint_normal(": child already attached for %s; " 237 "something wrong...\n", 238 device_xname(parent)); 239 return; 240 } 241 aprint_normal("\n"); 242 aprint_naive("\n"); 243 244 sc->sc_dev = self; 245 sc->sc_virtio = vsc; 246 247 vsc->sc_child = self; 248 vsc->sc_ipl = IPL_BIO; 249 vsc->sc_vqs = &sc->sc_vq[0]; 250 vsc->sc_nvqs = 1; 251 vsc->sc_config_change = 0; 252 vsc->sc_intrhand = virtio_vq_intr; 253 254 features = virtio_negotiate_features(vsc, 255 (VIRTIO_BLK_F_SIZE_MAX | 256 VIRTIO_BLK_F_SEG_MAX | 257 VIRTIO_BLK_F_GEOMETRY | 258 VIRTIO_BLK_F_RO | 259 VIRTIO_BLK_F_BLK_SIZE)); 260 if (features & VIRTIO_BLK_F_RO) 261 sc->sc_readonly = 1; 262 else 263 sc->sc_readonly = 0; 264 265 ld->sc_secsize = 512; 266 if (features & VIRTIO_BLK_F_BLK_SIZE) { 267 ld->sc_secsize = virtio_read_device_config_4(vsc, 268 VIRTIO_BLK_CONFIG_BLK_SIZE); 269 } 270 maxxfersize = MAXPHYS; 271 #if 0 /* At least genfs_io assumes maxxfer == MAXPHYS. */ 272 if (features & VIRTIO_BLK_F_SEG_MAX) { 273 maxxfersize = virtio_read_device_config_4(vsc, 274 VIRTIO_BLK_CONFIG_SEG_MAX) 275 * ld->sc_secsize; 276 if (maxxfersize > MAXPHYS) 277 maxxfersize = MAXPHYS; 278 } 279 #endif 280 281 if (virtio_alloc_vq(vsc, &sc->sc_vq[0], 0, 282 maxxfersize, maxxfersize / NBPG + 2, 283 "I/O request") != 0) { 284 goto err; 285 } 286 qsize = sc->sc_vq[0].vq_num; 287 sc->sc_vq[0].vq_done = ld_virtio_vq_done; 288 289 ld->sc_dv = self; 290 ld->sc_secperunit = virtio_read_device_config_8(vsc, 291 VIRTIO_BLK_CONFIG_CAPACITY); 292 ld->sc_maxxfer = maxxfersize; 293 if (features & VIRTIO_BLK_F_GEOMETRY) { 294 ld->sc_ncylinders = virtio_read_device_config_2(vsc, 295 VIRTIO_BLK_CONFIG_GEOMETRY_C); 296 ld->sc_nheads = virtio_read_device_config_1(vsc, 297 VIRTIO_BLK_CONFIG_GEOMETRY_H); 298 ld->sc_nsectors = virtio_read_device_config_1(vsc, 299 VIRTIO_BLK_CONFIG_GEOMETRY_S); 300 } 301 ld->sc_maxqueuecnt = qsize; 302 303 if (ld_virtio_alloc_reqs(sc, qsize) < 0) 304 goto err; 305 306 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_BIO); 307 308 ld->sc_dump = ld_virtio_dump; 309 ld->sc_flush = NULL; 310 ld->sc_start = ld_virtio_start; 311 312 ld->sc_flags = LDF_ENABLED; 313 ldattach(ld); 314 315 return; 316 317 err: 318 vsc->sc_child = (void*)1; 319 return; 320 } 321 322 static int 323 ld_virtio_start(struct ld_softc *ld, struct buf *bp) 324 { 325 /* splbio */ 326 struct ld_virtio_softc *sc = device_private(ld->sc_dv); 327 struct virtio_softc *vsc = sc->sc_virtio; 328 struct virtqueue *vq = &sc->sc_vq[0]; 329 struct virtio_blk_req *vr; 330 int r; 331 int isread = (bp->b_flags & B_READ); 332 int slot; 333 334 if (sc->sc_readonly && !isread) 335 return EIO; 336 337 r = virtio_enqueue_prep(vsc, vq, &slot); 338 if (r != 0) 339 return r; 340 vr = &sc->sc_reqs[slot]; 341 r = bus_dmamap_load(vsc->sc_dmat, vr->vr_payload, 342 bp->b_data, bp->b_bcount, NULL, 343 ((isread?BUS_DMA_READ:BUS_DMA_WRITE) 344 |BUS_DMA_NOWAIT)); 345 if (r != 0) 346 return r; 347 348 r = virtio_enqueue_reserve(vsc, vq, slot, vr->vr_payload->dm_nsegs + 2); 349 if (r != 0) { 350 bus_dmamap_unload(vsc->sc_dmat, vr->vr_payload); 351 return r; 352 } 353 354 vr->vr_bp = bp; 355 vr->vr_hdr.type = isread?VIRTIO_BLK_T_IN:VIRTIO_BLK_T_OUT; 356 vr->vr_hdr.ioprio = 0; 357 vr->vr_hdr.sector = bp->b_rawblkno * sc->sc_ld.sc_secsize / 512; 358 359 bus_dmamap_sync(vsc->sc_dmat, vr->vr_cmdsts, 360 0, sizeof(struct virtio_blk_req_hdr), 361 BUS_DMASYNC_PREWRITE); 362 bus_dmamap_sync(vsc->sc_dmat, vr->vr_payload, 363 0, bp->b_bcount, 364 isread?BUS_DMASYNC_PREREAD:BUS_DMASYNC_PREWRITE); 365 bus_dmamap_sync(vsc->sc_dmat, vr->vr_cmdsts, 366 offsetof(struct virtio_blk_req, vr_status), 367 sizeof(uint8_t), 368 BUS_DMASYNC_PREREAD); 369 370 virtio_enqueue_p(vsc, vq, slot, vr->vr_cmdsts, 371 0, sizeof(struct virtio_blk_req_hdr), 372 true); 373 virtio_enqueue(vsc, vq, slot, vr->vr_payload, !isread); 374 virtio_enqueue_p(vsc, vq, slot, vr->vr_cmdsts, 375 offsetof(struct virtio_blk_req, vr_status), 376 sizeof(uint8_t), 377 false); 378 virtio_enqueue_commit(vsc, vq, slot, true); 379 380 return 0; 381 } 382 383 static void 384 ld_virtio_vq_done1(struct ld_virtio_softc *sc, struct virtio_softc *vsc, 385 struct virtqueue *vq, int slot) 386 { 387 struct virtio_blk_req *vr = &sc->sc_reqs[slot]; 388 struct buf *bp = vr->vr_bp; 389 390 bus_dmamap_sync(vsc->sc_dmat, vr->vr_cmdsts, 391 0, sizeof(struct virtio_blk_req_hdr), 392 BUS_DMASYNC_POSTWRITE); 393 bus_dmamap_sync(vsc->sc_dmat, vr->vr_payload, 394 0, bp->b_bcount, 395 (bp->b_flags & B_READ)?BUS_DMASYNC_POSTREAD 396 :BUS_DMASYNC_POSTWRITE); 397 bus_dmamap_sync(vsc->sc_dmat, vr->vr_cmdsts, 398 sizeof(struct virtio_blk_req_hdr), sizeof(uint8_t), 399 BUS_DMASYNC_POSTREAD); 400 401 if (vr->vr_status != VIRTIO_BLK_S_OK) { 402 bp->b_error = EIO; 403 bp->b_resid = bp->b_bcount; 404 } else { 405 bp->b_error = 0; 406 bp->b_resid = 0; 407 } 408 409 virtio_dequeue_commit(vsc, vq, slot); 410 411 lddone(&sc->sc_ld, bp); 412 } 413 414 static int 415 ld_virtio_vq_done(struct virtqueue *vq) 416 { 417 struct virtio_softc *vsc = vq->vq_owner; 418 struct ld_virtio_softc *sc = device_private(vsc->sc_child); 419 int r = 0; 420 int slot; 421 422 again: 423 if (virtio_dequeue(vsc, vq, &slot, NULL)) 424 return r; 425 r = 1; 426 427 ld_virtio_vq_done1(sc, vsc, vq, slot); 428 goto again; 429 } 430 431 static int 432 ld_virtio_dump(struct ld_softc *ld, void *data, int blkno, int blkcnt) 433 { 434 struct ld_virtio_softc *sc = device_private(ld->sc_dv); 435 struct virtio_softc *vsc = sc->sc_virtio; 436 struct virtqueue *vq = &sc->sc_vq[0]; 437 struct virtio_blk_req *vr; 438 int slot, r; 439 440 if (sc->sc_readonly) 441 return EIO; 442 443 r = virtio_enqueue_prep(vsc, vq, &slot); 444 if (r != 0) { 445 if (r == EAGAIN) { /* no free slot; dequeue first */ 446 delay(100); 447 ld_virtio_vq_done(vq); 448 r = virtio_enqueue_prep(vsc, vq, &slot); 449 if (r != 0) 450 return r; 451 } 452 return r; 453 } 454 vr = &sc->sc_reqs[slot]; 455 r = bus_dmamap_load(vsc->sc_dmat, vr->vr_payload, 456 data, blkcnt*ld->sc_secsize, NULL, 457 BUS_DMA_WRITE|BUS_DMA_NOWAIT); 458 if (r != 0) 459 return r; 460 461 r = virtio_enqueue_reserve(vsc, vq, slot, vr->vr_payload->dm_nsegs + 2); 462 if (r != 0) { 463 bus_dmamap_unload(vsc->sc_dmat, vr->vr_payload); 464 return r; 465 } 466 467 vr->vr_bp = (void*)0xdeadbeef; 468 vr->vr_hdr.type = VIRTIO_BLK_T_OUT; 469 vr->vr_hdr.ioprio = 0; 470 vr->vr_hdr.sector = (daddr_t) blkno * ld->sc_secsize / 512; 471 472 bus_dmamap_sync(vsc->sc_dmat, vr->vr_cmdsts, 473 0, sizeof(struct virtio_blk_req_hdr), 474 BUS_DMASYNC_PREWRITE); 475 bus_dmamap_sync(vsc->sc_dmat, vr->vr_payload, 476 0, blkcnt*ld->sc_secsize, 477 BUS_DMASYNC_PREWRITE); 478 bus_dmamap_sync(vsc->sc_dmat, vr->vr_cmdsts, 479 offsetof(struct virtio_blk_req, vr_status), 480 sizeof(uint8_t), 481 BUS_DMASYNC_PREREAD); 482 483 virtio_enqueue_p(vsc, vq, slot, vr->vr_cmdsts, 484 0, sizeof(struct virtio_blk_req_hdr), 485 true); 486 virtio_enqueue(vsc, vq, slot, vr->vr_payload, true); 487 virtio_enqueue_p(vsc, vq, slot, vr->vr_cmdsts, 488 offsetof(struct virtio_blk_req, vr_status), 489 sizeof(uint8_t), 490 false); 491 virtio_enqueue_commit(vsc, vq, slot, true); 492 493 for ( ; ; ) { 494 int dslot; 495 496 r = virtio_dequeue(vsc, vq, &dslot, NULL); 497 if (r != 0) 498 continue; 499 if (dslot != slot) { 500 ld_virtio_vq_done1(sc, vsc, vq, dslot); 501 continue; 502 } else 503 break; 504 } 505 506 bus_dmamap_sync(vsc->sc_dmat, vr->vr_cmdsts, 507 0, sizeof(struct virtio_blk_req_hdr), 508 BUS_DMASYNC_POSTWRITE); 509 bus_dmamap_sync(vsc->sc_dmat, vr->vr_payload, 510 0, blkcnt*ld->sc_secsize, 511 BUS_DMASYNC_POSTWRITE); 512 bus_dmamap_sync(vsc->sc_dmat, vr->vr_cmdsts, 513 offsetof(struct virtio_blk_req, vr_status), 514 sizeof(uint8_t), 515 BUS_DMASYNC_POSTREAD); 516 if (vr->vr_status == VIRTIO_BLK_S_OK) 517 r = 0; 518 else 519 r = EIO; 520 virtio_dequeue_commit(vsc, vq, slot); 521 522 return r; 523 } 524 525 static int 526 ld_virtio_detach(device_t self, int flags) 527 { 528 struct ld_virtio_softc *sc = device_private(self); 529 struct ld_softc *ld = &sc->sc_ld; 530 bus_dma_tag_t dmat = sc->sc_virtio->sc_dmat; 531 int r, i, qsize; 532 533 qsize = sc->sc_vq[0].vq_num; 534 r = ldbegindetach(ld, flags); 535 if (r != 0) 536 return r; 537 virtio_reset(sc->sc_virtio); 538 virtio_free_vq(sc->sc_virtio, &sc->sc_vq[0]); 539 540 for (i = 0; i < qsize; i++) { 541 bus_dmamap_destroy(dmat, 542 sc->sc_reqs[i].vr_cmdsts); 543 bus_dmamap_destroy(dmat, 544 sc->sc_reqs[i].vr_payload); 545 } 546 bus_dmamem_unmap(dmat, sc->sc_reqs, 547 sizeof(struct virtio_blk_req) * qsize); 548 bus_dmamem_free(dmat, &sc->sc_reqs_segs[0], 1); 549 550 ldenddetach(ld); 551 552 return 0; 553 } 554