xref: /netbsd-src/sys/dev/pci/ixpide.c (revision 8b0f9554ff8762542c4defc4f70e1eb76fb508fa)
1 /*	$NetBSD: ixpide.c,v 1.10 2007/09/10 10:35:54 cube Exp $	*/
2 
3 /*
4  *  Copyright (c) 2004 The NetBSD Foundation.
5  *  All rights reserved.
6  *
7  *  Redistribution and use in source and binary forms, with or without
8  *  modification, are permitted provided that the following conditions
9  *  are met:
10  *  1. Redistributions of source code must retain the above copyright
11  *     notice, this list of conditions and the following disclaimer.
12  *  2. Redistributions in binary form must reproduce the above copyright
13  *     notice, this list of conditions and the following disclaimer in the
14  *     documentation and/or other materials provided with the distribution.
15  *  3. Neither the name of The NetBSD Foundation nor the names of its
16  *     contributors may be used to endorse or promote products derived
17  *     from this software without specific prior written permission.
18  *
19  *  THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  *  ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  *  TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  *  PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  *  BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  *  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  *  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  *  POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: ixpide.c,v 1.10 2007/09/10 10:35:54 cube Exp $");
34 
35 #include <sys/param.h>
36 #include <sys/systm.h>
37 
38 #include <dev/pci/pcivar.h>
39 #include <dev/pci/pcidevs.h>
40 #include <dev/pci/pciidereg.h>
41 #include <dev/pci/pciidevar.h>
42 #include <dev/pci/pciide_ixp_reg.h>
43 
44 static int	ixpide_match(struct device *, struct cfdata *, void *);
45 static void	ixpide_attach(struct device *, struct device *, void *);
46 
47 static void	ixp_chip_map(struct pciide_softc *, struct pci_attach_args *);
48 static void	ixp_setup_channel(struct ata_channel *);
49 
50 CFATTACH_DECL(ixpide, sizeof(struct pciide_softc),
51     ixpide_match, ixpide_attach, NULL, NULL);
52 
53 static const char ixpdesc[] = "ATI Technologies IXP IDE Controller";
54 
55 static const struct pciide_product_desc pciide_ixpide_products[] = {
56 	{ PCI_PRODUCT_ATI_IXP_IDE_200, 0, ixpdesc, ixp_chip_map },
57 	{ PCI_PRODUCT_ATI_IXP_IDE_300, 0, ixpdesc, ixp_chip_map },
58 	{ PCI_PRODUCT_ATI_IXP_IDE_400, 0, ixpdesc, ixp_chip_map },
59 	{ PCI_PRODUCT_ATI_IXP_IDE_600, 0, ixpdesc, ixp_chip_map },
60 	{ PCI_PRODUCT_ATI_SB400_SATA_1, 0, ixpdesc, ixp_chip_map },
61 	{ PCI_PRODUCT_ATI_SB400_SATA_2, 0, ixpdesc, ixp_chip_map },
62 	{ PCI_PRODUCT_ATI_SB600_SATA_1, 0, ixpdesc, ixp_chip_map },
63 	{ PCI_PRODUCT_ATI_SB600_SATA_2, 0, ixpdesc, ixp_chip_map },
64 	{ 0, 			       0, NULL,	   NULL }
65 };
66 
67 static int
68 ixpide_match(struct device *parent, struct cfdata *cfdata,
69     void *aux)
70 {
71 	struct pci_attach_args *pa = (struct pci_attach_args *)aux;
72 
73 	if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ATI &&
74 	    PCI_CLASS(pa->pa_class) == PCI_CLASS_MASS_STORAGE &&
75 	    PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_MASS_STORAGE_IDE &&
76 	    pciide_lookup_product(pa->pa_id, pciide_ixpide_products))
77 		return (2);
78 	return (0);
79 }
80 
81 static void
82 ixpide_attach(struct device *parent, struct device *self, void *aux)
83 {
84 	struct pci_attach_args *pa = aux;
85 	struct pciide_softc *sc = (struct pciide_softc *)self;
86 
87 	pciide_common_attach(sc, pa,
88 	    pciide_lookup_product(pa->pa_id, pciide_ixpide_products));
89 }
90 
91 static void
92 ixp_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa)
93 {
94 	struct pciide_channel *cp;
95 	int channel;
96 	pcireg_t interface;
97 	bus_size_t cmdsize, ctlsize;
98 
99 	if (pciide_chipen(sc, pa) == 0)
100 		return;
101 
102 	aprint_verbose("%s: bus-master DMA support present",
103 	    sc->sc_wdcdev.sc_atac.atac_dev.dv_xname);
104 	pciide_mapreg_dma(sc, pa);
105 	aprint_verbose("\n");
106 
107 	sc->sc_wdcdev.sc_atac.atac_cap = ATAC_CAP_DATA16 | ATAC_CAP_DATA32;
108 	if (sc->sc_dma_ok) {
109 		sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA | ATAC_CAP_UDMA;
110 		sc->sc_wdcdev.irqack = pciide_irqack;
111 	}
112 
113 	sc->sc_wdcdev.sc_atac.atac_pio_cap = 4;
114 	sc->sc_wdcdev.sc_atac.atac_dma_cap = 2;
115 	sc->sc_wdcdev.sc_atac.atac_udma_cap = 6;
116 	sc->sc_wdcdev.sc_atac.atac_set_modes = ixp_setup_channel;
117 	sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanarray;
118 	sc->sc_wdcdev.sc_atac.atac_nchannels = PCIIDE_NUM_CHANNELS;
119 
120 	interface = PCI_INTERFACE(pa->pa_class);
121 
122 	wdc_allocate_regs(&sc->sc_wdcdev);
123 
124 	for (channel = 0; channel < sc->sc_wdcdev.sc_atac.atac_nchannels;
125 	    channel++) {
126 		cp = &sc->pciide_channels[channel];
127 		if (pciide_chansetup(sc, channel, interface) == 0)
128 			continue;
129 		pciide_mapchan(pa, cp, interface, &cmdsize, &ctlsize,
130 		    pciide_pci_intr);
131 	}
132 }
133 
134 /* Values from linux driver */
135 static const uint8_t ixp_pio_timings[] = {
136 	0x5d, 0x47, 0x34, 0x22, 0x20
137 };
138 
139 static const uint8_t ixp_mdma_timings[] = {
140 	0x77, 0x21, 0x20
141 };
142 
143 static void
144 ixp_setup_channel(struct ata_channel *chp)
145 {
146 	int drive, s;
147 	struct pciide_channel *cp = CHAN_TO_PCHAN(chp);
148 	pcireg_t udma, mdma_timing, pio, pio_timing;
149 	struct ata_drive_datas *drvp;
150 	struct pciide_softc *sc = CHAN_TO_PCIIDE(chp);
151 
152 	pio_timing = pci_conf_read(sc->sc_pc, sc->sc_tag, IXP_PIO_TIMING);
153 	pio = pci_conf_read(sc->sc_pc, sc->sc_tag, IXP_PIO_CTL);
154 	mdma_timing = pci_conf_read(sc->sc_pc, sc->sc_tag, IXP_MDMA_TIMING);
155 	udma = pci_conf_read(sc->sc_pc, sc->sc_tag, IXP_UDMA_CTL);
156 
157 	pciide_channel_dma_setup(cp);
158 
159 	for (drive = 0; drive < 2; drive++) {
160 		drvp = &chp->ch_drive[drive];
161 		if ((drvp->drive_flags & DRIVE) == 0)
162 			continue;
163 		if (drvp->drive_flags & DRIVE_UDMA) {
164 			s = splbio();
165 			drvp->drive_flags &= ~DRIVE_DMA;
166 			splx(s);
167 			IXP_UDMA_ENABLE(udma, chp->ch_channel, drive);
168 			IXP_SET_MODE(udma, chp->ch_channel, drive, drvp->UDMA_mode);
169 		} else if (drvp->drive_flags & DRIVE_DMA) {
170 			IXP_UDMA_DISABLE(udma, chp->ch_channel, drive);
171 			IXP_SET_TIMING(mdma_timing, chp->ch_channel, drive,
172 			    ixp_mdma_timings[drvp->DMA_mode]);
173 		} else
174 			IXP_UDMA_DISABLE(udma, chp->ch_channel, drive);
175 
176 		/*
177 		 * Set PIO mode and timings
178 		 * Linux driver avoids PIO mode 1, let's do it too.
179 		 */
180 		if (drvp->PIO_mode == 1)
181 			drvp->PIO_mode = 0;
182 
183 		IXP_SET_MODE(pio, chp->ch_channel, drive, drvp->PIO_mode);
184 		IXP_SET_TIMING(pio_timing, chp->ch_channel, drive,
185 		    ixp_pio_timings[drvp->PIO_mode]);
186 	}
187 	pci_conf_write(sc->sc_pc, sc->sc_tag, IXP_UDMA_CTL, udma);
188 	pci_conf_write(sc->sc_pc, sc->sc_tag, IXP_MDMA_TIMING, mdma_timing);
189 	pci_conf_write(sc->sc_pc, sc->sc_tag, IXP_PIO_CTL, pio);
190 	pci_conf_write(sc->sc_pc, sc->sc_tag, IXP_PIO_TIMING, pio_timing);
191 	ATADEBUG_PRINT(("ixp_setup_channel: udma = %08x, mdma_timing = %08x, pio_mode = %08x,"
192 	    " pio_timing = %08x\n", udma, mdma_timing, pio, pio_timing), DEBUG_PROBE);
193 }
194