1 /* $NetBSD: ixgbe_vf.c,v 1.27 2021/04/30 06:55:32 msaitoh Exp $ */ 2 3 /****************************************************************************** 4 SPDX-License-Identifier: BSD-3-Clause 5 6 Copyright (c) 2001-2017, Intel Corporation 7 All rights reserved. 8 9 Redistribution and use in source and binary forms, with or without 10 modification, are permitted provided that the following conditions are met: 11 12 1. Redistributions of source code must retain the above copyright notice, 13 this list of conditions and the following disclaimer. 14 15 2. Redistributions in binary form must reproduce the above copyright 16 notice, this list of conditions and the following disclaimer in the 17 documentation and/or other materials provided with the distribution. 18 19 3. Neither the name of the Intel Corporation nor the names of its 20 contributors may be used to endorse or promote products derived from 21 this software without specific prior written permission. 22 23 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 24 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 27 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 POSSIBILITY OF SUCH DAMAGE. 34 35 ******************************************************************************/ 36 /*$FreeBSD: head/sys/dev/ixgbe/ixgbe_vf.c 331224 2018-03-19 20:55:05Z erj $*/ 37 38 #include <sys/cdefs.h> 39 __KERNEL_RCSID(0, "$NetBSD: ixgbe_vf.c,v 1.27 2021/04/30 06:55:32 msaitoh Exp $"); 40 41 #include "ixgbe_api.h" 42 #include "ixgbe_type.h" 43 #include "ixgbe_vf.h" 44 45 #ifndef IXGBE_VFWRITE_REG 46 #define IXGBE_VFWRITE_REG IXGBE_WRITE_REG 47 #endif 48 #ifndef IXGBE_VFREAD_REG 49 #define IXGBE_VFREAD_REG IXGBE_READ_REG 50 #endif 51 52 /** 53 * ixgbe_init_ops_vf - Initialize the pointers for vf 54 * @hw: pointer to hardware structure 55 * 56 * This will assign function pointers, adapter-specific functions can 57 * override the assignment of generic function pointers by assigning 58 * their own adapter-specific function pointers. 59 * Does not touch the hardware. 60 **/ 61 s32 ixgbe_init_ops_vf(struct ixgbe_hw *hw) 62 { 63 /* MAC */ 64 hw->mac.ops.init_hw = ixgbe_init_hw_vf; 65 hw->mac.ops.reset_hw = ixgbe_reset_hw_vf; 66 hw->mac.ops.start_hw = ixgbe_start_hw_vf; 67 /* Cannot clear stats on VF */ 68 hw->mac.ops.clear_hw_cntrs = NULL; 69 hw->mac.ops.get_media_type = NULL; 70 hw->mac.ops.get_mac_addr = ixgbe_get_mac_addr_vf; 71 hw->mac.ops.stop_adapter = ixgbe_stop_adapter_vf; 72 hw->mac.ops.get_bus_info = NULL; 73 hw->mac.ops.negotiate_api_version = ixgbevf_negotiate_api_version; 74 75 /* Link */ 76 hw->mac.ops.setup_link = ixgbe_setup_mac_link_vf; 77 hw->mac.ops.check_link = ixgbe_check_mac_link_vf; 78 hw->mac.ops.get_link_capabilities = NULL; 79 80 /* RAR, Multicast, VLAN */ 81 hw->mac.ops.set_rar = ixgbe_set_rar_vf; 82 hw->mac.ops.set_uc_addr = ixgbevf_set_uc_addr_vf; 83 hw->mac.ops.init_rx_addrs = NULL; 84 hw->mac.ops.update_mc_addr_list = ixgbe_update_mc_addr_list_vf; 85 hw->mac.ops.update_xcast_mode = ixgbevf_update_xcast_mode; 86 hw->mac.ops.enable_mc = NULL; 87 hw->mac.ops.disable_mc = NULL; 88 hw->mac.ops.clear_vfta = NULL; 89 hw->mac.ops.set_vfta = ixgbe_set_vfta_vf; 90 hw->mac.ops.set_rlpml = ixgbevf_rlpml_set_vf; 91 92 hw->mac.max_tx_queues = 1; 93 hw->mac.max_rx_queues = 1; 94 95 hw->mbx.ops.init_params = ixgbe_init_mbx_params_vf; 96 97 return IXGBE_SUCCESS; 98 } 99 100 /* ixgbe_virt_clr_reg - Set register to default (power on) state. 101 * @hw: pointer to hardware structure 102 */ 103 static void ixgbe_virt_clr_reg(struct ixgbe_hw *hw) 104 { 105 int i; 106 u32 vfsrrctl; 107 u32 vfdca_rxctrl; 108 u32 vfdca_txctrl; 109 110 /* VRSRRCTL default values (BSIZEPACKET = 2048, BSIZEHEADER = 256) */ 111 vfsrrctl = 0x100 << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT; 112 vfsrrctl |= 0x800 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT; 113 114 /* DCA_RXCTRL default value */ 115 vfdca_rxctrl = IXGBE_DCA_RXCTRL_DESC_RRO_EN | 116 IXGBE_DCA_RXCTRL_DATA_WRO_EN | 117 IXGBE_DCA_RXCTRL_HEAD_WRO_EN; 118 119 /* DCA_TXCTRL default value */ 120 vfdca_txctrl = IXGBE_DCA_TXCTRL_DESC_RRO_EN | 121 IXGBE_DCA_TXCTRL_DESC_WRO_EN | 122 IXGBE_DCA_TXCTRL_DATA_RRO_EN; 123 124 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0); 125 126 KASSERT(IXGBE_VF_MAX_TX_QUEUES == IXGBE_VF_MAX_RX_QUEUES); 127 for (i = 0; i < IXGBE_VF_MAX_TX_QUEUES; i++) { 128 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(i), 0); 129 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(i), 0); 130 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(i), 0); 131 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(i), vfsrrctl); 132 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(i), 0); 133 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(i), 0); 134 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(i), 0); 135 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAH(i), 0); 136 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAL(i), 0); 137 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(i), vfdca_rxctrl); 138 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(i), vfdca_txctrl); 139 } 140 141 IXGBE_WRITE_FLUSH(hw); 142 } 143 144 /** 145 * ixgbe_start_hw_vf - Prepare hardware for Tx/Rx 146 * @hw: pointer to hardware structure 147 * 148 * Starts the hardware by filling the bus info structure and media type, clears 149 * all on chip counters, initializes receive address registers, multicast 150 * table, VLAN filter table, calls routine to set up link and flow control 151 * settings, and leaves transmit and receive units disabled and uninitialized 152 **/ 153 s32 ixgbe_start_hw_vf(struct ixgbe_hw *hw) 154 { 155 /* Clear adapter stopped flag */ 156 hw->adapter_stopped = FALSE; 157 158 return IXGBE_SUCCESS; 159 } 160 161 /** 162 * ixgbe_init_hw_vf - virtual function hardware initialization 163 * @hw: pointer to hardware structure 164 * 165 * Initialize the hardware by resetting the hardware and then starting 166 * the hardware 167 **/ 168 s32 ixgbe_init_hw_vf(struct ixgbe_hw *hw) 169 { 170 s32 status = hw->mac.ops.start_hw(hw); 171 172 hw->mac.ops.get_mac_addr(hw, hw->mac.addr); 173 174 return status; 175 } 176 177 /** 178 * ixgbe_reset_hw_vf - Performs hardware reset 179 * @hw: pointer to hardware structure 180 * 181 * Resets the hardware by resetting the transmit and receive units, masks and 182 * clears all interrupts. 183 **/ 184 s32 ixgbe_reset_hw_vf(struct ixgbe_hw *hw) 185 { 186 struct ixgbe_mbx_info *mbx = &hw->mbx; 187 u32 timeout = IXGBE_VF_INIT_TIMEOUT; 188 s32 ret_val = IXGBE_ERR_INVALID_MAC_ADDR; 189 u32 msgbuf[IXGBE_VF_PERMADDR_MSG_LEN]; 190 u8 *addr = (u8 *)(&msgbuf[1]); 191 192 DEBUGFUNC("ixgbevf_reset_hw_vf"); 193 194 /* Call adapter stop to disable tx/rx and clear interrupts */ 195 hw->mac.ops.stop_adapter(hw); 196 197 /* reset the api version */ 198 hw->api_version = ixgbe_mbox_api_10; 199 200 DEBUGOUT("Issuing a function level reset to MAC\n"); 201 202 IXGBE_VFWRITE_REG(hw, IXGBE_VFCTRL, IXGBE_CTRL_RST); 203 IXGBE_WRITE_FLUSH(hw); 204 205 msec_delay(50); 206 207 /* we cannot reset while the RSTI / RSTD bits are asserted */ 208 while (!mbx->ops.check_for_rst(hw, 0) && timeout) { 209 timeout--; 210 usec_delay(5); 211 } 212 213 if (!timeout) 214 return IXGBE_ERR_RESET_FAILED; 215 216 /* Reset VF registers to initial values */ 217 ixgbe_virt_clr_reg(hw); 218 219 /* mailbox timeout can now become active */ 220 mbx->timeout = IXGBE_VF_MBX_INIT_TIMEOUT; 221 222 msgbuf[0] = IXGBE_VF_RESET; 223 mbx->ops.write_posted(hw, msgbuf, 1, 0); 224 225 msec_delay(10); 226 227 /* 228 * set our "perm_addr" based on info provided by PF 229 * also set up the mc_filter_type which is piggy backed 230 * on the mac address in word 3 231 */ 232 ret_val = mbx->ops.read_posted(hw, msgbuf, 233 IXGBE_VF_PERMADDR_MSG_LEN, 0); 234 if (ret_val) 235 return ret_val; 236 237 if (msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_ACK) && 238 msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_NACK)) 239 return IXGBE_ERR_INVALID_MAC_ADDR; 240 241 if (msgbuf[0] == (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_ACK)) 242 memcpy(hw->mac.perm_addr, addr, IXGBE_ETH_LENGTH_OF_ADDRESS); 243 244 hw->mac.mc_filter_type = msgbuf[IXGBE_VF_MC_TYPE_WORD]; 245 246 return ret_val; 247 } 248 249 /** 250 * ixgbe_stop_adapter_vf - Generic stop Tx/Rx units 251 * @hw: pointer to hardware structure 252 * 253 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts, 254 * disables transmit and receive units. The adapter_stopped flag is used by 255 * the shared code and drivers to determine if the adapter is in a stopped 256 * state and should not touch the hardware. 257 **/ 258 s32 ixgbe_stop_adapter_vf(struct ixgbe_hw *hw) 259 { 260 u32 reg_val; 261 u16 i; 262 263 /* 264 * Set the adapter_stopped flag so other driver functions stop touching 265 * the hardware 266 */ 267 hw->adapter_stopped = TRUE; 268 269 /* Clear interrupt mask to stop from interrupts being generated */ 270 IXGBE_VFWRITE_REG(hw, IXGBE_VTEIMC, IXGBE_VF_IRQ_CLEAR_MASK); 271 272 /* Clear any pending interrupts, flush previous writes */ 273 IXGBE_VFREAD_REG(hw, IXGBE_VTEICR); 274 275 /* Disable the transmit unit. Each queue must be disabled. */ 276 for (i = 0; i < hw->mac.max_tx_queues; i++) 277 IXGBE_VFWRITE_REG(hw, IXGBE_VFTXDCTL(i), IXGBE_TXDCTL_SWFLSH); 278 279 /* Disable the receive unit by stopping each queue */ 280 for (i = 0; i < hw->mac.max_rx_queues; i++) { 281 reg_val = IXGBE_VFREAD_REG(hw, IXGBE_VFRXDCTL(i)); 282 reg_val &= ~IXGBE_RXDCTL_ENABLE; 283 IXGBE_VFWRITE_REG(hw, IXGBE_VFRXDCTL(i), reg_val); 284 } 285 /* Clear packet split and pool config */ 286 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0); 287 288 /* flush all queues disables */ 289 IXGBE_WRITE_FLUSH(hw); 290 msec_delay(2); 291 292 return IXGBE_SUCCESS; 293 } 294 295 /** 296 * ixgbe_mta_vector - Determines bit-vector in multicast table to set 297 * @hw: pointer to hardware structure 298 * @mc_addr: the multicast address 299 * 300 * Extracts the 12 bits, from a multicast address, to determine which 301 * bit-vector to set in the multicast table. The hardware uses 12 bits, from 302 * incoming rx multicast addresses, to determine the bit-vector to check in 303 * the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set 304 * by the MO field of the MCSTCTRL. The MO field is set during initialization 305 * to mc_filter_type. 306 **/ 307 static s32 ixgbe_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr) 308 { 309 u32 vector = 0; 310 311 switch (hw->mac.mc_filter_type) { 312 case 0: /* use bits [47:36] of the address */ 313 vector = ((mc_addr[4] >> 4) | (((u16)mc_addr[5]) << 4)); 314 break; 315 case 1: /* use bits [46:35] of the address */ 316 vector = ((mc_addr[4] >> 3) | (((u16)mc_addr[5]) << 5)); 317 break; 318 case 2: /* use bits [45:34] of the address */ 319 vector = ((mc_addr[4] >> 2) | (((u16)mc_addr[5]) << 6)); 320 break; 321 case 3: /* use bits [43:32] of the address */ 322 vector = ((mc_addr[4]) | (((u16)mc_addr[5]) << 8)); 323 break; 324 default: /* Invalid mc_filter_type */ 325 DEBUGOUT("MC filter type param set incorrectly\n"); 326 ASSERT(0); 327 break; 328 } 329 330 /* vector can only be 12-bits or boundary will be exceeded */ 331 vector &= 0xFFF; 332 return vector; 333 } 334 335 static s32 ixgbevf_write_msg_read_ack(struct ixgbe_hw *hw, u32 *msg, 336 u32 *retmsg, u16 size) 337 { 338 struct ixgbe_mbx_info *mbx = &hw->mbx; 339 s32 retval = mbx->ops.write_posted(hw, msg, size, 0); 340 341 if (retval) 342 return retval; 343 344 return mbx->ops.read_posted(hw, retmsg, size, 0); 345 } 346 347 /** 348 * ixgbe_set_rar_vf - set device MAC address 349 * @hw: pointer to hardware structure 350 * @index: Receive address register to write 351 * @addr: Address to put into receive address register 352 * @vmdq: VMDq "set" or "pool" index 353 * @enable_addr: set flag that address is active 354 **/ 355 s32 ixgbe_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq, 356 u32 enable_addr) 357 { 358 u32 msgbuf[3]; 359 u8 *msg_addr = (u8 *)(&msgbuf[1]); 360 s32 ret_val; 361 UNREFERENCED_3PARAMETER(vmdq, enable_addr, index); 362 363 memset(msgbuf, 0, 12); 364 msgbuf[0] = IXGBE_VF_SET_MAC_ADDR; 365 memcpy(msg_addr, addr, 6); 366 ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 3); 367 368 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS; 369 370 /* if nacked the address was rejected, use "perm_addr" */ 371 if (!ret_val && 372 (msgbuf[0] == (IXGBE_VF_SET_MAC_ADDR | IXGBE_VT_MSGTYPE_NACK))) { 373 ixgbe_get_mac_addr_vf(hw, hw->mac.addr); 374 return IXGBE_ERR_MBX; 375 } 376 377 return ret_val; 378 } 379 380 /** 381 * ixgbe_update_mc_addr_list_vf - Update Multicast addresses 382 * @hw: pointer to the HW structure 383 * @mc_addr_list: array of multicast addresses to program 384 * @mc_addr_count: number of multicast addresses to program 385 * @next: caller supplied function to return next address in list 386 * @clear: unused 387 * 388 * Updates the Multicast Table Array. 389 **/ 390 s32 ixgbe_update_mc_addr_list_vf(struct ixgbe_hw *hw, u8 *mc_addr_list, 391 u32 mc_addr_count, ixgbe_mc_addr_itr next, 392 bool clear) 393 { 394 u32 msgbuf[IXGBE_VFMAILBOX_SIZE]; 395 u16 *vector_list = (u16 *)&msgbuf[1]; 396 u32 vector; 397 u32 cnt, i; 398 u32 vmdq; 399 400 UNREFERENCED_1PARAMETER(clear); 401 402 DEBUGFUNC("ixgbe_update_mc_addr_list_vf"); 403 404 /* Each entry in the list uses 1 16 bit word. We have 30 405 * 16 bit words available in our HW msg buffer (minus 1 for the 406 * msg type). That's 30 hash values if we pack 'em right. If 407 * there are more than 30 MC addresses to add then punt the 408 * extras for now and then add code to handle more than 30 later. 409 * It would be unusual for a server to request that many multi-cast 410 * addresses except for in large enterprise network environments. 411 */ 412 413 DEBUGOUT1("MC Addr Count = %d\n", mc_addr_count); 414 415 if (mc_addr_count > IXGBE_MAX_VF_MC) { 416 device_printf(ixgbe_dev_from_hw(hw), 417 "number of Ethernet multicast addresses exceeded " 418 "the limit (%u > %d)\n", mc_addr_count, IXGBE_MAX_VF_MC); 419 cnt = IXGBE_MAX_VF_MC; 420 } else 421 cnt = mc_addr_count; 422 msgbuf[0] = IXGBE_VF_SET_MULTICAST; 423 msgbuf[0] |= cnt << IXGBE_VT_MSGINFO_SHIFT; 424 425 for (i = 0; i < cnt; i++) { 426 vector = ixgbe_mta_vector(hw, next(hw, &mc_addr_list, &vmdq)); 427 DEBUGOUT1("Hash value = 0x%03X\n", vector); 428 vector_list[i] = (u16)vector; 429 } 430 return ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 431 IXGBE_VFMAILBOX_SIZE); 432 } 433 434 /** 435 * ixgbevf_update_xcast_mode - Update Multicast mode 436 * @hw: pointer to the HW structure 437 * @xcast_mode: new multicast mode 438 * 439 * Updates the Multicast Mode of VF. 440 **/ 441 s32 ixgbevf_update_xcast_mode(struct ixgbe_hw *hw, int xcast_mode) 442 { 443 u32 msgbuf[2]; 444 s32 err; 445 446 switch (hw->api_version) { 447 case ixgbe_mbox_api_12: 448 /* New modes were introduced in 1.3 version */ 449 if (xcast_mode > IXGBEVF_XCAST_MODE_ALLMULTI) 450 return IXGBE_ERR_FEATURE_NOT_SUPPORTED; 451 /* Fall through */ 452 case ixgbe_mbox_api_13: 453 break; 454 default: 455 return IXGBE_ERR_FEATURE_NOT_SUPPORTED; 456 } 457 458 msgbuf[0] = IXGBE_VF_UPDATE_XCAST_MODE; 459 msgbuf[1] = xcast_mode; 460 461 err = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2); 462 if (err) 463 return err; 464 465 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS; 466 if (msgbuf[0] == 467 (IXGBE_VF_UPDATE_XCAST_MODE | IXGBE_VT_MSGTYPE_NACK)) { 468 if (xcast_mode == IXGBEVF_XCAST_MODE_PROMISC) { 469 /* 470 * If the API version matched and the reply was NACK, 471 * assume the PF was not in PROMISC mode. 472 */ 473 return IXGBE_ERR_NOT_IN_PROMISC; 474 } else 475 return IXGBE_ERR_FEATURE_NOT_SUPPORTED; 476 } 477 /* 478 * On linux's PF driver implementation, the PF replies VF's 479 * XCAST_MODE_ALLMULTI message not with NACK but with ACK even if the 480 * virtual function is NOT marked "trust" and act as 481 * XCAST_MODE_"MULTI". If ixv(4) simply check the return value of 482 * update_xcast_mode(XCAST_MODE_ALLMULTI), SIOCSADDMULTI success and 483 * the user may have trouble with some addresses. Fortunately, the 484 * Linux's PF driver's "ACK" message has not XCAST_MODE_"ALL"MULTI but 485 * XCAST_MODE_MULTI, so we can check this state by checking if the 486 * send message's argument and the reply message's argument are 487 * different. 488 */ 489 if ((xcast_mode > IXGBEVF_XCAST_MODE_MULTI) 490 && (xcast_mode != msgbuf[1])) 491 return IXGBE_ERR_NOT_TRUSTED; 492 return IXGBE_SUCCESS; 493 } 494 495 /** 496 * ixgbe_set_vfta_vf - Set/Unset vlan filter table address 497 * @hw: pointer to the HW structure 498 * @vlan: 12 bit VLAN ID 499 * @vind: unused by VF drivers 500 * @vlan_on: if TRUE then set bit, else clear bit 501 * @vlvf_bypass: boolean flag indicating updating default pool is okay 502 * 503 * Turn on/off specified VLAN in the VLAN filter table. 504 **/ 505 s32 ixgbe_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind, 506 bool vlan_on, bool vlvf_bypass) 507 { 508 u32 msgbuf[2]; 509 s32 ret_val; 510 UNREFERENCED_2PARAMETER(vind, vlvf_bypass); 511 512 msgbuf[0] = IXGBE_VF_SET_VLAN; 513 msgbuf[1] = vlan; 514 /* Setting the 8 bit field MSG INFO to TRUE indicates "add" */ 515 msgbuf[0] |= (u32)vlan_on << IXGBE_VT_MSGINFO_SHIFT; 516 517 ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2); 518 if (!ret_val && (msgbuf[0] & IXGBE_VT_MSGTYPE_ACK)) 519 return IXGBE_SUCCESS; 520 521 return ret_val | (msgbuf[0] & IXGBE_VT_MSGTYPE_NACK); 522 } 523 524 /** 525 * ixgbe_get_num_of_tx_queues_vf - Get number of TX queues 526 * @hw: pointer to hardware structure 527 * 528 * Returns the number of transmit queues for the given adapter. 529 **/ 530 u32 ixgbe_get_num_of_tx_queues_vf(struct ixgbe_hw *hw) 531 { 532 UNREFERENCED_1PARAMETER(hw); 533 return IXGBE_VF_MAX_TX_QUEUES; 534 } 535 536 /** 537 * ixgbe_get_num_of_rx_queues_vf - Get number of RX queues 538 * @hw: pointer to hardware structure 539 * 540 * Returns the number of receive queues for the given adapter. 541 **/ 542 u32 ixgbe_get_num_of_rx_queues_vf(struct ixgbe_hw *hw) 543 { 544 UNREFERENCED_1PARAMETER(hw); 545 return IXGBE_VF_MAX_RX_QUEUES; 546 } 547 548 /** 549 * ixgbe_get_mac_addr_vf - Read device MAC address 550 * @hw: pointer to the HW structure 551 * @mac_addr: the MAC address 552 **/ 553 s32 ixgbe_get_mac_addr_vf(struct ixgbe_hw *hw, u8 *mac_addr) 554 { 555 int i; 556 557 for (i = 0; i < IXGBE_ETH_LENGTH_OF_ADDRESS; i++) 558 mac_addr[i] = hw->mac.perm_addr[i]; 559 560 return IXGBE_SUCCESS; 561 } 562 563 s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr) 564 { 565 u32 msgbuf[3], msgbuf_chk; 566 u8 *msg_addr = (u8 *)(&msgbuf[1]); 567 s32 ret_val; 568 569 memset(msgbuf, 0, sizeof(msgbuf)); 570 /* 571 * If index is one then this is the start of a new list and needs 572 * indication to the PF so it can do it's own list management. 573 * If it is zero then that tells the PF to just clear all of 574 * this VF's macvlans and there is no new list. 575 */ 576 msgbuf[0] |= index << IXGBE_VT_MSGINFO_SHIFT; 577 msgbuf[0] |= IXGBE_VF_SET_MACVLAN; 578 msgbuf_chk = msgbuf[0]; 579 if (addr) 580 memcpy(msg_addr, addr, 6); 581 582 ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 3); 583 if (!ret_val) { 584 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS; 585 586 if (msgbuf[0] == (msgbuf_chk | IXGBE_VT_MSGTYPE_NACK)) 587 return IXGBE_ERR_OUT_OF_MEM; 588 } 589 590 return ret_val; 591 } 592 593 /** 594 * ixgbe_setup_mac_link_vf - Setup MAC link settings 595 * @hw: pointer to hardware structure 596 * @speed: new link speed 597 * @autoneg_wait_to_complete: TRUE when waiting for completion is needed 598 * 599 * Set the link speed in the AUTOC register and restarts link. 600 **/ 601 s32 ixgbe_setup_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed speed, 602 bool autoneg_wait_to_complete) 603 { 604 UNREFERENCED_3PARAMETER(hw, speed, autoneg_wait_to_complete); 605 return IXGBE_SUCCESS; 606 } 607 608 /** 609 * ixgbe_check_mac_link_vf - Get link/speed status 610 * @hw: pointer to hardware structure 611 * @speed: pointer to link speed 612 * @link_up: TRUE is link is up, FALSE otherwise 613 * @autoneg_wait_to_complete: TRUE when waiting for completion is needed 614 * 615 * Reads the links register to determine if link is up and the current speed 616 **/ 617 s32 ixgbe_check_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 618 bool *link_up, bool autoneg_wait_to_complete) 619 { 620 struct ixgbe_mbx_info *mbx = &hw->mbx; 621 struct ixgbe_mac_info *mac = &hw->mac; 622 s32 ret_val = IXGBE_SUCCESS; 623 u32 links_reg; 624 u32 in_msg = 0; 625 UNREFERENCED_1PARAMETER(autoneg_wait_to_complete); 626 627 /* If we were hit with a reset drop the link */ 628 if (!mbx->ops.check_for_rst(hw, 0) || !mbx->timeout) 629 mac->get_link_status = TRUE; 630 631 if (!mac->get_link_status) 632 goto out; 633 634 /* if link status is down no point in checking to see if pf is up */ 635 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS); 636 if (!(links_reg & IXGBE_LINKS_UP)) 637 goto out; 638 639 /* for SFP+ modules and DA cables on 82599 it can take up to 500usecs 640 * before the link status is correct 641 */ 642 if (mac->type == ixgbe_mac_82599_vf) { 643 int i; 644 645 for (i = 0; i < 5; i++) { 646 usec_delay(100); 647 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS); 648 649 if (!(links_reg & IXGBE_LINKS_UP)) 650 goto out; 651 } 652 } 653 654 switch (links_reg & IXGBE_LINKS_SPEED_82599) { 655 case IXGBE_LINKS_SPEED_10G_82599: 656 *speed = IXGBE_LINK_SPEED_10GB_FULL; 657 if (hw->mac.type >= ixgbe_mac_X550) { 658 if (links_reg & IXGBE_LINKS_SPEED_NON_STD) 659 *speed = IXGBE_LINK_SPEED_2_5GB_FULL; 660 } 661 break; 662 case IXGBE_LINKS_SPEED_1G_82599: 663 *speed = IXGBE_LINK_SPEED_1GB_FULL; 664 break; 665 case IXGBE_LINKS_SPEED_100_82599: 666 *speed = IXGBE_LINK_SPEED_100_FULL; 667 if (hw->mac.type >= ixgbe_mac_X550) { 668 if (links_reg & IXGBE_LINKS_SPEED_NON_STD) 669 *speed = IXGBE_LINK_SPEED_5GB_FULL; 670 } 671 break; 672 case IXGBE_LINKS_SPEED_10_X550EM_A: 673 *speed = IXGBE_LINK_SPEED_UNKNOWN; 674 /* Since Reserved in older MAC's */ 675 if (hw->mac.type >= ixgbe_mac_X550) 676 *speed = IXGBE_LINK_SPEED_10_FULL; 677 break; 678 default: 679 *speed = IXGBE_LINK_SPEED_UNKNOWN; 680 } 681 682 /* if the read failed it could just be a mailbox collision, best wait 683 * until we are called again and don't report an error 684 */ 685 if (mbx->ops.read(hw, &in_msg, 1, 0)) 686 goto out; 687 688 if (!(in_msg & IXGBE_VT_MSGTYPE_CTS)) { 689 /* msg is not CTS and is NACK we must have lost CTS status */ 690 if (in_msg & IXGBE_VT_MSGTYPE_NACK) 691 ret_val = -1; 692 goto out; 693 } 694 695 /* the pf is talking, if we timed out in the past we reinit */ 696 if (!mbx->timeout) { 697 ret_val = -1; 698 goto out; 699 } 700 701 /* if we passed all the tests above then the link is up and we no 702 * longer need to check for link 703 */ 704 mac->get_link_status = FALSE; 705 706 out: 707 *link_up = !mac->get_link_status; 708 return ret_val; 709 } 710 711 /** 712 * ixgbevf_rlpml_set_vf - Set the maximum receive packet length 713 * @hw: pointer to the HW structure 714 * @max_size: value to assign to max frame size 715 **/ 716 s32 ixgbevf_rlpml_set_vf(struct ixgbe_hw *hw, u16 max_size) 717 { 718 u32 msgbuf[2]; 719 s32 retval; 720 721 msgbuf[0] = IXGBE_VF_SET_LPE; 722 msgbuf[1] = max_size; 723 724 retval = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2); 725 if (retval) 726 return retval; 727 if ((msgbuf[0] & IXGBE_VF_SET_LPE) && 728 (msgbuf[0] & IXGBE_VT_MSGTYPE_NACK)) 729 return IXGBE_ERR_MBX; 730 731 return 0; 732 } 733 734 /** 735 * ixgbevf_negotiate_api_version - Negotiate supported API version 736 * @hw: pointer to the HW structure 737 * @api: integer containing requested API version 738 **/ 739 int ixgbevf_negotiate_api_version(struct ixgbe_hw *hw, int api) 740 { 741 int err; 742 u32 msg[3]; 743 744 /* Negotiate the mailbox API version */ 745 msg[0] = IXGBE_VF_API_NEGOTIATE; 746 msg[1] = api; 747 msg[2] = 0; 748 749 err = ixgbevf_write_msg_read_ack(hw, msg, msg, 3); 750 if (!err) { 751 msg[0] &= ~IXGBE_VT_MSGTYPE_CTS; 752 753 /* Store value and return 0 on success */ 754 if (msg[0] == (IXGBE_VF_API_NEGOTIATE | IXGBE_VT_MSGTYPE_ACK)) { 755 hw->api_version = api; 756 return 0; 757 } 758 759 err = IXGBE_ERR_INVALID_ARGUMENT; 760 } 761 762 return err; 763 } 764 765 int ixgbevf_get_queues(struct ixgbe_hw *hw, unsigned int *num_tcs, 766 unsigned int *default_tc) 767 { 768 int err; 769 u32 msg[5]; 770 771 /* do nothing if API doesn't support ixgbevf_get_queues */ 772 switch (hw->api_version) { 773 case ixgbe_mbox_api_11: 774 case ixgbe_mbox_api_12: 775 case ixgbe_mbox_api_13: 776 break; 777 default: 778 return 0; 779 } 780 781 /* Fetch queue configuration from the PF */ 782 msg[0] = IXGBE_VF_GET_QUEUES; 783 msg[1] = msg[2] = msg[3] = msg[4] = 0; 784 785 err = ixgbevf_write_msg_read_ack(hw, msg, msg, 5); 786 if (!err) { 787 msg[0] &= ~IXGBE_VT_MSGTYPE_CTS; 788 789 /* 790 * if we didn't get an ACK there must have been 791 * some sort of mailbox error so we should treat it 792 * as such 793 */ 794 if (msg[0] != (IXGBE_VF_GET_QUEUES | IXGBE_VT_MSGTYPE_ACK)) 795 return IXGBE_ERR_MBX; 796 797 /* record and validate values from message */ 798 hw->mac.max_tx_queues = msg[IXGBE_VF_TX_QUEUES]; 799 if (hw->mac.max_tx_queues == 0 || 800 hw->mac.max_tx_queues > IXGBE_VF_MAX_TX_QUEUES) 801 hw->mac.max_tx_queues = IXGBE_VF_MAX_TX_QUEUES; 802 803 hw->mac.max_rx_queues = msg[IXGBE_VF_RX_QUEUES]; 804 if (hw->mac.max_rx_queues == 0 || 805 hw->mac.max_rx_queues > IXGBE_VF_MAX_RX_QUEUES) 806 hw->mac.max_rx_queues = IXGBE_VF_MAX_RX_QUEUES; 807 808 *num_tcs = msg[IXGBE_VF_TRANS_VLAN]; 809 /* in case of unknown state assume we cannot tag frames */ 810 if (*num_tcs > hw->mac.max_rx_queues) 811 *num_tcs = 1; 812 813 *default_tc = msg[IXGBE_VF_DEF_QUEUE]; 814 /* default to queue 0 on out-of-bounds queue number */ 815 if (*default_tc >= hw->mac.max_tx_queues) 816 *default_tc = 0; 817 } 818 819 return err; 820 } 821