1 /* $NetBSD: ixgbe_vf.c,v 1.31 2021/12/24 05:11:04 msaitoh Exp $ */ 2 3 /****************************************************************************** 4 SPDX-License-Identifier: BSD-3-Clause 5 6 Copyright (c) 2001-2020, Intel Corporation 7 All rights reserved. 8 9 Redistribution and use in source and binary forms, with or without 10 modification, are permitted provided that the following conditions are met: 11 12 1. Redistributions of source code must retain the above copyright notice, 13 this list of conditions and the following disclaimer. 14 15 2. Redistributions in binary form must reproduce the above copyright 16 notice, this list of conditions and the following disclaimer in the 17 documentation and/or other materials provided with the distribution. 18 19 3. Neither the name of the Intel Corporation nor the names of its 20 contributors may be used to endorse or promote products derived from 21 this software without specific prior written permission. 22 23 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 24 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 27 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 POSSIBILITY OF SUCH DAMAGE. 34 35 ******************************************************************************/ 36 /*$FreeBSD: head/sys/dev/ixgbe/ixgbe_vf.c 331224 2018-03-19 20:55:05Z erj $*/ 37 38 #include <sys/cdefs.h> 39 __KERNEL_RCSID(0, "$NetBSD: ixgbe_vf.c,v 1.31 2021/12/24 05:11:04 msaitoh Exp $"); 40 41 #include "ixgbe_api.h" 42 #include "ixgbe_type.h" 43 #include "ixgbe_vf.h" 44 45 #ifndef IXGBE_VFWRITE_REG 46 #define IXGBE_VFWRITE_REG IXGBE_WRITE_REG 47 #endif 48 #ifndef IXGBE_VFREAD_REG 49 #define IXGBE_VFREAD_REG IXGBE_READ_REG 50 #endif 51 52 /** 53 * ixgbe_init_ops_vf - Initialize the pointers for vf 54 * @hw: pointer to hardware structure 55 * 56 * This will assign function pointers, adapter-specific functions can 57 * override the assignment of generic function pointers by assigning 58 * their own adapter-specific function pointers. 59 * Does not touch the hardware. 60 **/ 61 s32 ixgbe_init_ops_vf(struct ixgbe_hw *hw) 62 { 63 u16 i; 64 65 /* MAC */ 66 hw->mac.ops.init_hw = ixgbe_init_hw_vf; 67 hw->mac.ops.reset_hw = ixgbe_reset_hw_vf; 68 hw->mac.ops.start_hw = ixgbe_start_hw_vf; 69 /* Cannot clear stats on VF */ 70 hw->mac.ops.clear_hw_cntrs = NULL; 71 hw->mac.ops.get_media_type = NULL; 72 hw->mac.ops.get_mac_addr = ixgbe_get_mac_addr_vf; 73 hw->mac.ops.stop_adapter = ixgbe_stop_adapter_vf; 74 hw->mac.ops.get_bus_info = NULL; 75 hw->mac.ops.negotiate_api_version = ixgbevf_negotiate_api_version; 76 77 /* Link */ 78 hw->mac.ops.setup_link = ixgbe_setup_mac_link_vf; 79 hw->mac.ops.check_link = ixgbe_check_mac_link_vf; 80 hw->mac.ops.get_link_capabilities = NULL; 81 82 /* RAR, Multicast, VLAN */ 83 hw->mac.ops.set_rar = ixgbe_set_rar_vf; 84 hw->mac.ops.set_uc_addr = ixgbevf_set_uc_addr_vf; 85 hw->mac.ops.init_rx_addrs = NULL; 86 hw->mac.ops.update_mc_addr_list = ixgbe_update_mc_addr_list_vf; 87 hw->mac.ops.update_xcast_mode = ixgbevf_update_xcast_mode; 88 hw->mac.ops.enable_mc = NULL; 89 hw->mac.ops.disable_mc = NULL; 90 hw->mac.ops.clear_vfta = NULL; 91 hw->mac.ops.set_vfta = ixgbe_set_vfta_vf; 92 hw->mac.ops.set_rlpml = ixgbevf_rlpml_set_vf; 93 94 hw->mac.max_tx_queues = 1; 95 hw->mac.max_rx_queues = 1; 96 97 for (i = 0; i < 64; i++) 98 hw->mbx.ops[i].init_params = ixgbe_init_mbx_params_vf; 99 100 return IXGBE_SUCCESS; 101 } 102 103 /* ixgbe_virt_clr_reg - Set register to default (power on) state. 104 * @hw: pointer to hardware structure 105 */ 106 static void ixgbe_virt_clr_reg(struct ixgbe_hw *hw) 107 { 108 int i; 109 u32 vfsrrctl; 110 u32 vfdca_rxctrl; 111 u32 vfdca_txctrl; 112 113 /* VRSRRCTL default values (BSIZEPACKET = 2048, BSIZEHEADER = 256) */ 114 vfsrrctl = 0x100 << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT; 115 vfsrrctl |= 0x800 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT; 116 117 /* DCA_RXCTRL default value */ 118 vfdca_rxctrl = IXGBE_DCA_RXCTRL_DESC_RRO_EN | 119 IXGBE_DCA_RXCTRL_DATA_WRO_EN | 120 IXGBE_DCA_RXCTRL_HEAD_WRO_EN; 121 122 /* DCA_TXCTRL default value */ 123 vfdca_txctrl = IXGBE_DCA_TXCTRL_DESC_RRO_EN | 124 IXGBE_DCA_TXCTRL_DESC_WRO_EN | 125 IXGBE_DCA_TXCTRL_DATA_RRO_EN; 126 127 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0); 128 129 KASSERT(IXGBE_VF_MAX_TX_QUEUES == IXGBE_VF_MAX_RX_QUEUES); 130 for (i = 0; i < IXGBE_VF_MAX_TX_QUEUES; i++) { 131 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(i), 0); 132 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(i), 0); 133 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(i), 0); 134 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(i), vfsrrctl); 135 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(i), 0); 136 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(i), 0); 137 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(i), 0); 138 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAH(i), 0); 139 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAL(i), 0); 140 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(i), vfdca_rxctrl); 141 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(i), vfdca_txctrl); 142 } 143 144 IXGBE_WRITE_FLUSH(hw); 145 } 146 147 /** 148 * ixgbe_start_hw_vf - Prepare hardware for Tx/Rx 149 * @hw: pointer to hardware structure 150 * 151 * Starts the hardware by filling the bus info structure and media type, clears 152 * all on chip counters, initializes receive address registers, multicast 153 * table, VLAN filter table, calls routine to set up link and flow control 154 * settings, and leaves transmit and receive units disabled and uninitialized 155 **/ 156 s32 ixgbe_start_hw_vf(struct ixgbe_hw *hw) 157 { 158 /* Clear adapter stopped flag */ 159 hw->adapter_stopped = FALSE; 160 161 return IXGBE_SUCCESS; 162 } 163 164 /** 165 * ixgbe_init_hw_vf - virtual function hardware initialization 166 * @hw: pointer to hardware structure 167 * 168 * Initialize the hardware by resetting the hardware and then starting 169 * the hardware 170 **/ 171 s32 ixgbe_init_hw_vf(struct ixgbe_hw *hw) 172 { 173 s32 status = hw->mac.ops.start_hw(hw); 174 175 hw->mac.ops.get_mac_addr(hw, hw->mac.addr); 176 177 return status; 178 } 179 180 /** 181 * ixgbe_reset_hw_vf - Performs hardware reset 182 * @hw: pointer to hardware structure 183 * 184 * Resets the hardware by resetting the transmit and receive units, masks and 185 * clears all interrupts. 186 **/ 187 s32 ixgbe_reset_hw_vf(struct ixgbe_hw *hw) 188 { 189 struct ixgbe_mbx_info *mbx = &hw->mbx; 190 u32 timeout = IXGBE_VF_INIT_TIMEOUT; 191 s32 ret_val = IXGBE_ERR_INVALID_MAC_ADDR; 192 u32 msgbuf[IXGBE_VF_PERMADDR_MSG_LEN]; 193 u8 *addr = (u8 *)(&msgbuf[1]); 194 195 DEBUGFUNC("ixgbevf_reset_hw_vf"); 196 197 /* Call adapter stop to disable tx/rx and clear interrupts */ 198 hw->mac.ops.stop_adapter(hw); 199 200 /* reset the api version */ 201 hw->api_version = ixgbe_mbox_api_10; 202 ixgbe_init_mbx_params_vf(hw); 203 204 DEBUGOUT("Issuing a function level reset to MAC\n"); 205 206 IXGBE_VFWRITE_REG(hw, IXGBE_VFCTRL, IXGBE_CTRL_RST); 207 IXGBE_WRITE_FLUSH(hw); 208 209 msec_delay(50); 210 211 /* we cannot reset while the RSTI / RSTD bits are asserted */ 212 while (!mbx->ops[0].check_for_rst(hw, 0) && timeout) { 213 timeout--; 214 usec_delay(5); 215 } 216 217 if (!timeout) 218 return IXGBE_ERR_RESET_FAILED; 219 220 /* Reset VF registers to initial values */ 221 ixgbe_virt_clr_reg(hw); 222 223 /* mailbox timeout can now become active */ 224 mbx->timeout = IXGBE_VF_MBX_INIT_TIMEOUT; 225 226 msgbuf[0] = IXGBE_VF_RESET; 227 ixgbe_write_mbx(hw, msgbuf, 1, 0); 228 229 msec_delay(10); 230 231 /* 232 * set our "perm_addr" based on info provided by PF 233 * also set up the mc_filter_type which is piggy backed 234 * on the mac address in word 3 235 */ 236 ret_val = ixgbe_poll_mbx(hw, msgbuf, 237 IXGBE_VF_PERMADDR_MSG_LEN, 0); 238 if (ret_val) 239 return ret_val; 240 241 if (msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_SUCCESS) && 242 msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_FAILURE)) 243 return IXGBE_ERR_INVALID_MAC_ADDR; 244 245 if (msgbuf[0] == (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_SUCCESS)) 246 memcpy(hw->mac.perm_addr, addr, IXGBE_ETH_LENGTH_OF_ADDRESS); 247 248 hw->mac.mc_filter_type = msgbuf[IXGBE_VF_MC_TYPE_WORD]; 249 250 return ret_val; 251 } 252 253 /** 254 * ixgbe_stop_adapter_vf - Generic stop Tx/Rx units 255 * @hw: pointer to hardware structure 256 * 257 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts, 258 * disables transmit and receive units. The adapter_stopped flag is used by 259 * the shared code and drivers to determine if the adapter is in a stopped 260 * state and should not touch the hardware. 261 **/ 262 s32 ixgbe_stop_adapter_vf(struct ixgbe_hw *hw) 263 { 264 u32 reg_val; 265 u16 i; 266 267 /* 268 * Set the adapter_stopped flag so other driver functions stop touching 269 * the hardware 270 */ 271 hw->adapter_stopped = TRUE; 272 273 /* Clear interrupt mask to stop from interrupts being generated */ 274 IXGBE_VFWRITE_REG(hw, IXGBE_VTEIMC, IXGBE_VF_IRQ_CLEAR_MASK); 275 276 /* Clear any pending interrupts, flush previous writes */ 277 IXGBE_VFREAD_REG(hw, IXGBE_VTEICR); 278 279 /* Disable the transmit unit. Each queue must be disabled. */ 280 for (i = 0; i < hw->mac.max_tx_queues; i++) 281 IXGBE_VFWRITE_REG(hw, IXGBE_VFTXDCTL(i), IXGBE_TXDCTL_SWFLSH); 282 283 /* Disable the receive unit by stopping each queue */ 284 for (i = 0; i < hw->mac.max_rx_queues; i++) { 285 reg_val = IXGBE_VFREAD_REG(hw, IXGBE_VFRXDCTL(i)); 286 reg_val &= ~IXGBE_RXDCTL_ENABLE; 287 IXGBE_VFWRITE_REG(hw, IXGBE_VFRXDCTL(i), reg_val); 288 } 289 /* Clear packet split and pool config */ 290 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0); 291 292 /* flush all queues disables */ 293 IXGBE_WRITE_FLUSH(hw); 294 msec_delay(2); 295 296 return IXGBE_SUCCESS; 297 } 298 299 /** 300 * ixgbe_mta_vector - Determines bit-vector in multicast table to set 301 * @hw: pointer to hardware structure 302 * @mc_addr: the multicast address 303 * 304 * Extracts the 12 bits, from a multicast address, to determine which 305 * bit-vector to set in the multicast table. The hardware uses 12 bits, from 306 * incoming rx multicast addresses, to determine the bit-vector to check in 307 * the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set 308 * by the MO field of the MCSTCTRL. The MO field is set during initialization 309 * to mc_filter_type. 310 **/ 311 static s32 ixgbe_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr) 312 { 313 u32 vector = 0; 314 315 switch (hw->mac.mc_filter_type) { 316 case 0: /* use bits [47:36] of the address */ 317 vector = ((mc_addr[4] >> 4) | (((u16)mc_addr[5]) << 4)); 318 break; 319 case 1: /* use bits [46:35] of the address */ 320 vector = ((mc_addr[4] >> 3) | (((u16)mc_addr[5]) << 5)); 321 break; 322 case 2: /* use bits [45:34] of the address */ 323 vector = ((mc_addr[4] >> 2) | (((u16)mc_addr[5]) << 6)); 324 break; 325 case 3: /* use bits [43:32] of the address */ 326 vector = ((mc_addr[4]) | (((u16)mc_addr[5]) << 8)); 327 break; 328 default: /* Invalid mc_filter_type */ 329 DEBUGOUT("MC filter type param set incorrectly\n"); 330 ASSERT(0); 331 break; 332 } 333 334 /* vector can only be 12-bits or boundary will be exceeded */ 335 vector &= 0xFFF; 336 return vector; 337 } 338 339 static s32 ixgbevf_write_msg_read_ack(struct ixgbe_hw *hw, u32 *msg, 340 u32 *retmsg, u16 size) 341 { 342 s32 retval = ixgbe_write_mbx(hw, msg, size, 0); 343 344 if (retval) 345 return retval; 346 347 return ixgbe_poll_mbx(hw, retmsg, size, 0); 348 } 349 350 /** 351 * ixgbe_set_rar_vf - set device MAC address 352 * @hw: pointer to hardware structure 353 * @index: Receive address register to write 354 * @addr: Address to put into receive address register 355 * @vmdq: VMDq "set" or "pool" index 356 * @enable_addr: set flag that address is active 357 **/ 358 s32 ixgbe_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq, 359 u32 enable_addr) 360 { 361 u32 msgbuf[3]; 362 u8 *msg_addr = (u8 *)(&msgbuf[1]); 363 s32 ret_val; 364 UNREFERENCED_3PARAMETER(vmdq, enable_addr, index); 365 366 memset(msgbuf, 0, 12); 367 msgbuf[0] = IXGBE_VF_SET_MAC_ADDR; 368 memcpy(msg_addr, addr, 6); 369 ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 3); 370 371 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS; 372 373 /* if nacked the address was rejected, use "perm_addr" */ 374 if (!ret_val && 375 (msgbuf[0] == (IXGBE_VF_SET_MAC_ADDR | IXGBE_VT_MSGTYPE_FAILURE))) { 376 ixgbe_get_mac_addr_vf(hw, hw->mac.addr); 377 return IXGBE_ERR_MBX; 378 } 379 380 return ret_val; 381 } 382 383 /** 384 * ixgbe_update_mc_addr_list_vf - Update Multicast addresses 385 * @hw: pointer to the HW structure 386 * @mc_addr_list: array of multicast addresses to program 387 * @mc_addr_count: number of multicast addresses to program 388 * @next: caller supplied function to return next address in list 389 * @clear: unused 390 * 391 * Updates the Multicast Table Array. 392 **/ 393 s32 ixgbe_update_mc_addr_list_vf(struct ixgbe_hw *hw, u8 *mc_addr_list, 394 u32 mc_addr_count, ixgbe_mc_addr_itr next, 395 bool clear) 396 { 397 u32 msgbuf[IXGBE_VFMAILBOX_SIZE]; 398 u16 *vector_list = (u16 *)&msgbuf[1]; 399 u32 vector; 400 u32 cnt, i; 401 u32 vmdq; 402 403 UNREFERENCED_1PARAMETER(clear); 404 405 DEBUGFUNC("ixgbe_update_mc_addr_list_vf"); 406 407 /* Each entry in the list uses 1 16 bit word. We have 30 408 * 16 bit words available in our HW msg buffer (minus 1 for the 409 * msg type). That's 30 hash values if we pack 'em right. If 410 * there are more than 30 MC addresses to add then punt the 411 * extras for now and then add code to handle more than 30 later. 412 * It would be unusual for a server to request that many multi-cast 413 * addresses except for in large enterprise network environments. 414 */ 415 416 DEBUGOUT1("MC Addr Count = %d\n", mc_addr_count); 417 418 if (mc_addr_count > IXGBE_MAX_VF_MC) { 419 device_printf(ixgbe_dev_from_hw(hw), 420 "number of Ethernet multicast addresses exceeded " 421 "the limit (%u > %d)\n", mc_addr_count, IXGBE_MAX_VF_MC); 422 cnt = IXGBE_MAX_VF_MC; 423 } else 424 cnt = mc_addr_count; 425 msgbuf[0] = IXGBE_VF_SET_MULTICAST; 426 msgbuf[0] |= cnt << IXGBE_VT_MSGINFO_SHIFT; 427 428 for (i = 0; i < cnt; i++) { 429 vector = ixgbe_mta_vector(hw, next(hw, &mc_addr_list, &vmdq)); 430 DEBUGOUT1("Hash value = 0x%03X\n", vector); 431 vector_list[i] = (u16)vector; 432 } 433 return ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 434 IXGBE_VFMAILBOX_SIZE); 435 } 436 437 /** 438 * ixgbevf_update_xcast_mode - Update Multicast mode 439 * @hw: pointer to the HW structure 440 * @xcast_mode: new multicast mode 441 * 442 * Updates the Multicast Mode of VF. 443 **/ 444 s32 ixgbevf_update_xcast_mode(struct ixgbe_hw *hw, int xcast_mode) 445 { 446 u32 msgbuf[2]; 447 s32 err; 448 449 switch (hw->api_version) { 450 case ixgbe_mbox_api_12: 451 /* New modes were introduced in 1.3 version */ 452 if (xcast_mode > IXGBEVF_XCAST_MODE_ALLMULTI) 453 return IXGBE_ERR_FEATURE_NOT_SUPPORTED; 454 /* Fall through */ 455 case ixgbe_mbox_api_13: 456 case ixgbe_mbox_api_15: 457 break; 458 default: 459 return IXGBE_ERR_FEATURE_NOT_SUPPORTED; 460 } 461 462 msgbuf[0] = IXGBE_VF_UPDATE_XCAST_MODE; 463 msgbuf[1] = xcast_mode; 464 465 err = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2); 466 if (err) 467 return err; 468 469 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS; 470 if (msgbuf[0] == 471 (IXGBE_VF_UPDATE_XCAST_MODE | IXGBE_VT_MSGTYPE_FAILURE)) { 472 if (xcast_mode == IXGBEVF_XCAST_MODE_PROMISC) { 473 /* 474 * If the API version matched and the reply was NACK, 475 * assume the PF was not in PROMISC mode. 476 */ 477 return IXGBE_ERR_NOT_IN_PROMISC; 478 } else 479 return IXGBE_ERR_FEATURE_NOT_SUPPORTED; 480 } 481 /* 482 * On linux's PF driver implementation, the PF replies VF's 483 * XCAST_MODE_ALLMULTI message not with NACK but with ACK even if the 484 * virtual function is NOT marked "trust" and act as 485 * XCAST_MODE_"MULTI". If ixv(4) simply check the return value of 486 * update_xcast_mode(XCAST_MODE_ALLMULTI), SIOCSADDMULTI success and 487 * the user may have trouble with some addresses. Fortunately, the 488 * Linux's PF driver's "ACK" message has not XCAST_MODE_"ALL"MULTI but 489 * XCAST_MODE_MULTI, so we can check this state by checking if the 490 * send message's argument and the reply message's argument are 491 * different. 492 */ 493 if ((xcast_mode > IXGBEVF_XCAST_MODE_MULTI) 494 && (xcast_mode != msgbuf[1])) 495 return IXGBE_ERR_NOT_TRUSTED; 496 return IXGBE_SUCCESS; 497 } 498 499 /** 500 * ixgbe_set_vfta_vf - Set/Unset vlan filter table address 501 * @hw: pointer to the HW structure 502 * @vlan: 12 bit VLAN ID 503 * @vind: unused by VF drivers 504 * @vlan_on: if TRUE then set bit, else clear bit 505 * @vlvf_bypass: boolean flag indicating updating default pool is okay 506 * 507 * Turn on/off specified VLAN in the VLAN filter table. 508 **/ 509 s32 ixgbe_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind, 510 bool vlan_on, bool vlvf_bypass) 511 { 512 u32 msgbuf[2]; 513 s32 ret_val; 514 UNREFERENCED_2PARAMETER(vind, vlvf_bypass); 515 516 msgbuf[0] = IXGBE_VF_SET_VLAN; 517 msgbuf[1] = vlan; 518 /* Setting the 8 bit field MSG INFO to TRUE indicates "add" */ 519 msgbuf[0] |= (u32)vlan_on << IXGBE_VT_MSGINFO_SHIFT; 520 521 ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2); 522 if (!ret_val && (msgbuf[0] & IXGBE_VT_MSGTYPE_SUCCESS)) 523 return IXGBE_SUCCESS; 524 525 return ret_val | (msgbuf[0] & IXGBE_VT_MSGTYPE_FAILURE); 526 } 527 528 /** 529 * ixgbe_get_num_of_tx_queues_vf - Get number of TX queues 530 * @hw: pointer to hardware structure 531 * 532 * Returns the number of transmit queues for the given adapter. 533 **/ 534 u32 ixgbe_get_num_of_tx_queues_vf(struct ixgbe_hw *hw) 535 { 536 UNREFERENCED_1PARAMETER(hw); 537 return IXGBE_VF_MAX_TX_QUEUES; 538 } 539 540 /** 541 * ixgbe_get_num_of_rx_queues_vf - Get number of RX queues 542 * @hw: pointer to hardware structure 543 * 544 * Returns the number of receive queues for the given adapter. 545 **/ 546 u32 ixgbe_get_num_of_rx_queues_vf(struct ixgbe_hw *hw) 547 { 548 UNREFERENCED_1PARAMETER(hw); 549 return IXGBE_VF_MAX_RX_QUEUES; 550 } 551 552 /** 553 * ixgbe_get_mac_addr_vf - Read device MAC address 554 * @hw: pointer to the HW structure 555 * @mac_addr: the MAC address 556 **/ 557 s32 ixgbe_get_mac_addr_vf(struct ixgbe_hw *hw, u8 *mac_addr) 558 { 559 int i; 560 561 for (i = 0; i < IXGBE_ETH_LENGTH_OF_ADDRESS; i++) 562 mac_addr[i] = hw->mac.perm_addr[i]; 563 564 return IXGBE_SUCCESS; 565 } 566 567 s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr) 568 { 569 u32 msgbuf[3], msgbuf_chk; 570 u8 *msg_addr = (u8 *)(&msgbuf[1]); 571 s32 ret_val; 572 573 memset(msgbuf, 0, sizeof(msgbuf)); 574 /* 575 * If index is one then this is the start of a new list and needs 576 * indication to the PF so it can do it's own list management. 577 * If it is zero then that tells the PF to just clear all of 578 * this VF's macvlans and there is no new list. 579 */ 580 msgbuf[0] |= index << IXGBE_VT_MSGINFO_SHIFT; 581 msgbuf[0] |= IXGBE_VF_SET_MACVLAN; 582 msgbuf_chk = msgbuf[0]; 583 if (addr) 584 memcpy(msg_addr, addr, 6); 585 586 ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 3); 587 if (!ret_val) { 588 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS; 589 590 if (msgbuf[0] == (msgbuf_chk | IXGBE_VT_MSGTYPE_FAILURE)) 591 return IXGBE_ERR_OUT_OF_MEM; 592 } 593 594 return ret_val; 595 } 596 597 /** 598 * ixgbe_setup_mac_link_vf - Setup MAC link settings 599 * @hw: pointer to hardware structure 600 * @speed: new link speed 601 * @autoneg_wait_to_complete: TRUE when waiting for completion is needed 602 * 603 * Set the link speed in the AUTOC register and restarts link. 604 **/ 605 s32 ixgbe_setup_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed speed, 606 bool autoneg_wait_to_complete) 607 { 608 UNREFERENCED_3PARAMETER(hw, speed, autoneg_wait_to_complete); 609 return IXGBE_SUCCESS; 610 } 611 612 /** 613 * ixgbe_check_mac_link_vf - Get link/speed status 614 * @hw: pointer to hardware structure 615 * @speed: pointer to link speed 616 * @link_up: TRUE is link is up, FALSE otherwise 617 * @autoneg_wait_to_complete: TRUE when waiting for completion is needed 618 * 619 * Reads the links register to determine if link is up and the current speed 620 **/ 621 s32 ixgbe_check_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 622 bool *link_up, bool autoneg_wait_to_complete) 623 { 624 struct ixgbe_mbx_info *mbx = &hw->mbx; 625 struct ixgbe_mac_info *mac = &hw->mac; 626 s32 ret_val = IXGBE_SUCCESS; 627 u32 links_reg; 628 UNREFERENCED_1PARAMETER(autoneg_wait_to_complete); 629 630 /* If we were hit with a reset drop the link */ 631 if (!mbx->ops[0].check_for_rst(hw, 0) || !mbx->timeout) 632 mac->get_link_status = TRUE; 633 634 if (!mac->get_link_status) 635 goto out; 636 637 /* if link status is down no point in checking to see if pf is up */ 638 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS); 639 if (!(links_reg & IXGBE_LINKS_UP)) 640 goto out; 641 642 /* for SFP+ modules and DA cables on 82599 it can take up to 500usecs 643 * before the link status is correct 644 */ 645 if (mac->type == ixgbe_mac_82599_vf) { 646 int i; 647 648 for (i = 0; i < 5; i++) { 649 usec_delay(100); 650 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS); 651 652 if (!(links_reg & IXGBE_LINKS_UP)) 653 goto out; 654 } 655 } 656 657 switch (links_reg & IXGBE_LINKS_SPEED_82599) { 658 case IXGBE_LINKS_SPEED_10G_82599: 659 *speed = IXGBE_LINK_SPEED_10GB_FULL; 660 if (hw->mac.type >= ixgbe_mac_X550_vf) { 661 if (links_reg & IXGBE_LINKS_SPEED_NON_STD) 662 *speed = IXGBE_LINK_SPEED_2_5GB_FULL; 663 } 664 break; 665 case IXGBE_LINKS_SPEED_1G_82599: 666 *speed = IXGBE_LINK_SPEED_1GB_FULL; 667 break; 668 case IXGBE_LINKS_SPEED_100_82599: 669 *speed = IXGBE_LINK_SPEED_100_FULL; 670 if (hw->mac.type >= ixgbe_mac_X550_vf) { 671 if (links_reg & IXGBE_LINKS_SPEED_NON_STD) 672 *speed = IXGBE_LINK_SPEED_5GB_FULL; 673 } 674 break; 675 case IXGBE_LINKS_SPEED_10_X550EM_A: 676 *speed = IXGBE_LINK_SPEED_UNKNOWN; 677 /* Since Reserved in older MAC's */ 678 if (hw->mac.type >= ixgbe_mac_X550_vf) 679 *speed = IXGBE_LINK_SPEED_10_FULL; 680 break; 681 default: 682 *speed = IXGBE_LINK_SPEED_UNKNOWN; 683 } 684 685 if (hw->api_version < ixgbe_mbox_api_15) { 686 u32 in_msg = 0; 687 688 /* if the read failed it could just be a mailbox collision, best wait 689 * until we are called again and don't report an error 690 */ 691 if (ixgbe_read_mbx(hw, &in_msg, 1, 0)) 692 goto out; 693 694 if (!(in_msg & IXGBE_VT_MSGTYPE_CTS)) { 695 /* msg is not CTS and is NACK we must have lost CTS status */ 696 if (in_msg & IXGBE_VT_MSGTYPE_FAILURE) 697 ret_val = IXGBE_ERR_MBX; 698 goto out; 699 } 700 701 /* the pf is talking, if we timed out in the past we reinit */ 702 if (!mbx->timeout) { 703 ret_val = IXGBE_ERR_TIMEOUT; 704 goto out; 705 } 706 } 707 708 /* if we passed all the tests above then the link is up and we no 709 * longer need to check for link 710 */ 711 mac->get_link_status = FALSE; 712 713 out: 714 *link_up = !mac->get_link_status; 715 return ret_val; 716 } 717 718 /** 719 * ixgbevf_rlpml_set_vf - Set the maximum receive packet length 720 * @hw: pointer to the HW structure 721 * @max_size: value to assign to max frame size 722 **/ 723 s32 ixgbevf_rlpml_set_vf(struct ixgbe_hw *hw, u16 max_size) 724 { 725 u32 msgbuf[2]; 726 s32 retval; 727 728 msgbuf[0] = IXGBE_VF_SET_LPE; 729 msgbuf[1] = max_size; 730 731 retval = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2); 732 if (retval) 733 return retval; 734 if ((msgbuf[0] & IXGBE_VF_SET_LPE) && 735 (msgbuf[0] & IXGBE_VT_MSGTYPE_FAILURE)) 736 return IXGBE_ERR_MBX; 737 738 return 0; 739 } 740 741 /** 742 * ixgbevf_negotiate_api_version - Negotiate supported API version 743 * @hw: pointer to the HW structure 744 * @api: integer containing requested API version 745 **/ 746 int ixgbevf_negotiate_api_version(struct ixgbe_hw *hw, int api) 747 { 748 int err; 749 u32 msg[3]; 750 751 /* Negotiate the mailbox API version */ 752 msg[0] = IXGBE_VF_API_NEGOTIATE; 753 msg[1] = api; 754 msg[2] = 0; 755 756 err = ixgbevf_write_msg_read_ack(hw, msg, msg, 3); 757 if (!err) { 758 msg[0] &= ~IXGBE_VT_MSGTYPE_CTS; 759 760 /* Store value and return 0 on success */ 761 if (msg[0] == (IXGBE_VF_API_NEGOTIATE | IXGBE_VT_MSGTYPE_SUCCESS)) { 762 hw->api_version = api; 763 return 0; 764 } 765 766 err = IXGBE_ERR_INVALID_ARGUMENT; 767 } 768 769 return err; 770 } 771 772 int ixgbevf_get_queues(struct ixgbe_hw *hw, unsigned int *num_tcs, 773 unsigned int *default_tc) 774 { 775 int err; 776 u32 msg[5]; 777 778 /* do nothing if API doesn't support ixgbevf_get_queues */ 779 switch (hw->api_version) { 780 case ixgbe_mbox_api_11: 781 case ixgbe_mbox_api_12: 782 case ixgbe_mbox_api_13: 783 case ixgbe_mbox_api_15: 784 break; 785 default: 786 return 0; 787 } 788 789 /* Fetch queue configuration from the PF */ 790 msg[0] = IXGBE_VF_GET_QUEUES; 791 msg[1] = msg[2] = msg[3] = msg[4] = 0; 792 793 err = ixgbevf_write_msg_read_ack(hw, msg, msg, 5); 794 if (!err) { 795 msg[0] &= ~IXGBE_VT_MSGTYPE_CTS; 796 797 /* 798 * if we didn't get a SUCCESS there must have been 799 * some sort of mailbox error so we should treat it 800 * as such 801 */ 802 if (msg[0] != (IXGBE_VF_GET_QUEUES | IXGBE_VT_MSGTYPE_SUCCESS)) 803 return IXGBE_ERR_MBX; 804 805 /* record and validate values from message */ 806 hw->mac.max_tx_queues = msg[IXGBE_VF_TX_QUEUES]; 807 if (hw->mac.max_tx_queues == 0 || 808 hw->mac.max_tx_queues > IXGBE_VF_MAX_TX_QUEUES) 809 hw->mac.max_tx_queues = IXGBE_VF_MAX_TX_QUEUES; 810 811 hw->mac.max_rx_queues = msg[IXGBE_VF_RX_QUEUES]; 812 if (hw->mac.max_rx_queues == 0 || 813 hw->mac.max_rx_queues > IXGBE_VF_MAX_RX_QUEUES) 814 hw->mac.max_rx_queues = IXGBE_VF_MAX_RX_QUEUES; 815 816 *num_tcs = msg[IXGBE_VF_TRANS_VLAN]; 817 /* in case of unknown state assume we cannot tag frames */ 818 if (*num_tcs > hw->mac.max_rx_queues) 819 *num_tcs = 1; 820 821 *default_tc = msg[IXGBE_VF_DEF_QUEUE]; 822 /* default to queue 0 on out-of-bounds queue number */ 823 if (*default_tc >= hw->mac.max_tx_queues) 824 *default_tc = 0; 825 } 826 827 return err; 828 } 829