1 /* $NetBSD: ixgbe_vf.c,v 1.17 2018/04/04 08:59:22 msaitoh Exp $ */ 2 3 /****************************************************************************** 4 SPDX-License-Identifier: BSD-3-Clause 5 6 Copyright (c) 2001-2017, Intel Corporation 7 All rights reserved. 8 9 Redistribution and use in source and binary forms, with or without 10 modification, are permitted provided that the following conditions are met: 11 12 1. Redistributions of source code must retain the above copyright notice, 13 this list of conditions and the following disclaimer. 14 15 2. Redistributions in binary form must reproduce the above copyright 16 notice, this list of conditions and the following disclaimer in the 17 documentation and/or other materials provided with the distribution. 18 19 3. Neither the name of the Intel Corporation nor the names of its 20 contributors may be used to endorse or promote products derived from 21 this software without specific prior written permission. 22 23 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 24 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 27 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 POSSIBILITY OF SUCH DAMAGE. 34 35 ******************************************************************************/ 36 /*$FreeBSD: head/sys/dev/ixgbe/ixgbe_vf.c 331224 2018-03-19 20:55:05Z erj $*/ 37 38 39 #include "ixgbe_api.h" 40 #include "ixgbe_type.h" 41 #include "ixgbe_vf.h" 42 43 #ifndef IXGBE_VFWRITE_REG 44 #define IXGBE_VFWRITE_REG IXGBE_WRITE_REG 45 #endif 46 #ifndef IXGBE_VFREAD_REG 47 #define IXGBE_VFREAD_REG IXGBE_READ_REG 48 #endif 49 50 /** 51 * ixgbe_init_ops_vf - Initialize the pointers for vf 52 * @hw: pointer to hardware structure 53 * 54 * This will assign function pointers, adapter-specific functions can 55 * override the assignment of generic function pointers by assigning 56 * their own adapter-specific function pointers. 57 * Does not touch the hardware. 58 **/ 59 s32 ixgbe_init_ops_vf(struct ixgbe_hw *hw) 60 { 61 /* MAC */ 62 hw->mac.ops.init_hw = ixgbe_init_hw_vf; 63 hw->mac.ops.reset_hw = ixgbe_reset_hw_vf; 64 hw->mac.ops.start_hw = ixgbe_start_hw_vf; 65 /* Cannot clear stats on VF */ 66 hw->mac.ops.clear_hw_cntrs = NULL; 67 hw->mac.ops.get_media_type = NULL; 68 hw->mac.ops.get_mac_addr = ixgbe_get_mac_addr_vf; 69 hw->mac.ops.stop_adapter = ixgbe_stop_adapter_vf; 70 hw->mac.ops.get_bus_info = NULL; 71 hw->mac.ops.negotiate_api_version = ixgbevf_negotiate_api_version; 72 73 /* Link */ 74 hw->mac.ops.setup_link = ixgbe_setup_mac_link_vf; 75 hw->mac.ops.check_link = ixgbe_check_mac_link_vf; 76 hw->mac.ops.get_link_capabilities = NULL; 77 78 /* RAR, Multicast, VLAN */ 79 hw->mac.ops.set_rar = ixgbe_set_rar_vf; 80 hw->mac.ops.set_uc_addr = ixgbevf_set_uc_addr_vf; 81 hw->mac.ops.init_rx_addrs = NULL; 82 hw->mac.ops.update_mc_addr_list = ixgbe_update_mc_addr_list_vf; 83 hw->mac.ops.update_xcast_mode = ixgbevf_update_xcast_mode; 84 hw->mac.ops.enable_mc = NULL; 85 hw->mac.ops.disable_mc = NULL; 86 hw->mac.ops.clear_vfta = NULL; 87 hw->mac.ops.set_vfta = ixgbe_set_vfta_vf; 88 hw->mac.ops.set_rlpml = ixgbevf_rlpml_set_vf; 89 90 hw->mac.max_tx_queues = 1; 91 hw->mac.max_rx_queues = 1; 92 93 hw->mbx.ops.init_params = ixgbe_init_mbx_params_vf; 94 95 return IXGBE_SUCCESS; 96 } 97 98 /* ixgbe_virt_clr_reg - Set register to default (power on) state. 99 * @hw: pointer to hardware structure 100 */ 101 static void ixgbe_virt_clr_reg(struct ixgbe_hw *hw) 102 { 103 int i; 104 u32 vfsrrctl; 105 u32 vfdca_rxctrl; 106 u32 vfdca_txctrl; 107 108 /* VRSRRCTL default values (BSIZEPACKET = 2048, BSIZEHEADER = 256) */ 109 vfsrrctl = 0x100 << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT; 110 vfsrrctl |= 0x800 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT; 111 112 /* DCA_RXCTRL default value */ 113 vfdca_rxctrl = IXGBE_DCA_RXCTRL_DESC_RRO_EN | 114 IXGBE_DCA_RXCTRL_DATA_WRO_EN | 115 IXGBE_DCA_RXCTRL_HEAD_WRO_EN; 116 117 /* DCA_TXCTRL default value */ 118 vfdca_txctrl = IXGBE_DCA_TXCTRL_DESC_RRO_EN | 119 IXGBE_DCA_TXCTRL_DESC_WRO_EN | 120 IXGBE_DCA_TXCTRL_DATA_RRO_EN; 121 122 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0); 123 124 for (i = 0; i < 7; i++) { 125 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(i), 0); 126 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(i), 0); 127 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(i), 0); 128 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(i), vfsrrctl); 129 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(i), 0); 130 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(i), 0); 131 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(i), 0); 132 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAH(i), 0); 133 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAL(i), 0); 134 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(i), vfdca_rxctrl); 135 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(i), vfdca_txctrl); 136 } 137 138 IXGBE_WRITE_FLUSH(hw); 139 } 140 141 /** 142 * ixgbe_start_hw_vf - Prepare hardware for Tx/Rx 143 * @hw: pointer to hardware structure 144 * 145 * Starts the hardware by filling the bus info structure and media type, clears 146 * all on chip counters, initializes receive address registers, multicast 147 * table, VLAN filter table, calls routine to set up link and flow control 148 * settings, and leaves transmit and receive units disabled and uninitialized 149 **/ 150 s32 ixgbe_start_hw_vf(struct ixgbe_hw *hw) 151 { 152 /* Clear adapter stopped flag */ 153 hw->adapter_stopped = FALSE; 154 155 return IXGBE_SUCCESS; 156 } 157 158 /** 159 * ixgbe_init_hw_vf - virtual function hardware initialization 160 * @hw: pointer to hardware structure 161 * 162 * Initialize the hardware by resetting the hardware and then starting 163 * the hardware 164 **/ 165 s32 ixgbe_init_hw_vf(struct ixgbe_hw *hw) 166 { 167 s32 status = hw->mac.ops.start_hw(hw); 168 169 hw->mac.ops.get_mac_addr(hw, hw->mac.addr); 170 171 return status; 172 } 173 174 /** 175 * ixgbe_reset_hw_vf - Performs hardware reset 176 * @hw: pointer to hardware structure 177 * 178 * Resets the hardware by reseting the transmit and receive units, masks and 179 * clears all interrupts. 180 **/ 181 s32 ixgbe_reset_hw_vf(struct ixgbe_hw *hw) 182 { 183 struct ixgbe_mbx_info *mbx = &hw->mbx; 184 u32 timeout = IXGBE_VF_INIT_TIMEOUT; 185 s32 ret_val = IXGBE_ERR_INVALID_MAC_ADDR; 186 u32 msgbuf[IXGBE_VF_PERMADDR_MSG_LEN]; 187 u8 *addr = (u8 *)(&msgbuf[1]); 188 189 DEBUGFUNC("ixgbevf_reset_hw_vf"); 190 191 /* Call adapter stop to disable tx/rx and clear interrupts */ 192 hw->mac.ops.stop_adapter(hw); 193 194 /* reset the api version */ 195 hw->api_version = ixgbe_mbox_api_10; 196 197 DEBUGOUT("Issuing a function level reset to MAC\n"); 198 199 IXGBE_VFWRITE_REG(hw, IXGBE_VFCTRL, IXGBE_CTRL_RST); 200 IXGBE_WRITE_FLUSH(hw); 201 202 msec_delay(50); 203 204 /* we cannot reset while the RSTI / RSTD bits are asserted */ 205 while (!mbx->ops.check_for_rst(hw, 0) && timeout) { 206 timeout--; 207 usec_delay(5); 208 } 209 210 if (!timeout) 211 return IXGBE_ERR_RESET_FAILED; 212 213 /* Reset VF registers to initial values */ 214 ixgbe_virt_clr_reg(hw); 215 216 /* mailbox timeout can now become active */ 217 mbx->timeout = IXGBE_VF_MBX_INIT_TIMEOUT; 218 219 msgbuf[0] = IXGBE_VF_RESET; 220 mbx->ops.write_posted(hw, msgbuf, 1, 0); 221 222 msec_delay(10); 223 224 /* 225 * set our "perm_addr" based on info provided by PF 226 * also set up the mc_filter_type which is piggy backed 227 * on the mac address in word 3 228 */ 229 ret_val = mbx->ops.read_posted(hw, msgbuf, 230 IXGBE_VF_PERMADDR_MSG_LEN, 0); 231 if (ret_val) 232 return ret_val; 233 234 if (msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_ACK) && 235 msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_NACK)) 236 return IXGBE_ERR_INVALID_MAC_ADDR; 237 238 if (msgbuf[0] == (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_ACK)) 239 memcpy(hw->mac.perm_addr, addr, IXGBE_ETH_LENGTH_OF_ADDRESS); 240 241 hw->mac.mc_filter_type = msgbuf[IXGBE_VF_MC_TYPE_WORD]; 242 243 return ret_val; 244 } 245 246 /** 247 * ixgbe_stop_adapter_vf - Generic stop Tx/Rx units 248 * @hw: pointer to hardware structure 249 * 250 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts, 251 * disables transmit and receive units. The adapter_stopped flag is used by 252 * the shared code and drivers to determine if the adapter is in a stopped 253 * state and should not touch the hardware. 254 **/ 255 s32 ixgbe_stop_adapter_vf(struct ixgbe_hw *hw) 256 { 257 u32 reg_val; 258 u16 i; 259 260 /* 261 * Set the adapter_stopped flag so other driver functions stop touching 262 * the hardware 263 */ 264 hw->adapter_stopped = TRUE; 265 266 /* Clear interrupt mask to stop from interrupts being generated */ 267 IXGBE_VFWRITE_REG(hw, IXGBE_VTEIMC, IXGBE_VF_IRQ_CLEAR_MASK); 268 269 /* Clear any pending interrupts, flush previous writes */ 270 IXGBE_VFREAD_REG(hw, IXGBE_VTEICR); 271 272 /* Disable the transmit unit. Each queue must be disabled. */ 273 for (i = 0; i < hw->mac.max_tx_queues; i++) 274 IXGBE_VFWRITE_REG(hw, IXGBE_VFTXDCTL(i), IXGBE_TXDCTL_SWFLSH); 275 276 /* Disable the receive unit by stopping each queue */ 277 for (i = 0; i < hw->mac.max_rx_queues; i++) { 278 reg_val = IXGBE_VFREAD_REG(hw, IXGBE_VFRXDCTL(i)); 279 reg_val &= ~IXGBE_RXDCTL_ENABLE; 280 IXGBE_VFWRITE_REG(hw, IXGBE_VFRXDCTL(i), reg_val); 281 } 282 /* Clear packet split and pool config */ 283 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0); 284 285 /* flush all queues disables */ 286 IXGBE_WRITE_FLUSH(hw); 287 msec_delay(2); 288 289 return IXGBE_SUCCESS; 290 } 291 292 /** 293 * ixgbe_mta_vector - Determines bit-vector in multicast table to set 294 * @hw: pointer to hardware structure 295 * @mc_addr: the multicast address 296 * 297 * Extracts the 12 bits, from a multicast address, to determine which 298 * bit-vector to set in the multicast table. The hardware uses 12 bits, from 299 * incoming rx multicast addresses, to determine the bit-vector to check in 300 * the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set 301 * by the MO field of the MCSTCTRL. The MO field is set during initialization 302 * to mc_filter_type. 303 **/ 304 static s32 ixgbe_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr) 305 { 306 u32 vector = 0; 307 308 switch (hw->mac.mc_filter_type) { 309 case 0: /* use bits [47:36] of the address */ 310 vector = ((mc_addr[4] >> 4) | (((u16)mc_addr[5]) << 4)); 311 break; 312 case 1: /* use bits [46:35] of the address */ 313 vector = ((mc_addr[4] >> 3) | (((u16)mc_addr[5]) << 5)); 314 break; 315 case 2: /* use bits [45:34] of the address */ 316 vector = ((mc_addr[4] >> 2) | (((u16)mc_addr[5]) << 6)); 317 break; 318 case 3: /* use bits [43:32] of the address */ 319 vector = ((mc_addr[4]) | (((u16)mc_addr[5]) << 8)); 320 break; 321 default: /* Invalid mc_filter_type */ 322 DEBUGOUT("MC filter type param set incorrectly\n"); 323 ASSERT(0); 324 break; 325 } 326 327 /* vector can only be 12-bits or boundary will be exceeded */ 328 vector &= 0xFFF; 329 return vector; 330 } 331 332 static s32 ixgbevf_write_msg_read_ack(struct ixgbe_hw *hw, u32 *msg, 333 u32 *retmsg, u16 size) 334 { 335 struct ixgbe_mbx_info *mbx = &hw->mbx; 336 s32 retval = mbx->ops.write_posted(hw, msg, size, 0); 337 338 if (retval) 339 return retval; 340 341 return mbx->ops.read_posted(hw, retmsg, size, 0); 342 } 343 344 /** 345 * ixgbe_set_rar_vf - set device MAC address 346 * @hw: pointer to hardware structure 347 * @index: Receive address register to write 348 * @addr: Address to put into receive address register 349 * @vmdq: VMDq "set" or "pool" index 350 * @enable_addr: set flag that address is active 351 **/ 352 s32 ixgbe_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq, 353 u32 enable_addr) 354 { 355 u32 msgbuf[3]; 356 u8 *msg_addr = (u8 *)(&msgbuf[1]); 357 s32 ret_val; 358 UNREFERENCED_3PARAMETER(vmdq, enable_addr, index); 359 360 memset(msgbuf, 0, 12); 361 msgbuf[0] = IXGBE_VF_SET_MAC_ADDR; 362 memcpy(msg_addr, addr, 6); 363 ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 3); 364 365 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS; 366 367 /* if nacked the address was rejected, use "perm_addr" */ 368 if (!ret_val && 369 (msgbuf[0] == (IXGBE_VF_SET_MAC_ADDR | IXGBE_VT_MSGTYPE_NACK))) { 370 ixgbe_get_mac_addr_vf(hw, hw->mac.addr); 371 return IXGBE_ERR_MBX; 372 } 373 374 return ret_val; 375 } 376 377 /** 378 * ixgbe_update_mc_addr_list_vf - Update Multicast addresses 379 * @hw: pointer to the HW structure 380 * @mc_addr_list: array of multicast addresses to program 381 * @mc_addr_count: number of multicast addresses to program 382 * @next: caller supplied function to return next address in list 383 * @clear: unused 384 * 385 * Updates the Multicast Table Array. 386 **/ 387 s32 ixgbe_update_mc_addr_list_vf(struct ixgbe_hw *hw, u8 *mc_addr_list, 388 u32 mc_addr_count, ixgbe_mc_addr_itr next, 389 bool clear) 390 { 391 struct ixgbe_mbx_info *mbx = &hw->mbx; 392 u32 msgbuf[IXGBE_VFMAILBOX_SIZE]; 393 u16 *vector_list = (u16 *)&msgbuf[1]; 394 u32 vector; 395 u32 cnt, i; 396 u32 vmdq; 397 398 UNREFERENCED_1PARAMETER(clear); 399 400 DEBUGFUNC("ixgbe_update_mc_addr_list_vf"); 401 402 /* Each entry in the list uses 1 16 bit word. We have 30 403 * 16 bit words available in our HW msg buffer (minus 1 for the 404 * msg type). That's 30 hash values if we pack 'em right. If 405 * there are more than 30 MC addresses to add then punt the 406 * extras for now and then add code to handle more than 30 later. 407 * It would be unusual for a server to request that many multi-cast 408 * addresses except for in large enterprise network environments. 409 */ 410 411 DEBUGOUT1("MC Addr Count = %d\n", mc_addr_count); 412 413 cnt = (mc_addr_count > 30) ? 30 : mc_addr_count; 414 msgbuf[0] = IXGBE_VF_SET_MULTICAST; 415 msgbuf[0] |= cnt << IXGBE_VT_MSGINFO_SHIFT; 416 417 for (i = 0; i < cnt; i++) { 418 vector = ixgbe_mta_vector(hw, next(hw, &mc_addr_list, &vmdq)); 419 DEBUGOUT1("Hash value = 0x%03X\n", vector); 420 vector_list[i] = (u16)vector; 421 } 422 423 return mbx->ops.write_posted(hw, msgbuf, IXGBE_VFMAILBOX_SIZE, 0); 424 } 425 426 /** 427 * ixgbevf_update_xcast_mode - Update Multicast mode 428 * @hw: pointer to the HW structure 429 * @xcast_mode: new multicast mode 430 * 431 * Updates the Multicast Mode of VF. 432 **/ 433 s32 ixgbevf_update_xcast_mode(struct ixgbe_hw *hw, int xcast_mode) 434 { 435 u32 msgbuf[2]; 436 s32 err; 437 438 switch (hw->api_version) { 439 case ixgbe_mbox_api_12: 440 /* New modes were introduced in 1.3 version */ 441 if (xcast_mode > IXGBEVF_XCAST_MODE_ALLMULTI) 442 return IXGBE_ERR_FEATURE_NOT_SUPPORTED; 443 /* Fall through */ 444 case ixgbe_mbox_api_13: 445 break; 446 default: 447 return IXGBE_ERR_FEATURE_NOT_SUPPORTED; 448 } 449 450 msgbuf[0] = IXGBE_VF_UPDATE_XCAST_MODE; 451 msgbuf[1] = xcast_mode; 452 453 err = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2); 454 if (err) 455 return err; 456 457 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS; 458 if (msgbuf[0] == (IXGBE_VF_UPDATE_XCAST_MODE | IXGBE_VT_MSGTYPE_NACK)) 459 return IXGBE_ERR_FEATURE_NOT_SUPPORTED; 460 return IXGBE_SUCCESS; 461 } 462 463 /** 464 * ixgbe_set_vfta_vf - Set/Unset vlan filter table address 465 * @hw: pointer to the HW structure 466 * @vlan: 12 bit VLAN ID 467 * @vind: unused by VF drivers 468 * @vlan_on: if TRUE then set bit, else clear bit 469 * @vlvf_bypass: boolean flag indicating updating default pool is okay 470 * 471 * Turn on/off specified VLAN in the VLAN filter table. 472 **/ 473 s32 ixgbe_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind, 474 bool vlan_on, bool vlvf_bypass) 475 { 476 u32 msgbuf[2]; 477 s32 ret_val; 478 UNREFERENCED_2PARAMETER(vind, vlvf_bypass); 479 480 msgbuf[0] = IXGBE_VF_SET_VLAN; 481 msgbuf[1] = vlan; 482 /* Setting the 8 bit field MSG INFO to TRUE indicates "add" */ 483 msgbuf[0] |= (u32)vlan_on << IXGBE_VT_MSGINFO_SHIFT; 484 485 ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2); 486 if (!ret_val && (msgbuf[0] & IXGBE_VT_MSGTYPE_ACK)) 487 return IXGBE_SUCCESS; 488 489 return ret_val | (msgbuf[0] & IXGBE_VT_MSGTYPE_NACK); 490 } 491 492 /** 493 * ixgbe_get_num_of_tx_queues_vf - Get number of TX queues 494 * @hw: pointer to hardware structure 495 * 496 * Returns the number of transmit queues for the given adapter. 497 **/ 498 u32 ixgbe_get_num_of_tx_queues_vf(struct ixgbe_hw *hw) 499 { 500 UNREFERENCED_1PARAMETER(hw); 501 return IXGBE_VF_MAX_TX_QUEUES; 502 } 503 504 /** 505 * ixgbe_get_num_of_rx_queues_vf - Get number of RX queues 506 * @hw: pointer to hardware structure 507 * 508 * Returns the number of receive queues for the given adapter. 509 **/ 510 u32 ixgbe_get_num_of_rx_queues_vf(struct ixgbe_hw *hw) 511 { 512 UNREFERENCED_1PARAMETER(hw); 513 return IXGBE_VF_MAX_RX_QUEUES; 514 } 515 516 /** 517 * ixgbe_get_mac_addr_vf - Read device MAC address 518 * @hw: pointer to the HW structure 519 * @mac_addr: the MAC address 520 **/ 521 s32 ixgbe_get_mac_addr_vf(struct ixgbe_hw *hw, u8 *mac_addr) 522 { 523 int i; 524 525 for (i = 0; i < IXGBE_ETH_LENGTH_OF_ADDRESS; i++) 526 mac_addr[i] = hw->mac.perm_addr[i]; 527 528 return IXGBE_SUCCESS; 529 } 530 531 s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr) 532 { 533 u32 msgbuf[3], msgbuf_chk; 534 u8 *msg_addr = (u8 *)(&msgbuf[1]); 535 s32 ret_val; 536 537 memset(msgbuf, 0, sizeof(msgbuf)); 538 /* 539 * If index is one then this is the start of a new list and needs 540 * indication to the PF so it can do it's own list management. 541 * If it is zero then that tells the PF to just clear all of 542 * this VF's macvlans and there is no new list. 543 */ 544 msgbuf[0] |= index << IXGBE_VT_MSGINFO_SHIFT; 545 msgbuf[0] |= IXGBE_VF_SET_MACVLAN; 546 msgbuf_chk = msgbuf[0]; 547 if (addr) 548 memcpy(msg_addr, addr, 6); 549 550 ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 3); 551 if (!ret_val) { 552 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS; 553 554 if (msgbuf[0] == (msgbuf_chk | IXGBE_VT_MSGTYPE_NACK)) 555 return IXGBE_ERR_OUT_OF_MEM; 556 } 557 558 return ret_val; 559 } 560 561 /** 562 * ixgbe_setup_mac_link_vf - Setup MAC link settings 563 * @hw: pointer to hardware structure 564 * @speed: new link speed 565 * @autoneg_wait_to_complete: TRUE when waiting for completion is needed 566 * 567 * Set the link speed in the AUTOC register and restarts link. 568 **/ 569 s32 ixgbe_setup_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed speed, 570 bool autoneg_wait_to_complete) 571 { 572 UNREFERENCED_3PARAMETER(hw, speed, autoneg_wait_to_complete); 573 return IXGBE_SUCCESS; 574 } 575 576 /** 577 * ixgbe_check_mac_link_vf - Get link/speed status 578 * @hw: pointer to hardware structure 579 * @speed: pointer to link speed 580 * @link_up: TRUE is link is up, FALSE otherwise 581 * @autoneg_wait_to_complete: TRUE when waiting for completion is needed 582 * 583 * Reads the links register to determine if link is up and the current speed 584 **/ 585 s32 ixgbe_check_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 586 bool *link_up, bool autoneg_wait_to_complete) 587 { 588 struct ixgbe_mbx_info *mbx = &hw->mbx; 589 struct ixgbe_mac_info *mac = &hw->mac; 590 s32 ret_val = IXGBE_SUCCESS; 591 u32 links_reg; 592 u32 in_msg = 0; 593 UNREFERENCED_1PARAMETER(autoneg_wait_to_complete); 594 595 /* If we were hit with a reset drop the link */ 596 if (!mbx->ops.check_for_rst(hw, 0) || !mbx->timeout) 597 mac->get_link_status = TRUE; 598 599 if (!mac->get_link_status) 600 goto out; 601 602 /* if link status is down no point in checking to see if pf is up */ 603 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS); 604 if (!(links_reg & IXGBE_LINKS_UP)) 605 goto out; 606 607 /* for SFP+ modules and DA cables on 82599 it can take up to 500usecs 608 * before the link status is correct 609 */ 610 if (mac->type == ixgbe_mac_82599_vf) { 611 int i; 612 613 for (i = 0; i < 5; i++) { 614 usec_delay(100); 615 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS); 616 617 if (!(links_reg & IXGBE_LINKS_UP)) 618 goto out; 619 } 620 } 621 622 switch (links_reg & IXGBE_LINKS_SPEED_82599) { 623 case IXGBE_LINKS_SPEED_10G_82599: 624 *speed = IXGBE_LINK_SPEED_10GB_FULL; 625 if (hw->mac.type >= ixgbe_mac_X550) { 626 if (links_reg & IXGBE_LINKS_SPEED_NON_STD) 627 *speed = IXGBE_LINK_SPEED_2_5GB_FULL; 628 } 629 break; 630 case IXGBE_LINKS_SPEED_1G_82599: 631 *speed = IXGBE_LINK_SPEED_1GB_FULL; 632 break; 633 case IXGBE_LINKS_SPEED_100_82599: 634 *speed = IXGBE_LINK_SPEED_100_FULL; 635 if (hw->mac.type >= ixgbe_mac_X550) { 636 if (links_reg & IXGBE_LINKS_SPEED_NON_STD) 637 *speed = IXGBE_LINK_SPEED_5GB_FULL; 638 } 639 break; 640 case IXGBE_LINKS_SPEED_10_X550EM_A: 641 *speed = IXGBE_LINK_SPEED_UNKNOWN; 642 /* Since Reserved in older MAC's */ 643 if (hw->mac.type >= ixgbe_mac_X550) 644 *speed = IXGBE_LINK_SPEED_10_FULL; 645 break; 646 default: 647 *speed = IXGBE_LINK_SPEED_UNKNOWN; 648 } 649 650 /* if the read failed it could just be a mailbox collision, best wait 651 * until we are called again and don't report an error 652 */ 653 if (mbx->ops.read(hw, &in_msg, 1, 0)) 654 goto out; 655 656 if (!(in_msg & IXGBE_VT_MSGTYPE_CTS)) { 657 /* msg is not CTS and is NACK we must have lost CTS status */ 658 if (in_msg & IXGBE_VT_MSGTYPE_NACK) 659 ret_val = -1; 660 goto out; 661 } 662 663 /* the pf is talking, if we timed out in the past we reinit */ 664 if (!mbx->timeout) { 665 ret_val = -1; 666 goto out; 667 } 668 669 /* if we passed all the tests above then the link is up and we no 670 * longer need to check for link 671 */ 672 mac->get_link_status = FALSE; 673 674 out: 675 *link_up = !mac->get_link_status; 676 return ret_val; 677 } 678 679 /** 680 * ixgbevf_rlpml_set_vf - Set the maximum receive packet length 681 * @hw: pointer to the HW structure 682 * @max_size: value to assign to max frame size 683 **/ 684 s32 ixgbevf_rlpml_set_vf(struct ixgbe_hw *hw, u16 max_size) 685 { 686 u32 msgbuf[2]; 687 s32 retval; 688 689 msgbuf[0] = IXGBE_VF_SET_LPE; 690 msgbuf[1] = max_size; 691 692 retval = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2); 693 if (retval) 694 return retval; 695 if ((msgbuf[0] & IXGBE_VF_SET_LPE) && 696 (msgbuf[0] & IXGBE_VT_MSGTYPE_NACK)) 697 return IXGBE_ERR_MBX; 698 699 return 0; 700 } 701 702 /** 703 * ixgbevf_negotiate_api_version - Negotiate supported API version 704 * @hw: pointer to the HW structure 705 * @api: integer containing requested API version 706 **/ 707 int ixgbevf_negotiate_api_version(struct ixgbe_hw *hw, int api) 708 { 709 int err; 710 u32 msg[3]; 711 712 /* Negotiate the mailbox API version */ 713 msg[0] = IXGBE_VF_API_NEGOTIATE; 714 msg[1] = api; 715 msg[2] = 0; 716 717 err = ixgbevf_write_msg_read_ack(hw, msg, msg, 3); 718 if (!err) { 719 msg[0] &= ~IXGBE_VT_MSGTYPE_CTS; 720 721 /* Store value and return 0 on success */ 722 if (msg[0] == (IXGBE_VF_API_NEGOTIATE | IXGBE_VT_MSGTYPE_ACK)) { 723 hw->api_version = api; 724 return 0; 725 } 726 727 err = IXGBE_ERR_INVALID_ARGUMENT; 728 } 729 730 return err; 731 } 732 733 int ixgbevf_get_queues(struct ixgbe_hw *hw, unsigned int *num_tcs, 734 unsigned int *default_tc) 735 { 736 int err; 737 u32 msg[5]; 738 739 /* do nothing if API doesn't support ixgbevf_get_queues */ 740 switch (hw->api_version) { 741 case ixgbe_mbox_api_11: 742 case ixgbe_mbox_api_12: 743 case ixgbe_mbox_api_13: 744 break; 745 default: 746 return 0; 747 } 748 749 /* Fetch queue configuration from the PF */ 750 msg[0] = IXGBE_VF_GET_QUEUES; 751 msg[1] = msg[2] = msg[3] = msg[4] = 0; 752 753 err = ixgbevf_write_msg_read_ack(hw, msg, msg, 5); 754 if (!err) { 755 msg[0] &= ~IXGBE_VT_MSGTYPE_CTS; 756 757 /* 758 * if we we didn't get an ACK there must have been 759 * some sort of mailbox error so we should treat it 760 * as such 761 */ 762 if (msg[0] != (IXGBE_VF_GET_QUEUES | IXGBE_VT_MSGTYPE_ACK)) 763 return IXGBE_ERR_MBX; 764 765 /* record and validate values from message */ 766 hw->mac.max_tx_queues = msg[IXGBE_VF_TX_QUEUES]; 767 if (hw->mac.max_tx_queues == 0 || 768 hw->mac.max_tx_queues > IXGBE_VF_MAX_TX_QUEUES) 769 hw->mac.max_tx_queues = IXGBE_VF_MAX_TX_QUEUES; 770 771 hw->mac.max_rx_queues = msg[IXGBE_VF_RX_QUEUES]; 772 if (hw->mac.max_rx_queues == 0 || 773 hw->mac.max_rx_queues > IXGBE_VF_MAX_RX_QUEUES) 774 hw->mac.max_rx_queues = IXGBE_VF_MAX_RX_QUEUES; 775 776 *num_tcs = msg[IXGBE_VF_TRANS_VLAN]; 777 /* in case of unknown state assume we cannot tag frames */ 778 if (*num_tcs > hw->mac.max_rx_queues) 779 *num_tcs = 1; 780 781 *default_tc = msg[IXGBE_VF_DEF_QUEUE]; 782 /* default to queue 0 on out-of-bounds queue number */ 783 if (*default_tc >= hw->mac.max_tx_queues) 784 *default_tc = 0; 785 } 786 787 return err; 788 } 789