1 /****************************************************************************** 2 3 Copyright (c) 2001-2010, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32 ******************************************************************************/ 33 /*$FreeBSD: src/sys/dev/ixgbe/ixgbe_vf.c,v 1.1 2010/11/26 22:46:32 jfv Exp $*/ 34 /*$NetBSD: ixgbe_vf.c,v 1.1 2011/08/12 21:55:29 dyoung Exp $*/ 35 36 37 #include "ixgbe_api.h" 38 #include "ixgbe_type.h" 39 #include "ixgbe_vf.h" 40 41 s32 ixgbe_init_ops_vf(struct ixgbe_hw *hw); 42 s32 ixgbe_init_hw_vf(struct ixgbe_hw *hw); 43 s32 ixgbe_start_hw_vf(struct ixgbe_hw *hw); 44 s32 ixgbe_reset_hw_vf(struct ixgbe_hw *hw); 45 s32 ixgbe_stop_hw_vf(struct ixgbe_hw *hw); 46 u32 ixgbe_get_num_of_tx_queues_vf(struct ixgbe_hw *hw); 47 u32 ixgbe_get_num_of_rx_queues_vf(struct ixgbe_hw *hw); 48 s32 ixgbe_get_mac_addr_vf(struct ixgbe_hw *hw, u8 *mac_addr); 49 s32 ixgbe_setup_mac_link_vf(struct ixgbe_hw *hw, 50 ixgbe_link_speed speed, bool autoneg, 51 bool autoneg_wait_to_complete); 52 s32 ixgbe_check_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 53 bool *link_up, bool autoneg_wait_to_complete); 54 s32 ixgbe_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq, 55 u32 enable_addr); 56 s32 ixgbe_update_mc_addr_list_vf(struct ixgbe_hw *hw, u8 *mc_addr_list, 57 u32 mc_addr_count, ixgbe_mc_addr_itr); 58 s32 ixgbe_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on); 59 60 #ifndef IXGBE_VFWRITE_REG 61 #define IXGBE_VFWRITE_REG IXGBE_WRITE_REG 62 #endif 63 #ifndef IXGBE_VFREAD_REG 64 #define IXGBE_VFREAD_REG IXGBE_READ_REG 65 #endif 66 67 /** 68 * ixgbe_init_ops_vf - Initialize the pointers for vf 69 * @hw: pointer to hardware structure 70 * 71 * This will assign function pointers, adapter-specific functions can 72 * override the assignment of generic function pointers by assigning 73 * their own adapter-specific function pointers. 74 * Does not touch the hardware. 75 **/ 76 s32 ixgbe_init_ops_vf(struct ixgbe_hw *hw) 77 { 78 /* MAC */ 79 hw->mac.ops.init_hw = ixgbe_init_hw_vf; 80 hw->mac.ops.reset_hw = ixgbe_reset_hw_vf; 81 hw->mac.ops.start_hw = ixgbe_start_hw_vf; 82 /* Cannot clear stats on VF */ 83 hw->mac.ops.clear_hw_cntrs = NULL; 84 hw->mac.ops.get_media_type = NULL; 85 hw->mac.ops.get_mac_addr = ixgbe_get_mac_addr_vf; 86 hw->mac.ops.stop_adapter = ixgbe_stop_hw_vf; 87 hw->mac.ops.get_bus_info = NULL; 88 89 /* Link */ 90 hw->mac.ops.setup_link = ixgbe_setup_mac_link_vf; 91 hw->mac.ops.check_link = ixgbe_check_mac_link_vf; 92 hw->mac.ops.get_link_capabilities = NULL; 93 94 /* RAR, Multicast, VLAN */ 95 hw->mac.ops.set_rar = ixgbe_set_rar_vf; 96 hw->mac.ops.init_rx_addrs = NULL; 97 hw->mac.ops.update_mc_addr_list = ixgbe_update_mc_addr_list_vf; 98 hw->mac.ops.enable_mc = NULL; 99 hw->mac.ops.disable_mc = NULL; 100 hw->mac.ops.clear_vfta = NULL; 101 hw->mac.ops.set_vfta = ixgbe_set_vfta_vf; 102 103 hw->mac.max_tx_queues = 1; 104 hw->mac.max_rx_queues = 1; 105 106 hw->mbx.ops.init_params = ixgbe_init_mbx_params_vf; 107 108 return IXGBE_SUCCESS; 109 } 110 111 /** 112 * ixgbe_start_hw_vf - Prepare hardware for Tx/Rx 113 * @hw: pointer to hardware structure 114 * 115 * Starts the hardware by filling the bus info structure and media type, clears 116 * all on chip counters, initializes receive address registers, multicast 117 * table, VLAN filter table, calls routine to set up link and flow control 118 * settings, and leaves transmit and receive units disabled and uninitialized 119 **/ 120 s32 ixgbe_start_hw_vf(struct ixgbe_hw *hw) 121 { 122 /* Clear adapter stopped flag */ 123 hw->adapter_stopped = FALSE; 124 125 return IXGBE_SUCCESS; 126 } 127 128 /** 129 * ixgbe_init_hw_vf - virtual function hardware initialization 130 * @hw: pointer to hardware structure 131 * 132 * Initialize the hardware by resetting the hardware and then starting 133 * the hardware 134 **/ 135 s32 ixgbe_init_hw_vf(struct ixgbe_hw *hw) 136 { 137 s32 status = hw->mac.ops.start_hw(hw); 138 139 hw->mac.ops.get_mac_addr(hw, hw->mac.addr); 140 141 return status; 142 } 143 144 /** 145 * ixgbe_reset_hw_vf - Performs hardware reset 146 * @hw: pointer to hardware structure 147 * 148 * Resets the hardware by reseting the transmit and receive units, masks and 149 * clears all interrupts. 150 **/ 151 s32 ixgbe_reset_hw_vf(struct ixgbe_hw *hw) 152 { 153 struct ixgbe_mbx_info *mbx = &hw->mbx; 154 u32 timeout = IXGBE_VF_INIT_TIMEOUT; 155 s32 ret_val = IXGBE_ERR_INVALID_MAC_ADDR; 156 u32 ctrl, msgbuf[IXGBE_VF_PERMADDR_MSG_LEN]; 157 u8 *addr = (u8 *)(&msgbuf[1]); 158 159 DEBUGFUNC("ixgbevf_reset_hw_vf"); 160 161 /* Call adapter stop to disable tx/rx and clear interrupts */ 162 hw->mac.ops.stop_adapter(hw); 163 164 DEBUGOUT("Issuing a function level reset to MAC\n"); 165 ctrl = IXGBE_VFREAD_REG(hw, IXGBE_VFCTRL); 166 IXGBE_VFWRITE_REG(hw, IXGBE_VFCTRL, (ctrl | IXGBE_CTRL_RST)); 167 IXGBE_WRITE_FLUSH(hw); 168 169 usec_delay(1); 170 171 /* we cannot reset while the RSTI / RSTD bits are asserted */ 172 while (!mbx->ops.check_for_rst(hw, 0) && timeout) { 173 timeout--; 174 usec_delay(5); 175 } 176 177 if (timeout) { 178 /* mailbox timeout can now become active */ 179 mbx->timeout = IXGBE_VF_MBX_INIT_TIMEOUT; 180 181 msgbuf[0] = IXGBE_VF_RESET; 182 mbx->ops.write_posted(hw, msgbuf, 1, 0); 183 184 msec_delay(10); 185 186 /* set our "perm_addr" based on info provided by PF */ 187 /* also set up the mc_filter_type which is piggy backed 188 * on the mac address in word 3 */ 189 ret_val = mbx->ops.read_posted(hw, msgbuf, 190 IXGBE_VF_PERMADDR_MSG_LEN, 0); 191 if (!ret_val) { 192 if (msgbuf[0] == (IXGBE_VF_RESET | 193 IXGBE_VT_MSGTYPE_ACK)) { 194 memcpy(hw->mac.perm_addr, addr, 195 IXGBE_ETH_LENGTH_OF_ADDRESS); 196 hw->mac.mc_filter_type = 197 msgbuf[IXGBE_VF_MC_TYPE_WORD]; 198 } else { 199 ret_val = IXGBE_ERR_INVALID_MAC_ADDR; 200 } 201 } 202 } 203 204 return ret_val; 205 } 206 207 /** 208 * ixgbe_stop_hw_vf - Generic stop Tx/Rx units 209 * @hw: pointer to hardware structure 210 * 211 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts, 212 * disables transmit and receive units. The adapter_stopped flag is used by 213 * the shared code and drivers to determine if the adapter is in a stopped 214 * state and should not touch the hardware. 215 **/ 216 s32 ixgbe_stop_hw_vf(struct ixgbe_hw *hw) 217 { 218 u32 number_of_queues; 219 u32 reg_val; 220 u16 i; 221 222 /* 223 * Set the adapter_stopped flag so other driver functions stop touching 224 * the hardware 225 */ 226 hw->adapter_stopped = TRUE; 227 228 /* Disable the receive unit by stopped each queue */ 229 number_of_queues = hw->mac.max_rx_queues; 230 for (i = 0; i < number_of_queues; i++) { 231 reg_val = IXGBE_VFREAD_REG(hw, IXGBE_VFRXDCTL(i)); 232 if (reg_val & IXGBE_RXDCTL_ENABLE) { 233 reg_val &= ~IXGBE_RXDCTL_ENABLE; 234 IXGBE_VFWRITE_REG(hw, IXGBE_VFRXDCTL(i), reg_val); 235 } 236 } 237 238 IXGBE_WRITE_FLUSH(hw); 239 240 /* Clear interrupt mask to stop from interrupts being generated */ 241 IXGBE_VFWRITE_REG(hw, IXGBE_VTEIMC, IXGBE_VF_IRQ_CLEAR_MASK); 242 243 /* Clear any pending interrupts */ 244 IXGBE_VFREAD_REG(hw, IXGBE_VTEICR); 245 246 /* Disable the transmit unit. Each queue must be disabled. */ 247 number_of_queues = hw->mac.max_tx_queues; 248 for (i = 0; i < number_of_queues; i++) { 249 reg_val = IXGBE_VFREAD_REG(hw, IXGBE_VFTXDCTL(i)); 250 if (reg_val & IXGBE_TXDCTL_ENABLE) { 251 reg_val &= ~IXGBE_TXDCTL_ENABLE; 252 IXGBE_VFWRITE_REG(hw, IXGBE_VFTXDCTL(i), reg_val); 253 } 254 } 255 256 return IXGBE_SUCCESS; 257 } 258 259 /** 260 * ixgbe_mta_vector - Determines bit-vector in multicast table to set 261 * @hw: pointer to hardware structure 262 * @mc_addr: the multicast address 263 * 264 * Extracts the 12 bits, from a multicast address, to determine which 265 * bit-vector to set in the multicast table. The hardware uses 12 bits, from 266 * incoming rx multicast addresses, to determine the bit-vector to check in 267 * the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set 268 * by the MO field of the MCSTCTRL. The MO field is set during initialization 269 * to mc_filter_type. 270 **/ 271 static s32 ixgbe_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr) 272 { 273 u32 vector = 0; 274 275 switch (hw->mac.mc_filter_type) { 276 case 0: /* use bits [47:36] of the address */ 277 vector = ((mc_addr[4] >> 4) | (((u16)mc_addr[5]) << 4)); 278 break; 279 case 1: /* use bits [46:35] of the address */ 280 vector = ((mc_addr[4] >> 3) | (((u16)mc_addr[5]) << 5)); 281 break; 282 case 2: /* use bits [45:34] of the address */ 283 vector = ((mc_addr[4] >> 2) | (((u16)mc_addr[5]) << 6)); 284 break; 285 case 3: /* use bits [43:32] of the address */ 286 vector = ((mc_addr[4]) | (((u16)mc_addr[5]) << 8)); 287 break; 288 default: /* Invalid mc_filter_type */ 289 DEBUGOUT("MC filter type param set incorrectly\n"); 290 ASSERT(0); 291 break; 292 } 293 294 /* vector can only be 12-bits or boundary will be exceeded */ 295 vector &= 0xFFF; 296 return vector; 297 } 298 299 /** 300 * ixgbe_set_rar_vf - set device MAC address 301 * @hw: pointer to hardware structure 302 * @index: Receive address register to write 303 * @addr: Address to put into receive address register 304 * @vmdq: VMDq "set" or "pool" index 305 * @enable_addr: set flag that address is active 306 **/ 307 s32 ixgbe_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq, 308 u32 enable_addr) 309 { 310 struct ixgbe_mbx_info *mbx = &hw->mbx; 311 u32 msgbuf[3]; 312 u8 *msg_addr = (u8 *)(&msgbuf[1]); 313 s32 ret_val; 314 UNREFERENCED_PARAMETER(vmdq); 315 UNREFERENCED_PARAMETER(enable_addr); 316 UNREFERENCED_PARAMETER(index); 317 318 memset(msgbuf, 0, 12); 319 msgbuf[0] = IXGBE_VF_SET_MAC_ADDR; 320 memcpy(msg_addr, addr, 6); 321 ret_val = mbx->ops.write_posted(hw, msgbuf, 3, 0); 322 323 if (!ret_val) 324 ret_val = mbx->ops.read_posted(hw, msgbuf, 3, 0); 325 326 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS; 327 328 /* if nacked the address was rejected, use "perm_addr" */ 329 if (!ret_val && 330 (msgbuf[0] == (IXGBE_VF_SET_MAC_ADDR | IXGBE_VT_MSGTYPE_NACK))) 331 ixgbe_get_mac_addr_vf(hw, hw->mac.addr); 332 333 return ret_val; 334 } 335 336 /** 337 * ixgbe_update_mc_addr_list_vf - Update Multicast addresses 338 * @hw: pointer to the HW structure 339 * @mc_addr_list: array of multicast addresses to program 340 * @mc_addr_count: number of multicast addresses to program 341 * @next: caller supplied function to return next address in list 342 * 343 * Updates the Multicast Table Array. 344 **/ 345 s32 ixgbe_update_mc_addr_list_vf(struct ixgbe_hw *hw, u8 *mc_addr_list, 346 u32 mc_addr_count, ixgbe_mc_addr_itr next) 347 { 348 struct ixgbe_mbx_info *mbx = &hw->mbx; 349 u32 msgbuf[IXGBE_VFMAILBOX_SIZE]; 350 u16 *vector_list = (u16 *)&msgbuf[1]; 351 u32 vector; 352 u32 cnt, i; 353 u32 vmdq; 354 355 DEBUGFUNC("ixgbe_update_mc_addr_list_vf"); 356 357 /* Each entry in the list uses 1 16 bit word. We have 30 358 * 16 bit words available in our HW msg buffer (minus 1 for the 359 * msg type). That's 30 hash values if we pack 'em right. If 360 * there are more than 30 MC addresses to add then punt the 361 * extras for now and then add code to handle more than 30 later. 362 * It would be unusual for a server to request that many multi-cast 363 * addresses except for in large enterprise network environments. 364 */ 365 366 DEBUGOUT1("MC Addr Count = %d\n", mc_addr_count); 367 368 cnt = (mc_addr_count > 30) ? 30 : mc_addr_count; 369 msgbuf[0] = IXGBE_VF_SET_MULTICAST; 370 msgbuf[0] |= cnt << IXGBE_VT_MSGINFO_SHIFT; 371 372 for (i = 0; i < cnt; i++) { 373 vector = ixgbe_mta_vector(hw, next(hw, &mc_addr_list, &vmdq)); 374 DEBUGOUT1("Hash value = 0x%03X\n", vector); 375 vector_list[i] = (u16)vector; 376 } 377 378 return mbx->ops.write_posted(hw, msgbuf, IXGBE_VFMAILBOX_SIZE, 0); 379 } 380 381 /** 382 * ixgbe_set_vfta_vf - Set/Unset vlan filter table address 383 * @hw: pointer to the HW structure 384 * @vlan: 12 bit VLAN ID 385 * @vind: unused by VF drivers 386 * @vlan_on: if TRUE then set bit, else clear bit 387 **/ 388 s32 ixgbe_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on) 389 { 390 struct ixgbe_mbx_info *mbx = &hw->mbx; 391 u32 msgbuf[2]; 392 UNREFERENCED_PARAMETER(vind); 393 394 msgbuf[0] = IXGBE_VF_SET_VLAN; 395 msgbuf[1] = vlan; 396 /* Setting the 8 bit field MSG INFO to TRUE indicates "add" */ 397 msgbuf[0] |= vlan_on << IXGBE_VT_MSGINFO_SHIFT; 398 399 return(mbx->ops.write_posted(hw, msgbuf, 2, 0)); 400 } 401 402 /** 403 * ixgbe_get_num_of_tx_queues_vf - Get number of TX queues 404 * @hw: pointer to hardware structure 405 * 406 * Returns the number of transmit queues for the given adapter. 407 **/ 408 u32 ixgbe_get_num_of_tx_queues_vf(struct ixgbe_hw *hw) 409 { 410 UNREFERENCED_PARAMETER(hw); 411 return IXGBE_VF_MAX_TX_QUEUES; 412 } 413 414 /** 415 * ixgbe_get_num_of_rx_queues_vf - Get number of RX queues 416 * @hw: pointer to hardware structure 417 * 418 * Returns the number of receive queues for the given adapter. 419 **/ 420 u32 ixgbe_get_num_of_rx_queues_vf(struct ixgbe_hw *hw) 421 { 422 UNREFERENCED_PARAMETER(hw); 423 return IXGBE_VF_MAX_RX_QUEUES; 424 } 425 426 /** 427 * ixgbe_get_mac_addr_vf - Read device MAC address 428 * @hw: pointer to the HW structure 429 **/ 430 s32 ixgbe_get_mac_addr_vf(struct ixgbe_hw *hw, u8 *mac_addr) 431 { 432 int i; 433 434 for (i = 0; i < IXGBE_ETH_LENGTH_OF_ADDRESS; i++) 435 mac_addr[i] = hw->mac.perm_addr[i]; 436 437 return IXGBE_SUCCESS; 438 } 439 440 /** 441 * ixgbe_setup_mac_link_vf - Setup MAC link settings 442 * @hw: pointer to hardware structure 443 * @speed: new link speed 444 * @autoneg: TRUE if autonegotiation enabled 445 * @autoneg_wait_to_complete: TRUE when waiting for completion is needed 446 * 447 * Set the link speed in the AUTOC register and restarts link. 448 **/ 449 s32 ixgbe_setup_mac_link_vf(struct ixgbe_hw *hw, 450 ixgbe_link_speed speed, bool autoneg, 451 bool autoneg_wait_to_complete) 452 { 453 UNREFERENCED_PARAMETER(hw); 454 UNREFERENCED_PARAMETER(speed); 455 UNREFERENCED_PARAMETER(autoneg); 456 UNREFERENCED_PARAMETER(autoneg_wait_to_complete); 457 return IXGBE_SUCCESS; 458 } 459 460 /** 461 * ixgbe_check_mac_link_vf - Get link/speed status 462 * @hw: pointer to hardware structure 463 * @speed: pointer to link speed 464 * @link_up: TRUE is link is up, FALSE otherwise 465 * @autoneg_wait_to_complete: TRUE when waiting for completion is needed 466 * 467 * Reads the links register to determine if link is up and the current speed 468 **/ 469 s32 ixgbe_check_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 470 bool *link_up, bool autoneg_wait_to_complete) 471 { 472 u32 links_reg; 473 UNREFERENCED_PARAMETER(autoneg_wait_to_complete); 474 475 if (!(hw->mbx.ops.check_for_rst(hw, 0))) { 476 *link_up = FALSE; 477 *speed = 0; 478 return -1; 479 } 480 481 links_reg = IXGBE_VFREAD_REG(hw, IXGBE_VFLINKS); 482 483 if (links_reg & IXGBE_LINKS_UP) 484 *link_up = TRUE; 485 else 486 *link_up = FALSE; 487 488 if ((links_reg & IXGBE_LINKS_SPEED_10G_82599) == 489 IXGBE_LINKS_SPEED_10G_82599) 490 *speed = IXGBE_LINK_SPEED_10GB_FULL; 491 else 492 *speed = IXGBE_LINK_SPEED_1GB_FULL; 493 494 return IXGBE_SUCCESS; 495 } 496 497