1 /****************************************************************************** 2 3 Copyright (c) 2001-2010, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32 ******************************************************************************/ 33 /*$FreeBSD: src/sys/dev/ixgbe/ixgbe_api.c,v 1.11 2010/11/26 22:46:32 jfv Exp $*/ 34 /*$NetBSD: ixgbe_api.c,v 1.1 2011/08/12 21:55:29 dyoung Exp $*/ 35 36 #include "ixgbe_api.h" 37 #include "ixgbe_common.h" 38 39 extern s32 ixgbe_init_ops_82598(struct ixgbe_hw *hw); 40 extern s32 ixgbe_init_ops_82599(struct ixgbe_hw *hw); 41 extern s32 ixgbe_init_ops_vf(struct ixgbe_hw *hw); 42 43 /** 44 * ixgbe_init_shared_code - Initialize the shared code 45 * @hw: pointer to hardware structure 46 * 47 * This will assign function pointers and assign the MAC type and PHY code. 48 * Does not touch the hardware. This function must be called prior to any 49 * other function in the shared code. The ixgbe_hw structure should be 50 * memset to 0 prior to calling this function. The following fields in 51 * hw structure should be filled in prior to calling this function: 52 * back, device_id, vendor_id, subsystem_device_id, 53 * subsystem_vendor_id, and revision_id 54 **/ 55 s32 ixgbe_init_shared_code(struct ixgbe_hw *hw) 56 { 57 s32 status; 58 59 DEBUGFUNC("ixgbe_init_shared_code"); 60 61 /* 62 * Set the mac type 63 */ 64 ixgbe_set_mac_type(hw); 65 66 switch (hw->mac.type) { 67 case ixgbe_mac_82598EB: 68 status = ixgbe_init_ops_82598(hw); 69 break; 70 case ixgbe_mac_82599EB: 71 status = ixgbe_init_ops_82599(hw); 72 break; 73 case ixgbe_mac_82599_vf: 74 status = ixgbe_init_ops_vf(hw); 75 break; 76 default: 77 status = IXGBE_ERR_DEVICE_NOT_SUPPORTED; 78 break; 79 } 80 81 return status; 82 } 83 84 /** 85 * ixgbe_set_mac_type - Sets MAC type 86 * @hw: pointer to the HW structure 87 * 88 * This function sets the mac type of the adapter based on the 89 * vendor ID and device ID stored in the hw structure. 90 **/ 91 s32 ixgbe_set_mac_type(struct ixgbe_hw *hw) 92 { 93 s32 ret_val = IXGBE_SUCCESS; 94 95 DEBUGFUNC("ixgbe_set_mac_type\n"); 96 97 if (hw->vendor_id == IXGBE_INTEL_VENDOR_ID) { 98 switch (hw->device_id) { 99 case IXGBE_DEV_ID_82598: 100 case IXGBE_DEV_ID_82598_BX: 101 case IXGBE_DEV_ID_82598AF_SINGLE_PORT: 102 case IXGBE_DEV_ID_82598AF_DUAL_PORT: 103 case IXGBE_DEV_ID_82598AT: 104 case IXGBE_DEV_ID_82598AT2: 105 case IXGBE_DEV_ID_82598EB_CX4: 106 case IXGBE_DEV_ID_82598_CX4_DUAL_PORT: 107 case IXGBE_DEV_ID_82598_DA_DUAL_PORT: 108 case IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM: 109 case IXGBE_DEV_ID_82598EB_XF_LR: 110 case IXGBE_DEV_ID_82598EB_SFP_LOM: 111 hw->mac.type = ixgbe_mac_82598EB; 112 break; 113 case IXGBE_DEV_ID_82599_KX4: 114 case IXGBE_DEV_ID_82599_KX4_MEZZ: 115 case IXGBE_DEV_ID_82599_XAUI_LOM: 116 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE: 117 case IXGBE_DEV_ID_82599_SFP: 118 case IXGBE_DEV_ID_82599_BACKPLANE_FCOE: 119 case IXGBE_DEV_ID_82599_SFP_FCOE: 120 case IXGBE_DEV_ID_82599_CX4: 121 case IXGBE_DEV_ID_82599_T3_LOM: 122 hw->mac.type = ixgbe_mac_82599EB; 123 break; 124 case IXGBE_DEV_ID_82599_VF: 125 hw->mac.type = ixgbe_mac_82599_vf; 126 break; 127 default: 128 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED; 129 break; 130 } 131 } else { 132 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED; 133 } 134 135 DEBUGOUT2("ixgbe_set_mac_type found mac: %d, returns: %d\n", 136 hw->mac.type, ret_val); 137 return ret_val; 138 } 139 140 /** 141 * ixgbe_init_hw - Initialize the hardware 142 * @hw: pointer to hardware structure 143 * 144 * Initialize the hardware by resetting and then starting the hardware 145 **/ 146 s32 ixgbe_init_hw(struct ixgbe_hw *hw) 147 { 148 return ixgbe_call_func(hw, hw->mac.ops.init_hw, (hw), 149 IXGBE_NOT_IMPLEMENTED); 150 } 151 152 /** 153 * ixgbe_reset_hw - Performs a hardware reset 154 * @hw: pointer to hardware structure 155 * 156 * Resets the hardware by resetting the transmit and receive units, masks and 157 * clears all interrupts, performs a PHY reset, and performs a MAC reset 158 **/ 159 s32 ixgbe_reset_hw(struct ixgbe_hw *hw) 160 { 161 return ixgbe_call_func(hw, hw->mac.ops.reset_hw, (hw), 162 IXGBE_NOT_IMPLEMENTED); 163 } 164 165 /** 166 * ixgbe_start_hw - Prepares hardware for Rx/Tx 167 * @hw: pointer to hardware structure 168 * 169 * Starts the hardware by filling the bus info structure and media type, 170 * clears all on chip counters, initializes receive address registers, 171 * multicast table, VLAN filter table, calls routine to setup link and 172 * flow control settings, and leaves transmit and receive units disabled 173 * and uninitialized. 174 **/ 175 s32 ixgbe_start_hw(struct ixgbe_hw *hw) 176 { 177 return ixgbe_call_func(hw, hw->mac.ops.start_hw, (hw), 178 IXGBE_NOT_IMPLEMENTED); 179 } 180 181 /** 182 * ixgbe_enable_relaxed_ordering - Enables tx relaxed ordering, 183 * which is disabled by default in ixgbe_start_hw(); 184 * 185 * @hw: pointer to hardware structure 186 * 187 * Enable relaxed ordering; 188 **/ 189 void ixgbe_enable_relaxed_ordering(struct ixgbe_hw *hw) 190 { 191 if (hw->mac.ops.enable_relaxed_ordering) 192 hw->mac.ops.enable_relaxed_ordering(hw); 193 } 194 195 /** 196 * ixgbe_clear_hw_cntrs - Clear hardware counters 197 * @hw: pointer to hardware structure 198 * 199 * Clears all hardware statistics counters by reading them from the hardware 200 * Statistics counters are clear on read. 201 **/ 202 s32 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw) 203 { 204 return ixgbe_call_func(hw, hw->mac.ops.clear_hw_cntrs, (hw), 205 IXGBE_NOT_IMPLEMENTED); 206 } 207 208 /** 209 * ixgbe_get_media_type - Get media type 210 * @hw: pointer to hardware structure 211 * 212 * Returns the media type (fiber, copper, backplane) 213 **/ 214 enum ixgbe_media_type ixgbe_get_media_type(struct ixgbe_hw *hw) 215 { 216 return ixgbe_call_func(hw, hw->mac.ops.get_media_type, (hw), 217 ixgbe_media_type_unknown); 218 } 219 220 /** 221 * ixgbe_get_mac_addr - Get MAC address 222 * @hw: pointer to hardware structure 223 * @mac_addr: Adapter MAC address 224 * 225 * Reads the adapter's MAC address from the first Receive Address Register 226 * (RAR0) A reset of the adapter must have been performed prior to calling 227 * this function in order for the MAC address to have been loaded from the 228 * EEPROM into RAR0 229 **/ 230 s32 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr) 231 { 232 return ixgbe_call_func(hw, hw->mac.ops.get_mac_addr, 233 (hw, mac_addr), IXGBE_NOT_IMPLEMENTED); 234 } 235 236 /** 237 * ixgbe_get_san_mac_addr - Get SAN MAC address 238 * @hw: pointer to hardware structure 239 * @san_mac_addr: SAN MAC address 240 * 241 * Reads the SAN MAC address from the EEPROM, if it's available. This is 242 * per-port, so set_lan_id() must be called before reading the addresses. 243 **/ 244 s32 ixgbe_get_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr) 245 { 246 return ixgbe_call_func(hw, hw->mac.ops.get_san_mac_addr, 247 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED); 248 } 249 250 /** 251 * ixgbe_set_san_mac_addr - Write a SAN MAC address 252 * @hw: pointer to hardware structure 253 * @san_mac_addr: SAN MAC address 254 * 255 * Writes A SAN MAC address to the EEPROM. 256 **/ 257 s32 ixgbe_set_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr) 258 { 259 return ixgbe_call_func(hw, hw->mac.ops.set_san_mac_addr, 260 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED); 261 } 262 263 /** 264 * ixgbe_get_device_caps - Get additional device capabilities 265 * @hw: pointer to hardware structure 266 * @device_caps: the EEPROM word for device capabilities 267 * 268 * Reads the extra device capabilities from the EEPROM 269 **/ 270 s32 ixgbe_get_device_caps(struct ixgbe_hw *hw, u16 *device_caps) 271 { 272 return ixgbe_call_func(hw, hw->mac.ops.get_device_caps, 273 (hw, device_caps), IXGBE_NOT_IMPLEMENTED); 274 } 275 276 /** 277 * ixgbe_get_wwn_prefix - Get alternative WWNN/WWPN prefix from the EEPROM 278 * @hw: pointer to hardware structure 279 * @wwnn_prefix: the alternative WWNN prefix 280 * @wwpn_prefix: the alternative WWPN prefix 281 * 282 * This function will read the EEPROM from the alternative SAN MAC address 283 * block to check the support for the alternative WWNN/WWPN prefix support. 284 **/ 285 s32 ixgbe_get_wwn_prefix(struct ixgbe_hw *hw, u16 *wwnn_prefix, 286 u16 *wwpn_prefix) 287 { 288 return ixgbe_call_func(hw, hw->mac.ops.get_wwn_prefix, 289 (hw, wwnn_prefix, wwpn_prefix), 290 IXGBE_NOT_IMPLEMENTED); 291 } 292 293 /** 294 * ixgbe_get_fcoe_boot_status - Get FCOE boot status from EEPROM 295 * @hw: pointer to hardware structure 296 * @bs: the fcoe boot status 297 * 298 * This function will read the FCOE boot status from the iSCSI FCOE block 299 **/ 300 s32 ixgbe_get_fcoe_boot_status(struct ixgbe_hw *hw, u16 *bs) 301 { 302 return ixgbe_call_func(hw, hw->mac.ops.get_fcoe_boot_status, 303 (hw, bs), 304 IXGBE_NOT_IMPLEMENTED); 305 } 306 307 /** 308 * ixgbe_get_bus_info - Set PCI bus info 309 * @hw: pointer to hardware structure 310 * 311 * Sets the PCI bus info (speed, width, type) within the ixgbe_hw structure 312 **/ 313 s32 ixgbe_get_bus_info(struct ixgbe_hw *hw) 314 { 315 return ixgbe_call_func(hw, hw->mac.ops.get_bus_info, (hw), 316 IXGBE_NOT_IMPLEMENTED); 317 } 318 319 /** 320 * ixgbe_get_num_of_tx_queues - Get Tx queues 321 * @hw: pointer to hardware structure 322 * 323 * Returns the number of transmit queues for the given adapter. 324 **/ 325 u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw) 326 { 327 return hw->mac.max_tx_queues; 328 } 329 330 /** 331 * ixgbe_get_num_of_rx_queues - Get Rx queues 332 * @hw: pointer to hardware structure 333 * 334 * Returns the number of receive queues for the given adapter. 335 **/ 336 u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw) 337 { 338 return hw->mac.max_rx_queues; 339 } 340 341 /** 342 * ixgbe_stop_adapter - Disable Rx/Tx units 343 * @hw: pointer to hardware structure 344 * 345 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts, 346 * disables transmit and receive units. The adapter_stopped flag is used by 347 * the shared code and drivers to determine if the adapter is in a stopped 348 * state and should not touch the hardware. 349 **/ 350 s32 ixgbe_stop_adapter(struct ixgbe_hw *hw) 351 { 352 return ixgbe_call_func(hw, hw->mac.ops.stop_adapter, (hw), 353 IXGBE_NOT_IMPLEMENTED); 354 } 355 356 /** 357 * ixgbe_read_pba_string - Reads part number string from EEPROM 358 * @hw: pointer to hardware structure 359 * @pba_num: stores the part number string from the EEPROM 360 * @pba_num_size: part number string buffer length 361 * 362 * Reads the part number string from the EEPROM. 363 **/ 364 s32 ixgbe_read_pba_string(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size) 365 { 366 return ixgbe_read_pba_string_generic(hw, pba_num, pba_num_size); 367 } 368 369 /** 370 * ixgbe_read_pba_length - Reads part number string length from EEPROM 371 * @hw: pointer to hardware structure 372 * @pba_num_size: part number string buffer length 373 * 374 * Reads the part number length from the EEPROM. 375 * Returns expected buffer size in pba_num_size. 376 **/ 377 s32 ixgbe_read_pba_length(struct ixgbe_hw *hw, u32 *pba_num_size) 378 { 379 return ixgbe_read_pba_length_generic(hw, pba_num_size); 380 } 381 382 /** 383 * ixgbe_read_pba_num - Reads part number from EEPROM 384 * @hw: pointer to hardware structure 385 * @pba_num: stores the part number from the EEPROM 386 * 387 * Reads the part number from the EEPROM. 388 **/ 389 s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num) 390 { 391 return ixgbe_read_pba_num_generic(hw, pba_num); 392 } 393 394 /** 395 * ixgbe_identify_phy - Get PHY type 396 * @hw: pointer to hardware structure 397 * 398 * Determines the physical layer module found on the current adapter. 399 **/ 400 s32 ixgbe_identify_phy(struct ixgbe_hw *hw) 401 { 402 s32 status = IXGBE_SUCCESS; 403 404 if (hw->phy.type == ixgbe_phy_unknown) { 405 status = ixgbe_call_func(hw, hw->phy.ops.identify, (hw), 406 IXGBE_NOT_IMPLEMENTED); 407 } 408 409 return status; 410 } 411 412 /** 413 * ixgbe_reset_phy - Perform a PHY reset 414 * @hw: pointer to hardware structure 415 **/ 416 s32 ixgbe_reset_phy(struct ixgbe_hw *hw) 417 { 418 s32 status = IXGBE_SUCCESS; 419 420 if (hw->phy.type == ixgbe_phy_unknown) { 421 if (ixgbe_identify_phy(hw) != IXGBE_SUCCESS) 422 status = IXGBE_ERR_PHY; 423 } 424 425 if (status == IXGBE_SUCCESS) { 426 status = ixgbe_call_func(hw, hw->phy.ops.reset, (hw), 427 IXGBE_NOT_IMPLEMENTED); 428 } 429 return status; 430 } 431 432 /** 433 * ixgbe_get_phy_firmware_version - 434 * @hw: pointer to hardware structure 435 * @firmware_version: pointer to firmware version 436 **/ 437 s32 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw, u16 *firmware_version) 438 { 439 s32 status = IXGBE_SUCCESS; 440 441 status = ixgbe_call_func(hw, hw->phy.ops.get_firmware_version, 442 (hw, firmware_version), 443 IXGBE_NOT_IMPLEMENTED); 444 return status; 445 } 446 447 /** 448 * ixgbe_read_phy_reg - Read PHY register 449 * @hw: pointer to hardware structure 450 * @reg_addr: 32 bit address of PHY register to read 451 * @phy_data: Pointer to read data from PHY register 452 * 453 * Reads a value from a specified PHY register 454 **/ 455 s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, 456 u16 *phy_data) 457 { 458 if (hw->phy.id == 0) 459 ixgbe_identify_phy(hw); 460 461 return ixgbe_call_func(hw, hw->phy.ops.read_reg, (hw, reg_addr, 462 device_type, phy_data), IXGBE_NOT_IMPLEMENTED); 463 } 464 465 /** 466 * ixgbe_write_phy_reg - Write PHY register 467 * @hw: pointer to hardware structure 468 * @reg_addr: 32 bit PHY register to write 469 * @phy_data: Data to write to the PHY register 470 * 471 * Writes a value to specified PHY register 472 **/ 473 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, 474 u16 phy_data) 475 { 476 if (hw->phy.id == 0) 477 ixgbe_identify_phy(hw); 478 479 return ixgbe_call_func(hw, hw->phy.ops.write_reg, (hw, reg_addr, 480 device_type, phy_data), IXGBE_NOT_IMPLEMENTED); 481 } 482 483 /** 484 * ixgbe_setup_phy_link - Restart PHY autoneg 485 * @hw: pointer to hardware structure 486 * 487 * Restart autonegotiation and PHY and waits for completion. 488 **/ 489 s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw) 490 { 491 return ixgbe_call_func(hw, hw->phy.ops.setup_link, (hw), 492 IXGBE_NOT_IMPLEMENTED); 493 } 494 495 /** 496 * ixgbe_check_phy_link - Determine link and speed status 497 * @hw: pointer to hardware structure 498 * 499 * Reads a PHY register to determine if link is up and the current speed for 500 * the PHY. 501 **/ 502 s32 ixgbe_check_phy_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 503 bool *link_up) 504 { 505 return ixgbe_call_func(hw, hw->phy.ops.check_link, (hw, speed, 506 link_up), IXGBE_NOT_IMPLEMENTED); 507 } 508 509 /** 510 * ixgbe_setup_phy_link_speed - Set auto advertise 511 * @hw: pointer to hardware structure 512 * @speed: new link speed 513 * @autoneg: TRUE if autonegotiation enabled 514 * 515 * Sets the auto advertised capabilities 516 **/ 517 s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed, 518 bool autoneg, 519 bool autoneg_wait_to_complete) 520 { 521 return ixgbe_call_func(hw, hw->phy.ops.setup_link_speed, (hw, speed, 522 autoneg, autoneg_wait_to_complete), 523 IXGBE_NOT_IMPLEMENTED); 524 } 525 526 /** 527 * ixgbe_check_link - Get link and speed status 528 * @hw: pointer to hardware structure 529 * 530 * Reads the links register to determine if link is up and the current speed 531 **/ 532 s32 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 533 bool *link_up, bool link_up_wait_to_complete) 534 { 535 return ixgbe_call_func(hw, hw->mac.ops.check_link, (hw, speed, 536 link_up, link_up_wait_to_complete), 537 IXGBE_NOT_IMPLEMENTED); 538 } 539 540 /** 541 * ixgbe_disable_tx_laser - Disable Tx laser 542 * @hw: pointer to hardware structure 543 * 544 * If the driver needs to disable the laser on SFI optics. 545 **/ 546 void ixgbe_disable_tx_laser(struct ixgbe_hw *hw) 547 { 548 if (hw->mac.ops.disable_tx_laser) 549 hw->mac.ops.disable_tx_laser(hw); 550 } 551 552 /** 553 * ixgbe_enable_tx_laser - Enable Tx laser 554 * @hw: pointer to hardware structure 555 * 556 * If the driver needs to enable the laser on SFI optics. 557 **/ 558 void ixgbe_enable_tx_laser(struct ixgbe_hw *hw) 559 { 560 if (hw->mac.ops.enable_tx_laser) 561 hw->mac.ops.enable_tx_laser(hw); 562 } 563 564 /** 565 * ixgbe_flap_tx_laser - flap Tx laser to start autotry process 566 * @hw: pointer to hardware structure 567 * 568 * When the driver changes the link speeds that it can support then 569 * flap the tx laser to alert the link partner to start autotry 570 * process on its end. 571 **/ 572 void ixgbe_flap_tx_laser(struct ixgbe_hw *hw) 573 { 574 if (hw->mac.ops.flap_tx_laser) 575 hw->mac.ops.flap_tx_laser(hw); 576 } 577 578 /** 579 * ixgbe_setup_link - Set link speed 580 * @hw: pointer to hardware structure 581 * @speed: new link speed 582 * @autoneg: TRUE if autonegotiation enabled 583 * 584 * Configures link settings. Restarts the link. 585 * Performs autonegotiation if needed. 586 **/ 587 s32 ixgbe_setup_link(struct ixgbe_hw *hw, ixgbe_link_speed speed, 588 bool autoneg, 589 bool autoneg_wait_to_complete) 590 { 591 return ixgbe_call_func(hw, hw->mac.ops.setup_link, (hw, speed, 592 autoneg, autoneg_wait_to_complete), 593 IXGBE_NOT_IMPLEMENTED); 594 } 595 596 /** 597 * ixgbe_get_link_capabilities - Returns link capabilities 598 * @hw: pointer to hardware structure 599 * 600 * Determines the link capabilities of the current configuration. 601 **/ 602 s32 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 603 bool *autoneg) 604 { 605 return ixgbe_call_func(hw, hw->mac.ops.get_link_capabilities, (hw, 606 speed, autoneg), IXGBE_NOT_IMPLEMENTED); 607 } 608 609 /** 610 * ixgbe_led_on - Turn on LEDs 611 * @hw: pointer to hardware structure 612 * @index: led number to turn on 613 * 614 * Turns on the software controllable LEDs. 615 **/ 616 s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index) 617 { 618 return ixgbe_call_func(hw, hw->mac.ops.led_on, (hw, index), 619 IXGBE_NOT_IMPLEMENTED); 620 } 621 622 /** 623 * ixgbe_led_off - Turn off LEDs 624 * @hw: pointer to hardware structure 625 * @index: led number to turn off 626 * 627 * Turns off the software controllable LEDs. 628 **/ 629 s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index) 630 { 631 return ixgbe_call_func(hw, hw->mac.ops.led_off, (hw, index), 632 IXGBE_NOT_IMPLEMENTED); 633 } 634 635 /** 636 * ixgbe_blink_led_start - Blink LEDs 637 * @hw: pointer to hardware structure 638 * @index: led number to blink 639 * 640 * Blink LED based on index. 641 **/ 642 s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index) 643 { 644 return ixgbe_call_func(hw, hw->mac.ops.blink_led_start, (hw, index), 645 IXGBE_NOT_IMPLEMENTED); 646 } 647 648 /** 649 * ixgbe_blink_led_stop - Stop blinking LEDs 650 * @hw: pointer to hardware structure 651 * 652 * Stop blinking LED based on index. 653 **/ 654 s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index) 655 { 656 return ixgbe_call_func(hw, hw->mac.ops.blink_led_stop, (hw, index), 657 IXGBE_NOT_IMPLEMENTED); 658 } 659 660 /** 661 * ixgbe_init_eeprom_params - Initialize EEPROM parameters 662 * @hw: pointer to hardware structure 663 * 664 * Initializes the EEPROM parameters ixgbe_eeprom_info within the 665 * ixgbe_hw struct in order to set up EEPROM access. 666 **/ 667 s32 ixgbe_init_eeprom_params(struct ixgbe_hw *hw) 668 { 669 return ixgbe_call_func(hw, hw->eeprom.ops.init_params, (hw), 670 IXGBE_NOT_IMPLEMENTED); 671 } 672 673 674 /** 675 * ixgbe_write_eeprom - Write word to EEPROM 676 * @hw: pointer to hardware structure 677 * @offset: offset within the EEPROM to be written to 678 * @data: 16 bit word to be written to the EEPROM 679 * 680 * Writes 16 bit value to EEPROM. If ixgbe_eeprom_update_checksum is not 681 * called after this function, the EEPROM will most likely contain an 682 * invalid checksum. 683 **/ 684 s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data) 685 { 686 return ixgbe_call_func(hw, hw->eeprom.ops.write, (hw, offset, data), 687 IXGBE_NOT_IMPLEMENTED); 688 } 689 690 /** 691 * ixgbe_read_eeprom - Read word from EEPROM 692 * @hw: pointer to hardware structure 693 * @offset: offset within the EEPROM to be read 694 * @data: read 16 bit value from EEPROM 695 * 696 * Reads 16 bit value from EEPROM 697 **/ 698 s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data) 699 { 700 return ixgbe_call_func(hw, hw->eeprom.ops.read, (hw, offset, data), 701 IXGBE_NOT_IMPLEMENTED); 702 } 703 704 /** 705 * ixgbe_validate_eeprom_checksum - Validate EEPROM checksum 706 * @hw: pointer to hardware structure 707 * @checksum_val: calculated checksum 708 * 709 * Performs checksum calculation and validates the EEPROM checksum 710 **/ 711 s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val) 712 { 713 return ixgbe_call_func(hw, hw->eeprom.ops.validate_checksum, 714 (hw, checksum_val), IXGBE_NOT_IMPLEMENTED); 715 } 716 717 /** 718 * ixgbe_eeprom_update_checksum - Updates the EEPROM checksum 719 * @hw: pointer to hardware structure 720 **/ 721 s32 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw) 722 { 723 return ixgbe_call_func(hw, hw->eeprom.ops.update_checksum, (hw), 724 IXGBE_NOT_IMPLEMENTED); 725 } 726 727 /** 728 * ixgbe_insert_mac_addr - Find a RAR for this mac address 729 * @hw: pointer to hardware structure 730 * @addr: Address to put into receive address register 731 * @vmdq: VMDq pool to assign 732 * 733 * Puts an ethernet address into a receive address register, or 734 * finds the rar that it is aleady in; adds to the pool list 735 **/ 736 s32 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq) 737 { 738 return ixgbe_call_func(hw, hw->mac.ops.insert_mac_addr, 739 (hw, addr, vmdq), 740 IXGBE_NOT_IMPLEMENTED); 741 } 742 743 /** 744 * ixgbe_set_rar - Set Rx address register 745 * @hw: pointer to hardware structure 746 * @index: Receive address register to write 747 * @addr: Address to put into receive address register 748 * @vmdq: VMDq "set" 749 * @enable_addr: set flag that address is active 750 * 751 * Puts an ethernet address into a receive address register. 752 **/ 753 s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq, 754 u32 enable_addr) 755 { 756 return ixgbe_call_func(hw, hw->mac.ops.set_rar, (hw, index, addr, vmdq, 757 enable_addr), IXGBE_NOT_IMPLEMENTED); 758 } 759 760 /** 761 * ixgbe_clear_rar - Clear Rx address register 762 * @hw: pointer to hardware structure 763 * @index: Receive address register to write 764 * 765 * Puts an ethernet address into a receive address register. 766 **/ 767 s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index) 768 { 769 return ixgbe_call_func(hw, hw->mac.ops.clear_rar, (hw, index), 770 IXGBE_NOT_IMPLEMENTED); 771 } 772 773 /** 774 * ixgbe_set_vmdq - Associate a VMDq index with a receive address 775 * @hw: pointer to hardware structure 776 * @rar: receive address register index to associate with VMDq index 777 * @vmdq: VMDq set or pool index 778 **/ 779 s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq) 780 { 781 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq, (hw, rar, vmdq), 782 IXGBE_NOT_IMPLEMENTED); 783 } 784 785 /** 786 * ixgbe_clear_vmdq - Disassociate a VMDq index from a receive address 787 * @hw: pointer to hardware structure 788 * @rar: receive address register index to disassociate with VMDq index 789 * @vmdq: VMDq set or pool index 790 **/ 791 s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq) 792 { 793 return ixgbe_call_func(hw, hw->mac.ops.clear_vmdq, (hw, rar, vmdq), 794 IXGBE_NOT_IMPLEMENTED); 795 } 796 797 /** 798 * ixgbe_init_rx_addrs - Initializes receive address filters. 799 * @hw: pointer to hardware structure 800 * 801 * Places the MAC address in receive address register 0 and clears the rest 802 * of the receive address registers. Clears the multicast table. Assumes 803 * the receiver is in reset when the routine is called. 804 **/ 805 s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw) 806 { 807 return ixgbe_call_func(hw, hw->mac.ops.init_rx_addrs, (hw), 808 IXGBE_NOT_IMPLEMENTED); 809 } 810 811 /** 812 * ixgbe_get_num_rx_addrs - Returns the number of RAR entries. 813 * @hw: pointer to hardware structure 814 **/ 815 u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw) 816 { 817 return hw->mac.num_rar_entries; 818 } 819 820 /** 821 * ixgbe_update_uc_addr_list - Updates the MAC's list of secondary addresses 822 * @hw: pointer to hardware structure 823 * @addr_list: the list of new multicast addresses 824 * @addr_count: number of addresses 825 * @func: iterator function to walk the multicast address list 826 * 827 * The given list replaces any existing list. Clears the secondary addrs from 828 * receive address registers. Uses unused receive address registers for the 829 * first secondary addresses, and falls back to promiscuous mode as needed. 830 **/ 831 s32 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list, 832 u32 addr_count, ixgbe_mc_addr_itr func) 833 { 834 return ixgbe_call_func(hw, hw->mac.ops.update_uc_addr_list, (hw, 835 addr_list, addr_count, func), 836 IXGBE_NOT_IMPLEMENTED); 837 } 838 839 /** 840 * ixgbe_update_mc_addr_list - Updates the MAC's list of multicast addresses 841 * @hw: pointer to hardware structure 842 * @mc_addr_list: the list of new multicast addresses 843 * @mc_addr_count: number of addresses 844 * @func: iterator function to walk the multicast address list 845 * 846 * The given list replaces any existing list. Clears the MC addrs from receive 847 * address registers and the multicast table. Uses unused receive address 848 * registers for the first multicast addresses, and hashes the rest into the 849 * multicast table. 850 **/ 851 s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list, 852 u32 mc_addr_count, ixgbe_mc_addr_itr func) 853 { 854 return ixgbe_call_func(hw, hw->mac.ops.update_mc_addr_list, (hw, 855 mc_addr_list, mc_addr_count, func), 856 IXGBE_NOT_IMPLEMENTED); 857 } 858 859 /** 860 * ixgbe_enable_mc - Enable multicast address in RAR 861 * @hw: pointer to hardware structure 862 * 863 * Enables multicast address in RAR and the use of the multicast hash table. 864 **/ 865 s32 ixgbe_enable_mc(struct ixgbe_hw *hw) 866 { 867 return ixgbe_call_func(hw, hw->mac.ops.enable_mc, (hw), 868 IXGBE_NOT_IMPLEMENTED); 869 } 870 871 /** 872 * ixgbe_disable_mc - Disable multicast address in RAR 873 * @hw: pointer to hardware structure 874 * 875 * Disables multicast address in RAR and the use of the multicast hash table. 876 **/ 877 s32 ixgbe_disable_mc(struct ixgbe_hw *hw) 878 { 879 return ixgbe_call_func(hw, hw->mac.ops.disable_mc, (hw), 880 IXGBE_NOT_IMPLEMENTED); 881 } 882 883 /** 884 * ixgbe_clear_vfta - Clear VLAN filter table 885 * @hw: pointer to hardware structure 886 * 887 * Clears the VLAN filer table, and the VMDq index associated with the filter 888 **/ 889 s32 ixgbe_clear_vfta(struct ixgbe_hw *hw) 890 { 891 return ixgbe_call_func(hw, hw->mac.ops.clear_vfta, (hw), 892 IXGBE_NOT_IMPLEMENTED); 893 } 894 895 /** 896 * ixgbe_set_vfta - Set VLAN filter table 897 * @hw: pointer to hardware structure 898 * @vlan: VLAN id to write to VLAN filter 899 * @vind: VMDq output index that maps queue to VLAN id in VFTA 900 * @vlan_on: boolean flag to turn on/off VLAN in VFTA 901 * 902 * Turn on/off specified VLAN in the VLAN filter table. 903 **/ 904 s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on) 905 { 906 return ixgbe_call_func(hw, hw->mac.ops.set_vfta, (hw, vlan, vind, 907 vlan_on), IXGBE_NOT_IMPLEMENTED); 908 } 909 910 /** 911 * ixgbe_fc_enable - Enable flow control 912 * @hw: pointer to hardware structure 913 * @packetbuf_num: packet buffer number (0-7) 914 * 915 * Configures the flow control settings based on SW configuration. 916 **/ 917 s32 ixgbe_fc_enable(struct ixgbe_hw *hw, s32 packetbuf_num) 918 { 919 return ixgbe_call_func(hw, hw->mac.ops.fc_enable, (hw, packetbuf_num), 920 IXGBE_NOT_IMPLEMENTED); 921 } 922 923 /** 924 * ixgbe_read_analog_reg8 - Reads 8 bit analog register 925 * @hw: pointer to hardware structure 926 * @reg: analog register to read 927 * @val: read value 928 * 929 * Performs write operation to analog register specified. 930 **/ 931 s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val) 932 { 933 return ixgbe_call_func(hw, hw->mac.ops.read_analog_reg8, (hw, reg, 934 val), IXGBE_NOT_IMPLEMENTED); 935 } 936 937 /** 938 * ixgbe_write_analog_reg8 - Writes 8 bit analog register 939 * @hw: pointer to hardware structure 940 * @reg: analog register to write 941 * @val: value to write 942 * 943 * Performs write operation to Atlas analog register specified. 944 **/ 945 s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val) 946 { 947 return ixgbe_call_func(hw, hw->mac.ops.write_analog_reg8, (hw, reg, 948 val), IXGBE_NOT_IMPLEMENTED); 949 } 950 951 /** 952 * ixgbe_init_uta_tables - Initializes Unicast Table Arrays. 953 * @hw: pointer to hardware structure 954 * 955 * Initializes the Unicast Table Arrays to zero on device load. This 956 * is part of the Rx init addr execution path. 957 **/ 958 s32 ixgbe_init_uta_tables(struct ixgbe_hw *hw) 959 { 960 return ixgbe_call_func(hw, hw->mac.ops.init_uta_tables, (hw), 961 IXGBE_NOT_IMPLEMENTED); 962 } 963 964 /** 965 * ixgbe_read_i2c_byte - Reads 8 bit word over I2C at specified device address 966 * @hw: pointer to hardware structure 967 * @byte_offset: byte offset to read 968 * @data: value read 969 * 970 * Performs byte read operation to SFP module's EEPROM over I2C interface. 971 **/ 972 s32 ixgbe_read_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr, 973 u8 *data) 974 { 975 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_byte, (hw, byte_offset, 976 dev_addr, data), IXGBE_NOT_IMPLEMENTED); 977 } 978 979 /** 980 * ixgbe_write_i2c_byte - Writes 8 bit word over I2C 981 * @hw: pointer to hardware structure 982 * @byte_offset: byte offset to write 983 * @data: value to write 984 * 985 * Performs byte write operation to SFP module's EEPROM over I2C interface 986 * at a specified device address. 987 **/ 988 s32 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr, 989 u8 data) 990 { 991 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_byte, (hw, byte_offset, 992 dev_addr, data), IXGBE_NOT_IMPLEMENTED); 993 } 994 995 /** 996 * ixgbe_write_i2c_eeprom - Writes 8 bit EEPROM word over I2C interface 997 * @hw: pointer to hardware structure 998 * @byte_offset: EEPROM byte offset to write 999 * @eeprom_data: value to write 1000 * 1001 * Performs byte write operation to SFP module's EEPROM over I2C interface. 1002 **/ 1003 s32 ixgbe_write_i2c_eeprom(struct ixgbe_hw *hw, 1004 u8 byte_offset, u8 eeprom_data) 1005 { 1006 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_eeprom, 1007 (hw, byte_offset, eeprom_data), 1008 IXGBE_NOT_IMPLEMENTED); 1009 } 1010 1011 /** 1012 * ixgbe_read_i2c_eeprom - Reads 8 bit EEPROM word over I2C interface 1013 * @hw: pointer to hardware structure 1014 * @byte_offset: EEPROM byte offset to read 1015 * @eeprom_data: value read 1016 * 1017 * Performs byte read operation to SFP module's EEPROM over I2C interface. 1018 **/ 1019 s32 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data) 1020 { 1021 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_eeprom, 1022 (hw, byte_offset, eeprom_data), 1023 IXGBE_NOT_IMPLEMENTED); 1024 } 1025 1026 /** 1027 * ixgbe_get_supported_physical_layer - Returns physical layer type 1028 * @hw: pointer to hardware structure 1029 * 1030 * Determines physical layer capabilities of the current configuration. 1031 **/ 1032 u32 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw) 1033 { 1034 return ixgbe_call_func(hw, hw->mac.ops.get_supported_physical_layer, 1035 (hw), IXGBE_PHYSICAL_LAYER_UNKNOWN); 1036 } 1037 1038 /** 1039 * ixgbe_enable_rx_dma - Enables Rx DMA unit, dependant on device specifics 1040 * @hw: pointer to hardware structure 1041 * @regval: bitfield to write to the Rx DMA register 1042 * 1043 * Enables the Rx DMA unit of the device. 1044 **/ 1045 s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval) 1046 { 1047 return ixgbe_call_func(hw, hw->mac.ops.enable_rx_dma, 1048 (hw, regval), IXGBE_NOT_IMPLEMENTED); 1049 } 1050 1051 /** 1052 * ixgbe_acquire_swfw_semaphore - Acquire SWFW semaphore 1053 * @hw: pointer to hardware structure 1054 * @mask: Mask to specify which semaphore to acquire 1055 * 1056 * Acquires the SWFW semaphore through SW_FW_SYNC register for the specified 1057 * function (CSR, PHY0, PHY1, EEPROM, Flash) 1058 **/ 1059 s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u16 mask) 1060 { 1061 return ixgbe_call_func(hw, hw->mac.ops.acquire_swfw_sync, 1062 (hw, mask), IXGBE_NOT_IMPLEMENTED); 1063 } 1064 1065 /** 1066 * ixgbe_release_swfw_semaphore - Release SWFW semaphore 1067 * @hw: pointer to hardware structure 1068 * @mask: Mask to specify which semaphore to release 1069 * 1070 * Releases the SWFW semaphore through SW_FW_SYNC register for the specified 1071 * function (CSR, PHY0, PHY1, EEPROM, Flash) 1072 **/ 1073 void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u16 mask) 1074 { 1075 if (hw->mac.ops.release_swfw_sync) 1076 hw->mac.ops.release_swfw_sync(hw, mask); 1077 } 1078 1079