1 /****************************************************************************** 2 3 Copyright (c) 2001-2010, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32 ******************************************************************************/ 33 /*$FreeBSD: src/sys/dev/ixgbe/ixgbe_api.c,v 1.11 2010/11/26 22:46:32 jfv Exp $*/ 34 /*$NetBSD: ixgbe_api.c,v 1.2 2014/04/08 19:39:06 christos Exp $*/ 35 36 #include "ixgbe_api.h" 37 #include "ixgbe_common.h" 38 39 extern s32 ixgbe_init_ops_82598(struct ixgbe_hw *hw); 40 extern s32 ixgbe_init_ops_82599(struct ixgbe_hw *hw); 41 extern s32 ixgbe_init_ops_vf(struct ixgbe_hw *hw); 42 43 /** 44 * ixgbe_init_shared_code - Initialize the shared code 45 * @hw: pointer to hardware structure 46 * 47 * This will assign function pointers and assign the MAC type and PHY code. 48 * Does not touch the hardware. This function must be called prior to any 49 * other function in the shared code. The ixgbe_hw structure should be 50 * memset to 0 prior to calling this function. The following fields in 51 * hw structure should be filled in prior to calling this function: 52 * back, device_id, vendor_id, subsystem_device_id, 53 * subsystem_vendor_id, and revision_id 54 **/ 55 s32 ixgbe_init_shared_code(struct ixgbe_hw *hw) 56 { 57 s32 status; 58 59 DEBUGFUNC("ixgbe_init_shared_code"); 60 61 /* 62 * Set the mac type 63 */ 64 ixgbe_set_mac_type(hw); 65 66 switch (hw->mac.type) { 67 case ixgbe_mac_82598EB: 68 status = ixgbe_init_ops_82598(hw); 69 break; 70 case ixgbe_mac_82599EB: 71 status = ixgbe_init_ops_82599(hw); 72 break; 73 case ixgbe_mac_82599_vf: 74 status = ixgbe_init_ops_vf(hw); 75 break; 76 default: 77 status = IXGBE_ERR_DEVICE_NOT_SUPPORTED; 78 break; 79 } 80 81 return status; 82 } 83 84 /** 85 * ixgbe_set_mac_type - Sets MAC type 86 * @hw: pointer to the HW structure 87 * 88 * This function sets the mac type of the adapter based on the 89 * vendor ID and device ID stored in the hw structure. 90 **/ 91 s32 ixgbe_set_mac_type(struct ixgbe_hw *hw) 92 { 93 s32 ret_val = IXGBE_SUCCESS; 94 95 DEBUGFUNC("ixgbe_set_mac_type\n"); 96 97 if (hw->vendor_id == IXGBE_INTEL_VENDOR_ID) { 98 switch (hw->device_id) { 99 case IXGBE_DEV_ID_82598: 100 case IXGBE_DEV_ID_82598_BX: 101 case IXGBE_DEV_ID_82598AF_SINGLE_PORT: 102 case IXGBE_DEV_ID_82598AF_DUAL_PORT: 103 case IXGBE_DEV_ID_82598AT: 104 case IXGBE_DEV_ID_82598AT2: 105 case IXGBE_DEV_ID_82598EB_CX4: 106 case IXGBE_DEV_ID_82598_CX4_DUAL_PORT: 107 case IXGBE_DEV_ID_82598_DA_DUAL_PORT: 108 case IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM: 109 case IXGBE_DEV_ID_82598EB_XF_LR: 110 case IXGBE_DEV_ID_82598EB_SFP_LOM: 111 hw->mac.type = ixgbe_mac_82598EB; 112 break; 113 case IXGBE_DEV_ID_82599_KX4: 114 case IXGBE_DEV_ID_82599_KX4_MEZZ: 115 case IXGBE_DEV_ID_82599_XAUI_LOM: 116 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE: 117 case IXGBE_DEV_ID_82599_SFP: 118 case IXGBE_DEV_ID_82599_BACKPLANE_FCOE: 119 case IXGBE_DEV_ID_82599_SFP_FCOE: 120 case IXGBE_DEV_ID_82599_CX4: 121 case IXGBE_DEV_ID_82599_T3_LOM: 122 case IXGBE_DEV_ID_82599_SFP_DELL: 123 hw->mac.type = ixgbe_mac_82599EB; 124 break; 125 case IXGBE_DEV_ID_82599_VF: 126 hw->mac.type = ixgbe_mac_82599_vf; 127 break; 128 default: 129 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED; 130 break; 131 } 132 } else { 133 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED; 134 } 135 136 DEBUGOUT2("ixgbe_set_mac_type found mac: %d, returns: %d\n", 137 hw->mac.type, ret_val); 138 return ret_val; 139 } 140 141 /** 142 * ixgbe_init_hw - Initialize the hardware 143 * @hw: pointer to hardware structure 144 * 145 * Initialize the hardware by resetting and then starting the hardware 146 **/ 147 s32 ixgbe_init_hw(struct ixgbe_hw *hw) 148 { 149 return ixgbe_call_func(hw, hw->mac.ops.init_hw, (hw), 150 IXGBE_NOT_IMPLEMENTED); 151 } 152 153 /** 154 * ixgbe_reset_hw - Performs a hardware reset 155 * @hw: pointer to hardware structure 156 * 157 * Resets the hardware by resetting the transmit and receive units, masks and 158 * clears all interrupts, performs a PHY reset, and performs a MAC reset 159 **/ 160 s32 ixgbe_reset_hw(struct ixgbe_hw *hw) 161 { 162 return ixgbe_call_func(hw, hw->mac.ops.reset_hw, (hw), 163 IXGBE_NOT_IMPLEMENTED); 164 } 165 166 /** 167 * ixgbe_start_hw - Prepares hardware for Rx/Tx 168 * @hw: pointer to hardware structure 169 * 170 * Starts the hardware by filling the bus info structure and media type, 171 * clears all on chip counters, initializes receive address registers, 172 * multicast table, VLAN filter table, calls routine to setup link and 173 * flow control settings, and leaves transmit and receive units disabled 174 * and uninitialized. 175 **/ 176 s32 ixgbe_start_hw(struct ixgbe_hw *hw) 177 { 178 return ixgbe_call_func(hw, hw->mac.ops.start_hw, (hw), 179 IXGBE_NOT_IMPLEMENTED); 180 } 181 182 /** 183 * ixgbe_enable_relaxed_ordering - Enables tx relaxed ordering, 184 * which is disabled by default in ixgbe_start_hw(); 185 * 186 * @hw: pointer to hardware structure 187 * 188 * Enable relaxed ordering; 189 **/ 190 void ixgbe_enable_relaxed_ordering(struct ixgbe_hw *hw) 191 { 192 if (hw->mac.ops.enable_relaxed_ordering) 193 hw->mac.ops.enable_relaxed_ordering(hw); 194 } 195 196 /** 197 * ixgbe_clear_hw_cntrs - Clear hardware counters 198 * @hw: pointer to hardware structure 199 * 200 * Clears all hardware statistics counters by reading them from the hardware 201 * Statistics counters are clear on read. 202 **/ 203 s32 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw) 204 { 205 return ixgbe_call_func(hw, hw->mac.ops.clear_hw_cntrs, (hw), 206 IXGBE_NOT_IMPLEMENTED); 207 } 208 209 /** 210 * ixgbe_get_media_type - Get media type 211 * @hw: pointer to hardware structure 212 * 213 * Returns the media type (fiber, copper, backplane) 214 **/ 215 enum ixgbe_media_type ixgbe_get_media_type(struct ixgbe_hw *hw) 216 { 217 return ixgbe_call_func(hw, hw->mac.ops.get_media_type, (hw), 218 ixgbe_media_type_unknown); 219 } 220 221 /** 222 * ixgbe_get_mac_addr - Get MAC address 223 * @hw: pointer to hardware structure 224 * @mac_addr: Adapter MAC address 225 * 226 * Reads the adapter's MAC address from the first Receive Address Register 227 * (RAR0) A reset of the adapter must have been performed prior to calling 228 * this function in order for the MAC address to have been loaded from the 229 * EEPROM into RAR0 230 **/ 231 s32 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr) 232 { 233 return ixgbe_call_func(hw, hw->mac.ops.get_mac_addr, 234 (hw, mac_addr), IXGBE_NOT_IMPLEMENTED); 235 } 236 237 /** 238 * ixgbe_get_san_mac_addr - Get SAN MAC address 239 * @hw: pointer to hardware structure 240 * @san_mac_addr: SAN MAC address 241 * 242 * Reads the SAN MAC address from the EEPROM, if it's available. This is 243 * per-port, so set_lan_id() must be called before reading the addresses. 244 **/ 245 s32 ixgbe_get_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr) 246 { 247 return ixgbe_call_func(hw, hw->mac.ops.get_san_mac_addr, 248 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED); 249 } 250 251 /** 252 * ixgbe_set_san_mac_addr - Write a SAN MAC address 253 * @hw: pointer to hardware structure 254 * @san_mac_addr: SAN MAC address 255 * 256 * Writes A SAN MAC address to the EEPROM. 257 **/ 258 s32 ixgbe_set_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr) 259 { 260 return ixgbe_call_func(hw, hw->mac.ops.set_san_mac_addr, 261 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED); 262 } 263 264 /** 265 * ixgbe_get_device_caps - Get additional device capabilities 266 * @hw: pointer to hardware structure 267 * @device_caps: the EEPROM word for device capabilities 268 * 269 * Reads the extra device capabilities from the EEPROM 270 **/ 271 s32 ixgbe_get_device_caps(struct ixgbe_hw *hw, u16 *device_caps) 272 { 273 return ixgbe_call_func(hw, hw->mac.ops.get_device_caps, 274 (hw, device_caps), IXGBE_NOT_IMPLEMENTED); 275 } 276 277 /** 278 * ixgbe_get_wwn_prefix - Get alternative WWNN/WWPN prefix from the EEPROM 279 * @hw: pointer to hardware structure 280 * @wwnn_prefix: the alternative WWNN prefix 281 * @wwpn_prefix: the alternative WWPN prefix 282 * 283 * This function will read the EEPROM from the alternative SAN MAC address 284 * block to check the support for the alternative WWNN/WWPN prefix support. 285 **/ 286 s32 ixgbe_get_wwn_prefix(struct ixgbe_hw *hw, u16 *wwnn_prefix, 287 u16 *wwpn_prefix) 288 { 289 return ixgbe_call_func(hw, hw->mac.ops.get_wwn_prefix, 290 (hw, wwnn_prefix, wwpn_prefix), 291 IXGBE_NOT_IMPLEMENTED); 292 } 293 294 /** 295 * ixgbe_get_fcoe_boot_status - Get FCOE boot status from EEPROM 296 * @hw: pointer to hardware structure 297 * @bs: the fcoe boot status 298 * 299 * This function will read the FCOE boot status from the iSCSI FCOE block 300 **/ 301 s32 ixgbe_get_fcoe_boot_status(struct ixgbe_hw *hw, u16 *bs) 302 { 303 return ixgbe_call_func(hw, hw->mac.ops.get_fcoe_boot_status, 304 (hw, bs), 305 IXGBE_NOT_IMPLEMENTED); 306 } 307 308 /** 309 * ixgbe_get_bus_info - Set PCI bus info 310 * @hw: pointer to hardware structure 311 * 312 * Sets the PCI bus info (speed, width, type) within the ixgbe_hw structure 313 **/ 314 s32 ixgbe_get_bus_info(struct ixgbe_hw *hw) 315 { 316 return ixgbe_call_func(hw, hw->mac.ops.get_bus_info, (hw), 317 IXGBE_NOT_IMPLEMENTED); 318 } 319 320 /** 321 * ixgbe_get_num_of_tx_queues - Get Tx queues 322 * @hw: pointer to hardware structure 323 * 324 * Returns the number of transmit queues for the given adapter. 325 **/ 326 u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw) 327 { 328 return hw->mac.max_tx_queues; 329 } 330 331 /** 332 * ixgbe_get_num_of_rx_queues - Get Rx queues 333 * @hw: pointer to hardware structure 334 * 335 * Returns the number of receive queues for the given adapter. 336 **/ 337 u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw) 338 { 339 return hw->mac.max_rx_queues; 340 } 341 342 /** 343 * ixgbe_stop_adapter - Disable Rx/Tx units 344 * @hw: pointer to hardware structure 345 * 346 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts, 347 * disables transmit and receive units. The adapter_stopped flag is used by 348 * the shared code and drivers to determine if the adapter is in a stopped 349 * state and should not touch the hardware. 350 **/ 351 s32 ixgbe_stop_adapter(struct ixgbe_hw *hw) 352 { 353 return ixgbe_call_func(hw, hw->mac.ops.stop_adapter, (hw), 354 IXGBE_NOT_IMPLEMENTED); 355 } 356 357 /** 358 * ixgbe_read_pba_string - Reads part number string from EEPROM 359 * @hw: pointer to hardware structure 360 * @pba_num: stores the part number string from the EEPROM 361 * @pba_num_size: part number string buffer length 362 * 363 * Reads the part number string from the EEPROM. 364 **/ 365 s32 ixgbe_read_pba_string(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size) 366 { 367 return ixgbe_read_pba_string_generic(hw, pba_num, pba_num_size); 368 } 369 370 /** 371 * ixgbe_read_pba_length - Reads part number string length from EEPROM 372 * @hw: pointer to hardware structure 373 * @pba_num_size: part number string buffer length 374 * 375 * Reads the part number length from the EEPROM. 376 * Returns expected buffer size in pba_num_size. 377 **/ 378 s32 ixgbe_read_pba_length(struct ixgbe_hw *hw, u32 *pba_num_size) 379 { 380 return ixgbe_read_pba_length_generic(hw, pba_num_size); 381 } 382 383 /** 384 * ixgbe_read_pba_num - Reads part number from EEPROM 385 * @hw: pointer to hardware structure 386 * @pba_num: stores the part number from the EEPROM 387 * 388 * Reads the part number from the EEPROM. 389 **/ 390 s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num) 391 { 392 return ixgbe_read_pba_num_generic(hw, pba_num); 393 } 394 395 /** 396 * ixgbe_identify_phy - Get PHY type 397 * @hw: pointer to hardware structure 398 * 399 * Determines the physical layer module found on the current adapter. 400 **/ 401 s32 ixgbe_identify_phy(struct ixgbe_hw *hw) 402 { 403 s32 status = IXGBE_SUCCESS; 404 405 if (hw->phy.type == ixgbe_phy_unknown) { 406 status = ixgbe_call_func(hw, hw->phy.ops.identify, (hw), 407 IXGBE_NOT_IMPLEMENTED); 408 } 409 410 return status; 411 } 412 413 /** 414 * ixgbe_reset_phy - Perform a PHY reset 415 * @hw: pointer to hardware structure 416 **/ 417 s32 ixgbe_reset_phy(struct ixgbe_hw *hw) 418 { 419 s32 status = IXGBE_SUCCESS; 420 421 if (hw->phy.type == ixgbe_phy_unknown) { 422 if (ixgbe_identify_phy(hw) != IXGBE_SUCCESS) 423 status = IXGBE_ERR_PHY; 424 } 425 426 if (status == IXGBE_SUCCESS) { 427 status = ixgbe_call_func(hw, hw->phy.ops.reset, (hw), 428 IXGBE_NOT_IMPLEMENTED); 429 } 430 return status; 431 } 432 433 /** 434 * ixgbe_get_phy_firmware_version - 435 * @hw: pointer to hardware structure 436 * @firmware_version: pointer to firmware version 437 **/ 438 s32 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw, u16 *firmware_version) 439 { 440 s32 status = IXGBE_SUCCESS; 441 442 status = ixgbe_call_func(hw, hw->phy.ops.get_firmware_version, 443 (hw, firmware_version), 444 IXGBE_NOT_IMPLEMENTED); 445 return status; 446 } 447 448 /** 449 * ixgbe_read_phy_reg - Read PHY register 450 * @hw: pointer to hardware structure 451 * @reg_addr: 32 bit address of PHY register to read 452 * @phy_data: Pointer to read data from PHY register 453 * 454 * Reads a value from a specified PHY register 455 **/ 456 s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, 457 u16 *phy_data) 458 { 459 if (hw->phy.id == 0) 460 ixgbe_identify_phy(hw); 461 462 return ixgbe_call_func(hw, hw->phy.ops.read_reg, (hw, reg_addr, 463 device_type, phy_data), IXGBE_NOT_IMPLEMENTED); 464 } 465 466 /** 467 * ixgbe_write_phy_reg - Write PHY register 468 * @hw: pointer to hardware structure 469 * @reg_addr: 32 bit PHY register to write 470 * @phy_data: Data to write to the PHY register 471 * 472 * Writes a value to specified PHY register 473 **/ 474 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, 475 u16 phy_data) 476 { 477 if (hw->phy.id == 0) 478 ixgbe_identify_phy(hw); 479 480 return ixgbe_call_func(hw, hw->phy.ops.write_reg, (hw, reg_addr, 481 device_type, phy_data), IXGBE_NOT_IMPLEMENTED); 482 } 483 484 /** 485 * ixgbe_setup_phy_link - Restart PHY autoneg 486 * @hw: pointer to hardware structure 487 * 488 * Restart autonegotiation and PHY and waits for completion. 489 **/ 490 s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw) 491 { 492 return ixgbe_call_func(hw, hw->phy.ops.setup_link, (hw), 493 IXGBE_NOT_IMPLEMENTED); 494 } 495 496 /** 497 * ixgbe_check_phy_link - Determine link and speed status 498 * @hw: pointer to hardware structure 499 * 500 * Reads a PHY register to determine if link is up and the current speed for 501 * the PHY. 502 **/ 503 s32 ixgbe_check_phy_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 504 bool *link_up) 505 { 506 return ixgbe_call_func(hw, hw->phy.ops.check_link, (hw, speed, 507 link_up), IXGBE_NOT_IMPLEMENTED); 508 } 509 510 /** 511 * ixgbe_setup_phy_link_speed - Set auto advertise 512 * @hw: pointer to hardware structure 513 * @speed: new link speed 514 * @autoneg: TRUE if autonegotiation enabled 515 * 516 * Sets the auto advertised capabilities 517 **/ 518 s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed, 519 bool autoneg, 520 bool autoneg_wait_to_complete) 521 { 522 return ixgbe_call_func(hw, hw->phy.ops.setup_link_speed, (hw, speed, 523 autoneg, autoneg_wait_to_complete), 524 IXGBE_NOT_IMPLEMENTED); 525 } 526 527 /** 528 * ixgbe_check_link - Get link and speed status 529 * @hw: pointer to hardware structure 530 * 531 * Reads the links register to determine if link is up and the current speed 532 **/ 533 s32 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 534 bool *link_up, bool link_up_wait_to_complete) 535 { 536 return ixgbe_call_func(hw, hw->mac.ops.check_link, (hw, speed, 537 link_up, link_up_wait_to_complete), 538 IXGBE_NOT_IMPLEMENTED); 539 } 540 541 /** 542 * ixgbe_disable_tx_laser - Disable Tx laser 543 * @hw: pointer to hardware structure 544 * 545 * If the driver needs to disable the laser on SFI optics. 546 **/ 547 void ixgbe_disable_tx_laser(struct ixgbe_hw *hw) 548 { 549 if (hw->mac.ops.disable_tx_laser) 550 hw->mac.ops.disable_tx_laser(hw); 551 } 552 553 /** 554 * ixgbe_enable_tx_laser - Enable Tx laser 555 * @hw: pointer to hardware structure 556 * 557 * If the driver needs to enable the laser on SFI optics. 558 **/ 559 void ixgbe_enable_tx_laser(struct ixgbe_hw *hw) 560 { 561 if (hw->mac.ops.enable_tx_laser) 562 hw->mac.ops.enable_tx_laser(hw); 563 } 564 565 /** 566 * ixgbe_flap_tx_laser - flap Tx laser to start autotry process 567 * @hw: pointer to hardware structure 568 * 569 * When the driver changes the link speeds that it can support then 570 * flap the tx laser to alert the link partner to start autotry 571 * process on its end. 572 **/ 573 void ixgbe_flap_tx_laser(struct ixgbe_hw *hw) 574 { 575 if (hw->mac.ops.flap_tx_laser) 576 hw->mac.ops.flap_tx_laser(hw); 577 } 578 579 /** 580 * ixgbe_setup_link - Set link speed 581 * @hw: pointer to hardware structure 582 * @speed: new link speed 583 * @autoneg: TRUE if autonegotiation enabled 584 * 585 * Configures link settings. Restarts the link. 586 * Performs autonegotiation if needed. 587 **/ 588 s32 ixgbe_setup_link(struct ixgbe_hw *hw, ixgbe_link_speed speed, 589 bool autoneg, 590 bool autoneg_wait_to_complete) 591 { 592 return ixgbe_call_func(hw, hw->mac.ops.setup_link, (hw, speed, 593 autoneg, autoneg_wait_to_complete), 594 IXGBE_NOT_IMPLEMENTED); 595 } 596 597 /** 598 * ixgbe_get_link_capabilities - Returns link capabilities 599 * @hw: pointer to hardware structure 600 * 601 * Determines the link capabilities of the current configuration. 602 **/ 603 s32 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 604 bool *autoneg) 605 { 606 return ixgbe_call_func(hw, hw->mac.ops.get_link_capabilities, (hw, 607 speed, autoneg), IXGBE_NOT_IMPLEMENTED); 608 } 609 610 /** 611 * ixgbe_led_on - Turn on LEDs 612 * @hw: pointer to hardware structure 613 * @index: led number to turn on 614 * 615 * Turns on the software controllable LEDs. 616 **/ 617 s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index) 618 { 619 return ixgbe_call_func(hw, hw->mac.ops.led_on, (hw, index), 620 IXGBE_NOT_IMPLEMENTED); 621 } 622 623 /** 624 * ixgbe_led_off - Turn off LEDs 625 * @hw: pointer to hardware structure 626 * @index: led number to turn off 627 * 628 * Turns off the software controllable LEDs. 629 **/ 630 s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index) 631 { 632 return ixgbe_call_func(hw, hw->mac.ops.led_off, (hw, index), 633 IXGBE_NOT_IMPLEMENTED); 634 } 635 636 /** 637 * ixgbe_blink_led_start - Blink LEDs 638 * @hw: pointer to hardware structure 639 * @index: led number to blink 640 * 641 * Blink LED based on index. 642 **/ 643 s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index) 644 { 645 return ixgbe_call_func(hw, hw->mac.ops.blink_led_start, (hw, index), 646 IXGBE_NOT_IMPLEMENTED); 647 } 648 649 /** 650 * ixgbe_blink_led_stop - Stop blinking LEDs 651 * @hw: pointer to hardware structure 652 * 653 * Stop blinking LED based on index. 654 **/ 655 s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index) 656 { 657 return ixgbe_call_func(hw, hw->mac.ops.blink_led_stop, (hw, index), 658 IXGBE_NOT_IMPLEMENTED); 659 } 660 661 /** 662 * ixgbe_init_eeprom_params - Initialize EEPROM parameters 663 * @hw: pointer to hardware structure 664 * 665 * Initializes the EEPROM parameters ixgbe_eeprom_info within the 666 * ixgbe_hw struct in order to set up EEPROM access. 667 **/ 668 s32 ixgbe_init_eeprom_params(struct ixgbe_hw *hw) 669 { 670 return ixgbe_call_func(hw, hw->eeprom.ops.init_params, (hw), 671 IXGBE_NOT_IMPLEMENTED); 672 } 673 674 675 /** 676 * ixgbe_write_eeprom - Write word to EEPROM 677 * @hw: pointer to hardware structure 678 * @offset: offset within the EEPROM to be written to 679 * @data: 16 bit word to be written to the EEPROM 680 * 681 * Writes 16 bit value to EEPROM. If ixgbe_eeprom_update_checksum is not 682 * called after this function, the EEPROM will most likely contain an 683 * invalid checksum. 684 **/ 685 s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data) 686 { 687 return ixgbe_call_func(hw, hw->eeprom.ops.write, (hw, offset, data), 688 IXGBE_NOT_IMPLEMENTED); 689 } 690 691 /** 692 * ixgbe_read_eeprom - Read word from EEPROM 693 * @hw: pointer to hardware structure 694 * @offset: offset within the EEPROM to be read 695 * @data: read 16 bit value from EEPROM 696 * 697 * Reads 16 bit value from EEPROM 698 **/ 699 s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data) 700 { 701 return ixgbe_call_func(hw, hw->eeprom.ops.read, (hw, offset, data), 702 IXGBE_NOT_IMPLEMENTED); 703 } 704 705 /** 706 * ixgbe_validate_eeprom_checksum - Validate EEPROM checksum 707 * @hw: pointer to hardware structure 708 * @checksum_val: calculated checksum 709 * 710 * Performs checksum calculation and validates the EEPROM checksum 711 **/ 712 s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val) 713 { 714 return ixgbe_call_func(hw, hw->eeprom.ops.validate_checksum, 715 (hw, checksum_val), IXGBE_NOT_IMPLEMENTED); 716 } 717 718 /** 719 * ixgbe_eeprom_update_checksum - Updates the EEPROM checksum 720 * @hw: pointer to hardware structure 721 **/ 722 s32 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw) 723 { 724 return ixgbe_call_func(hw, hw->eeprom.ops.update_checksum, (hw), 725 IXGBE_NOT_IMPLEMENTED); 726 } 727 728 /** 729 * ixgbe_insert_mac_addr - Find a RAR for this mac address 730 * @hw: pointer to hardware structure 731 * @addr: Address to put into receive address register 732 * @vmdq: VMDq pool to assign 733 * 734 * Puts an ethernet address into a receive address register, or 735 * finds the rar that it is aleady in; adds to the pool list 736 **/ 737 s32 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq) 738 { 739 return ixgbe_call_func(hw, hw->mac.ops.insert_mac_addr, 740 (hw, addr, vmdq), 741 IXGBE_NOT_IMPLEMENTED); 742 } 743 744 /** 745 * ixgbe_set_rar - Set Rx address register 746 * @hw: pointer to hardware structure 747 * @index: Receive address register to write 748 * @addr: Address to put into receive address register 749 * @vmdq: VMDq "set" 750 * @enable_addr: set flag that address is active 751 * 752 * Puts an ethernet address into a receive address register. 753 **/ 754 s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq, 755 u32 enable_addr) 756 { 757 return ixgbe_call_func(hw, hw->mac.ops.set_rar, (hw, index, addr, vmdq, 758 enable_addr), IXGBE_NOT_IMPLEMENTED); 759 } 760 761 /** 762 * ixgbe_clear_rar - Clear Rx address register 763 * @hw: pointer to hardware structure 764 * @index: Receive address register to write 765 * 766 * Puts an ethernet address into a receive address register. 767 **/ 768 s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index) 769 { 770 return ixgbe_call_func(hw, hw->mac.ops.clear_rar, (hw, index), 771 IXGBE_NOT_IMPLEMENTED); 772 } 773 774 /** 775 * ixgbe_set_vmdq - Associate a VMDq index with a receive address 776 * @hw: pointer to hardware structure 777 * @rar: receive address register index to associate with VMDq index 778 * @vmdq: VMDq set or pool index 779 **/ 780 s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq) 781 { 782 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq, (hw, rar, vmdq), 783 IXGBE_NOT_IMPLEMENTED); 784 } 785 786 /** 787 * ixgbe_clear_vmdq - Disassociate a VMDq index from a receive address 788 * @hw: pointer to hardware structure 789 * @rar: receive address register index to disassociate with VMDq index 790 * @vmdq: VMDq set or pool index 791 **/ 792 s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq) 793 { 794 return ixgbe_call_func(hw, hw->mac.ops.clear_vmdq, (hw, rar, vmdq), 795 IXGBE_NOT_IMPLEMENTED); 796 } 797 798 /** 799 * ixgbe_init_rx_addrs - Initializes receive address filters. 800 * @hw: pointer to hardware structure 801 * 802 * Places the MAC address in receive address register 0 and clears the rest 803 * of the receive address registers. Clears the multicast table. Assumes 804 * the receiver is in reset when the routine is called. 805 **/ 806 s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw) 807 { 808 return ixgbe_call_func(hw, hw->mac.ops.init_rx_addrs, (hw), 809 IXGBE_NOT_IMPLEMENTED); 810 } 811 812 /** 813 * ixgbe_get_num_rx_addrs - Returns the number of RAR entries. 814 * @hw: pointer to hardware structure 815 **/ 816 u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw) 817 { 818 return hw->mac.num_rar_entries; 819 } 820 821 /** 822 * ixgbe_update_uc_addr_list - Updates the MAC's list of secondary addresses 823 * @hw: pointer to hardware structure 824 * @addr_list: the list of new multicast addresses 825 * @addr_count: number of addresses 826 * @func: iterator function to walk the multicast address list 827 * 828 * The given list replaces any existing list. Clears the secondary addrs from 829 * receive address registers. Uses unused receive address registers for the 830 * first secondary addresses, and falls back to promiscuous mode as needed. 831 **/ 832 s32 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list, 833 u32 addr_count, ixgbe_mc_addr_itr func) 834 { 835 return ixgbe_call_func(hw, hw->mac.ops.update_uc_addr_list, (hw, 836 addr_list, addr_count, func), 837 IXGBE_NOT_IMPLEMENTED); 838 } 839 840 /** 841 * ixgbe_update_mc_addr_list - Updates the MAC's list of multicast addresses 842 * @hw: pointer to hardware structure 843 * @mc_addr_list: the list of new multicast addresses 844 * @mc_addr_count: number of addresses 845 * @func: iterator function to walk the multicast address list 846 * 847 * The given list replaces any existing list. Clears the MC addrs from receive 848 * address registers and the multicast table. Uses unused receive address 849 * registers for the first multicast addresses, and hashes the rest into the 850 * multicast table. 851 **/ 852 s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list, 853 u32 mc_addr_count, ixgbe_mc_addr_itr func) 854 { 855 return ixgbe_call_func(hw, hw->mac.ops.update_mc_addr_list, (hw, 856 mc_addr_list, mc_addr_count, func), 857 IXGBE_NOT_IMPLEMENTED); 858 } 859 860 /** 861 * ixgbe_enable_mc - Enable multicast address in RAR 862 * @hw: pointer to hardware structure 863 * 864 * Enables multicast address in RAR and the use of the multicast hash table. 865 **/ 866 s32 ixgbe_enable_mc(struct ixgbe_hw *hw) 867 { 868 return ixgbe_call_func(hw, hw->mac.ops.enable_mc, (hw), 869 IXGBE_NOT_IMPLEMENTED); 870 } 871 872 /** 873 * ixgbe_disable_mc - Disable multicast address in RAR 874 * @hw: pointer to hardware structure 875 * 876 * Disables multicast address in RAR and the use of the multicast hash table. 877 **/ 878 s32 ixgbe_disable_mc(struct ixgbe_hw *hw) 879 { 880 return ixgbe_call_func(hw, hw->mac.ops.disable_mc, (hw), 881 IXGBE_NOT_IMPLEMENTED); 882 } 883 884 /** 885 * ixgbe_clear_vfta - Clear VLAN filter table 886 * @hw: pointer to hardware structure 887 * 888 * Clears the VLAN filer table, and the VMDq index associated with the filter 889 **/ 890 s32 ixgbe_clear_vfta(struct ixgbe_hw *hw) 891 { 892 return ixgbe_call_func(hw, hw->mac.ops.clear_vfta, (hw), 893 IXGBE_NOT_IMPLEMENTED); 894 } 895 896 /** 897 * ixgbe_set_vfta - Set VLAN filter table 898 * @hw: pointer to hardware structure 899 * @vlan: VLAN id to write to VLAN filter 900 * @vind: VMDq output index that maps queue to VLAN id in VFTA 901 * @vlan_on: boolean flag to turn on/off VLAN in VFTA 902 * 903 * Turn on/off specified VLAN in the VLAN filter table. 904 **/ 905 s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on) 906 { 907 return ixgbe_call_func(hw, hw->mac.ops.set_vfta, (hw, vlan, vind, 908 vlan_on), IXGBE_NOT_IMPLEMENTED); 909 } 910 911 /** 912 * ixgbe_fc_enable - Enable flow control 913 * @hw: pointer to hardware structure 914 * @packetbuf_num: packet buffer number (0-7) 915 * 916 * Configures the flow control settings based on SW configuration. 917 **/ 918 s32 ixgbe_fc_enable(struct ixgbe_hw *hw, s32 packetbuf_num) 919 { 920 return ixgbe_call_func(hw, hw->mac.ops.fc_enable, (hw, packetbuf_num), 921 IXGBE_NOT_IMPLEMENTED); 922 } 923 924 /** 925 * ixgbe_read_analog_reg8 - Reads 8 bit analog register 926 * @hw: pointer to hardware structure 927 * @reg: analog register to read 928 * @val: read value 929 * 930 * Performs write operation to analog register specified. 931 **/ 932 s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val) 933 { 934 return ixgbe_call_func(hw, hw->mac.ops.read_analog_reg8, (hw, reg, 935 val), IXGBE_NOT_IMPLEMENTED); 936 } 937 938 /** 939 * ixgbe_write_analog_reg8 - Writes 8 bit analog register 940 * @hw: pointer to hardware structure 941 * @reg: analog register to write 942 * @val: value to write 943 * 944 * Performs write operation to Atlas analog register specified. 945 **/ 946 s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val) 947 { 948 return ixgbe_call_func(hw, hw->mac.ops.write_analog_reg8, (hw, reg, 949 val), IXGBE_NOT_IMPLEMENTED); 950 } 951 952 /** 953 * ixgbe_init_uta_tables - Initializes Unicast Table Arrays. 954 * @hw: pointer to hardware structure 955 * 956 * Initializes the Unicast Table Arrays to zero on device load. This 957 * is part of the Rx init addr execution path. 958 **/ 959 s32 ixgbe_init_uta_tables(struct ixgbe_hw *hw) 960 { 961 return ixgbe_call_func(hw, hw->mac.ops.init_uta_tables, (hw), 962 IXGBE_NOT_IMPLEMENTED); 963 } 964 965 /** 966 * ixgbe_read_i2c_byte - Reads 8 bit word over I2C at specified device address 967 * @hw: pointer to hardware structure 968 * @byte_offset: byte offset to read 969 * @data: value read 970 * 971 * Performs byte read operation to SFP module's EEPROM over I2C interface. 972 **/ 973 s32 ixgbe_read_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr, 974 u8 *data) 975 { 976 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_byte, (hw, byte_offset, 977 dev_addr, data), IXGBE_NOT_IMPLEMENTED); 978 } 979 980 /** 981 * ixgbe_write_i2c_byte - Writes 8 bit word over I2C 982 * @hw: pointer to hardware structure 983 * @byte_offset: byte offset to write 984 * @data: value to write 985 * 986 * Performs byte write operation to SFP module's EEPROM over I2C interface 987 * at a specified device address. 988 **/ 989 s32 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr, 990 u8 data) 991 { 992 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_byte, (hw, byte_offset, 993 dev_addr, data), IXGBE_NOT_IMPLEMENTED); 994 } 995 996 /** 997 * ixgbe_write_i2c_eeprom - Writes 8 bit EEPROM word over I2C interface 998 * @hw: pointer to hardware structure 999 * @byte_offset: EEPROM byte offset to write 1000 * @eeprom_data: value to write 1001 * 1002 * Performs byte write operation to SFP module's EEPROM over I2C interface. 1003 **/ 1004 s32 ixgbe_write_i2c_eeprom(struct ixgbe_hw *hw, 1005 u8 byte_offset, u8 eeprom_data) 1006 { 1007 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_eeprom, 1008 (hw, byte_offset, eeprom_data), 1009 IXGBE_NOT_IMPLEMENTED); 1010 } 1011 1012 /** 1013 * ixgbe_read_i2c_eeprom - Reads 8 bit EEPROM word over I2C interface 1014 * @hw: pointer to hardware structure 1015 * @byte_offset: EEPROM byte offset to read 1016 * @eeprom_data: value read 1017 * 1018 * Performs byte read operation to SFP module's EEPROM over I2C interface. 1019 **/ 1020 s32 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data) 1021 { 1022 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_eeprom, 1023 (hw, byte_offset, eeprom_data), 1024 IXGBE_NOT_IMPLEMENTED); 1025 } 1026 1027 /** 1028 * ixgbe_get_supported_physical_layer - Returns physical layer type 1029 * @hw: pointer to hardware structure 1030 * 1031 * Determines physical layer capabilities of the current configuration. 1032 **/ 1033 u32 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw) 1034 { 1035 return ixgbe_call_func(hw, hw->mac.ops.get_supported_physical_layer, 1036 (hw), IXGBE_PHYSICAL_LAYER_UNKNOWN); 1037 } 1038 1039 /** 1040 * ixgbe_enable_rx_dma - Enables Rx DMA unit, dependant on device specifics 1041 * @hw: pointer to hardware structure 1042 * @regval: bitfield to write to the Rx DMA register 1043 * 1044 * Enables the Rx DMA unit of the device. 1045 **/ 1046 s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval) 1047 { 1048 return ixgbe_call_func(hw, hw->mac.ops.enable_rx_dma, 1049 (hw, regval), IXGBE_NOT_IMPLEMENTED); 1050 } 1051 1052 /** 1053 * ixgbe_acquire_swfw_semaphore - Acquire SWFW semaphore 1054 * @hw: pointer to hardware structure 1055 * @mask: Mask to specify which semaphore to acquire 1056 * 1057 * Acquires the SWFW semaphore through SW_FW_SYNC register for the specified 1058 * function (CSR, PHY0, PHY1, EEPROM, Flash) 1059 **/ 1060 s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u16 mask) 1061 { 1062 return ixgbe_call_func(hw, hw->mac.ops.acquire_swfw_sync, 1063 (hw, mask), IXGBE_NOT_IMPLEMENTED); 1064 } 1065 1066 /** 1067 * ixgbe_release_swfw_semaphore - Release SWFW semaphore 1068 * @hw: pointer to hardware structure 1069 * @mask: Mask to specify which semaphore to release 1070 * 1071 * Releases the SWFW semaphore through SW_FW_SYNC register for the specified 1072 * function (CSR, PHY0, PHY1, EEPROM, Flash) 1073 **/ 1074 void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u16 mask) 1075 { 1076 if (hw->mac.ops.release_swfw_sync) 1077 hw->mac.ops.release_swfw_sync(hw, mask); 1078 } 1079 1080