1 /****************************************************************************** 2 3 Copyright (c) 2001-2013, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32 ******************************************************************************/ 33 /*$FreeBSD: head/sys/dev/ixgbe/ixgbe_api.c 251964 2013-06-18 21:28:19Z jfv $*/ 34 /*$NetBSD: ixgbe_api.c,v 1.9 2015/08/13 10:03:38 msaitoh Exp $*/ 35 36 #include "ixgbe_api.h" 37 #include "ixgbe_common.h" 38 39 /** 40 * ixgbe_dcb_get_rtrup2tc - read rtrup2tc reg 41 * @hw: pointer to hardware structure 42 * @map: pointer to u8 arr for returning map 43 * 44 * Read the rtrup2tc HW register and resolve its content into map 45 **/ 46 void ixgbe_dcb_get_rtrup2tc(struct ixgbe_hw *hw, u8 *map) 47 { 48 if (hw->mac.ops.get_rtrup2tc) 49 hw->mac.ops.get_rtrup2tc(hw, map); 50 } 51 52 /** 53 * ixgbe_init_shared_code - Initialize the shared code 54 * @hw: pointer to hardware structure 55 * 56 * This will assign function pointers and assign the MAC type and PHY code. 57 * Does not touch the hardware. This function must be called prior to any 58 * other function in the shared code. The ixgbe_hw structure should be 59 * memset to 0 prior to calling this function. The following fields in 60 * hw structure should be filled in prior to calling this function: 61 * back, device_id, vendor_id, subsystem_device_id, 62 * subsystem_vendor_id, and revision_id 63 **/ 64 s32 ixgbe_init_shared_code(struct ixgbe_hw *hw) 65 { 66 s32 status; 67 68 DEBUGFUNC("ixgbe_init_shared_code"); 69 70 /* 71 * Set the mac type 72 */ 73 ixgbe_set_mac_type(hw); 74 75 switch (hw->mac.type) { 76 case ixgbe_mac_82598EB: 77 status = ixgbe_init_ops_82598(hw); 78 break; 79 case ixgbe_mac_82599EB: 80 status = ixgbe_init_ops_82599(hw); 81 break; 82 case ixgbe_mac_82599_vf: 83 case ixgbe_mac_X540_vf: 84 status = ixgbe_init_ops_vf(hw); 85 break; 86 case ixgbe_mac_X540: 87 status = ixgbe_init_ops_X540(hw); 88 break; 89 default: 90 status = IXGBE_ERR_DEVICE_NOT_SUPPORTED; 91 break; 92 } 93 94 return status; 95 } 96 97 /** 98 * ixgbe_set_mac_type - Sets MAC type 99 * @hw: pointer to the HW structure 100 * 101 * This function sets the mac type of the adapter based on the 102 * vendor ID and device ID stored in the hw structure. 103 **/ 104 s32 ixgbe_set_mac_type(struct ixgbe_hw *hw) 105 { 106 s32 ret_val = IXGBE_SUCCESS; 107 108 DEBUGFUNC("ixgbe_set_mac_type\n"); 109 110 if (hw->vendor_id != IXGBE_INTEL_VENDOR_ID) { 111 ERROR_REPORT2(IXGBE_ERROR_UNSUPPORTED, 112 "Unsupported vendor id: %x", hw->vendor_id); 113 return IXGBE_ERR_DEVICE_NOT_SUPPORTED; 114 } 115 116 switch (hw->device_id) { 117 case IXGBE_DEV_ID_82598: 118 case IXGBE_DEV_ID_82598_BX: 119 case IXGBE_DEV_ID_82598AF_SINGLE_PORT: 120 case IXGBE_DEV_ID_82598AF_DUAL_PORT: 121 case IXGBE_DEV_ID_82598AT: 122 case IXGBE_DEV_ID_82598AT2: 123 case IXGBE_DEV_ID_82598EB_CX4: 124 case IXGBE_DEV_ID_82598_CX4_DUAL_PORT: 125 case IXGBE_DEV_ID_82598_DA_DUAL_PORT: 126 case IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM: 127 case IXGBE_DEV_ID_82598EB_XF_LR: 128 case IXGBE_DEV_ID_82598EB_SFP_LOM: 129 hw->mac.type = ixgbe_mac_82598EB; 130 break; 131 case IXGBE_DEV_ID_82599_KX4: 132 case IXGBE_DEV_ID_82599_KX4_MEZZ: 133 case IXGBE_DEV_ID_82599_XAUI_LOM: 134 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE: 135 case IXGBE_DEV_ID_82599_KR: 136 case IXGBE_DEV_ID_82599_SFP: 137 case IXGBE_DEV_ID_82599_BACKPLANE_FCOE: 138 case IXGBE_DEV_ID_82599_SFP_FCOE: 139 case IXGBE_DEV_ID_82599_SFP_EM: 140 case IXGBE_DEV_ID_82599_SFP_SF2: 141 case IXGBE_DEV_ID_82599_SFP_SF_QP: 142 case IXGBE_DEV_ID_82599EN_SFP: 143 case IXGBE_DEV_ID_82599_CX4: 144 case IXGBE_DEV_ID_82599_BYPASS: 145 case IXGBE_DEV_ID_82599_T3_LOM: 146 hw->mac.type = ixgbe_mac_82599EB; 147 break; 148 case IXGBE_DEV_ID_82599_VF: 149 case IXGBE_DEV_ID_82599_VF_HV: 150 hw->mac.type = ixgbe_mac_82599_vf; 151 break; 152 case IXGBE_DEV_ID_X540_VF: 153 case IXGBE_DEV_ID_X540_VF_HV: 154 hw->mac.type = ixgbe_mac_X540_vf; 155 break; 156 case IXGBE_DEV_ID_X540T: 157 case IXGBE_DEV_ID_X540_BYPASS: 158 hw->mac.type = ixgbe_mac_X540; 159 break; 160 default: 161 ret_val = IXGBE_ERR_DEVICE_NOT_SUPPORTED; 162 ERROR_REPORT2(IXGBE_ERROR_UNSUPPORTED, 163 "Unsupported device id: %x", 164 hw->device_id); 165 break; 166 } 167 168 DEBUGOUT2("ixgbe_set_mac_type found mac: %d, returns: %d\n", 169 hw->mac.type, ret_val); 170 return ret_val; 171 } 172 173 /** 174 * ixgbe_init_hw - Initialize the hardware 175 * @hw: pointer to hardware structure 176 * 177 * Initialize the hardware by resetting and then starting the hardware 178 **/ 179 s32 ixgbe_init_hw(struct ixgbe_hw *hw) 180 { 181 return ixgbe_call_func(hw, hw->mac.ops.init_hw, (hw), 182 IXGBE_NOT_IMPLEMENTED); 183 } 184 185 /** 186 * ixgbe_reset_hw - Performs a hardware reset 187 * @hw: pointer to hardware structure 188 * 189 * Resets the hardware by resetting the transmit and receive units, masks and 190 * clears all interrupts, performs a PHY reset, and performs a MAC reset 191 **/ 192 s32 ixgbe_reset_hw(struct ixgbe_hw *hw) 193 { 194 return ixgbe_call_func(hw, hw->mac.ops.reset_hw, (hw), 195 IXGBE_NOT_IMPLEMENTED); 196 } 197 198 /** 199 * ixgbe_start_hw - Prepares hardware for Rx/Tx 200 * @hw: pointer to hardware structure 201 * 202 * Starts the hardware by filling the bus info structure and media type, 203 * clears all on chip counters, initializes receive address registers, 204 * multicast table, VLAN filter table, calls routine to setup link and 205 * flow control settings, and leaves transmit and receive units disabled 206 * and uninitialized. 207 **/ 208 s32 ixgbe_start_hw(struct ixgbe_hw *hw) 209 { 210 return ixgbe_call_func(hw, hw->mac.ops.start_hw, (hw), 211 IXGBE_NOT_IMPLEMENTED); 212 } 213 214 /** 215 * ixgbe_enable_relaxed_ordering - Enables tx relaxed ordering, 216 * which is disabled by default in ixgbe_start_hw(); 217 * 218 * @hw: pointer to hardware structure 219 * 220 * Enable relaxed ordering; 221 **/ 222 void ixgbe_enable_relaxed_ordering(struct ixgbe_hw *hw) 223 { 224 if (hw->mac.ops.enable_relaxed_ordering) 225 hw->mac.ops.enable_relaxed_ordering(hw); 226 } 227 228 /** 229 * ixgbe_clear_hw_cntrs - Clear hardware counters 230 * @hw: pointer to hardware structure 231 * 232 * Clears all hardware statistics counters by reading them from the hardware 233 * Statistics counters are clear on read. 234 **/ 235 s32 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw) 236 { 237 return ixgbe_call_func(hw, hw->mac.ops.clear_hw_cntrs, (hw), 238 IXGBE_NOT_IMPLEMENTED); 239 } 240 241 /** 242 * ixgbe_get_media_type - Get media type 243 * @hw: pointer to hardware structure 244 * 245 * Returns the media type (fiber, copper, backplane) 246 **/ 247 enum ixgbe_media_type ixgbe_get_media_type(struct ixgbe_hw *hw) 248 { 249 return ixgbe_call_func(hw, hw->mac.ops.get_media_type, (hw), 250 ixgbe_media_type_unknown); 251 } 252 253 /** 254 * ixgbe_get_mac_addr - Get MAC address 255 * @hw: pointer to hardware structure 256 * @mac_addr: Adapter MAC address 257 * 258 * Reads the adapter's MAC address from the first Receive Address Register 259 * (RAR0) A reset of the adapter must have been performed prior to calling 260 * this function in order for the MAC address to have been loaded from the 261 * EEPROM into RAR0 262 **/ 263 s32 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr) 264 { 265 return ixgbe_call_func(hw, hw->mac.ops.get_mac_addr, 266 (hw, mac_addr), IXGBE_NOT_IMPLEMENTED); 267 } 268 269 /** 270 * ixgbe_get_san_mac_addr - Get SAN MAC address 271 * @hw: pointer to hardware structure 272 * @san_mac_addr: SAN MAC address 273 * 274 * Reads the SAN MAC address from the EEPROM, if it's available. This is 275 * per-port, so set_lan_id() must be called before reading the addresses. 276 **/ 277 s32 ixgbe_get_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr) 278 { 279 return ixgbe_call_func(hw, hw->mac.ops.get_san_mac_addr, 280 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED); 281 } 282 283 /** 284 * ixgbe_set_san_mac_addr - Write a SAN MAC address 285 * @hw: pointer to hardware structure 286 * @san_mac_addr: SAN MAC address 287 * 288 * Writes A SAN MAC address to the EEPROM. 289 **/ 290 s32 ixgbe_set_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr) 291 { 292 return ixgbe_call_func(hw, hw->mac.ops.set_san_mac_addr, 293 (hw, san_mac_addr), IXGBE_NOT_IMPLEMENTED); 294 } 295 296 /** 297 * ixgbe_get_device_caps - Get additional device capabilities 298 * @hw: pointer to hardware structure 299 * @device_caps: the EEPROM word for device capabilities 300 * 301 * Reads the extra device capabilities from the EEPROM 302 **/ 303 s32 ixgbe_get_device_caps(struct ixgbe_hw *hw, u16 *device_caps) 304 { 305 return ixgbe_call_func(hw, hw->mac.ops.get_device_caps, 306 (hw, device_caps), IXGBE_NOT_IMPLEMENTED); 307 } 308 309 /** 310 * ixgbe_get_wwn_prefix - Get alternative WWNN/WWPN prefix from the EEPROM 311 * @hw: pointer to hardware structure 312 * @wwnn_prefix: the alternative WWNN prefix 313 * @wwpn_prefix: the alternative WWPN prefix 314 * 315 * This function will read the EEPROM from the alternative SAN MAC address 316 * block to check the support for the alternative WWNN/WWPN prefix support. 317 **/ 318 s32 ixgbe_get_wwn_prefix(struct ixgbe_hw *hw, u16 *wwnn_prefix, 319 u16 *wwpn_prefix) 320 { 321 return ixgbe_call_func(hw, hw->mac.ops.get_wwn_prefix, 322 (hw, wwnn_prefix, wwpn_prefix), 323 IXGBE_NOT_IMPLEMENTED); 324 } 325 326 /** 327 * ixgbe_get_fcoe_boot_status - Get FCOE boot status from EEPROM 328 * @hw: pointer to hardware structure 329 * @bs: the fcoe boot status 330 * 331 * This function will read the FCOE boot status from the iSCSI FCOE block 332 **/ 333 s32 ixgbe_get_fcoe_boot_status(struct ixgbe_hw *hw, u16 *bs) 334 { 335 return ixgbe_call_func(hw, hw->mac.ops.get_fcoe_boot_status, 336 (hw, bs), 337 IXGBE_NOT_IMPLEMENTED); 338 } 339 340 /** 341 * ixgbe_get_bus_info - Set PCI bus info 342 * @hw: pointer to hardware structure 343 * 344 * Sets the PCI bus info (speed, width, type) within the ixgbe_hw structure 345 **/ 346 s32 ixgbe_get_bus_info(struct ixgbe_hw *hw) 347 { 348 return ixgbe_call_func(hw, hw->mac.ops.get_bus_info, (hw), 349 IXGBE_NOT_IMPLEMENTED); 350 } 351 352 /** 353 * ixgbe_get_num_of_tx_queues - Get Tx queues 354 * @hw: pointer to hardware structure 355 * 356 * Returns the number of transmit queues for the given adapter. 357 **/ 358 u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw) 359 { 360 return hw->mac.max_tx_queues; 361 } 362 363 /** 364 * ixgbe_get_num_of_rx_queues - Get Rx queues 365 * @hw: pointer to hardware structure 366 * 367 * Returns the number of receive queues for the given adapter. 368 **/ 369 u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw) 370 { 371 return hw->mac.max_rx_queues; 372 } 373 374 /** 375 * ixgbe_stop_adapter - Disable Rx/Tx units 376 * @hw: pointer to hardware structure 377 * 378 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts, 379 * disables transmit and receive units. The adapter_stopped flag is used by 380 * the shared code and drivers to determine if the adapter is in a stopped 381 * state and should not touch the hardware. 382 **/ 383 s32 ixgbe_stop_adapter(struct ixgbe_hw *hw) 384 { 385 return ixgbe_call_func(hw, hw->mac.ops.stop_adapter, (hw), 386 IXGBE_NOT_IMPLEMENTED); 387 } 388 389 /** 390 * ixgbe_read_pba_string - Reads part number string from EEPROM 391 * @hw: pointer to hardware structure 392 * @pba_num: stores the part number string from the EEPROM 393 * @pba_num_size: part number string buffer length 394 * 395 * Reads the part number string from the EEPROM. 396 **/ 397 s32 ixgbe_read_pba_string(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size) 398 { 399 return ixgbe_read_pba_string_generic(hw, pba_num, pba_num_size); 400 } 401 402 /** 403 * ixgbe_read_pba_num - Reads part number from EEPROM 404 * @hw: pointer to hardware structure 405 * @pba_num: stores the part number from the EEPROM 406 * 407 * Reads the part number from the EEPROM. 408 **/ 409 s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num) 410 { 411 return ixgbe_read_pba_num_generic(hw, pba_num); 412 } 413 414 /** 415 * ixgbe_identify_phy - Get PHY type 416 * @hw: pointer to hardware structure 417 * 418 * Determines the physical layer module found on the current adapter. 419 **/ 420 s32 ixgbe_identify_phy(struct ixgbe_hw *hw) 421 { 422 s32 status = IXGBE_SUCCESS; 423 424 if (hw->phy.type == ixgbe_phy_unknown) { 425 status = ixgbe_call_func(hw, hw->phy.ops.identify, (hw), 426 IXGBE_NOT_IMPLEMENTED); 427 } 428 429 return status; 430 } 431 432 /** 433 * ixgbe_reset_phy - Perform a PHY reset 434 * @hw: pointer to hardware structure 435 **/ 436 s32 ixgbe_reset_phy(struct ixgbe_hw *hw) 437 { 438 s32 status = IXGBE_SUCCESS; 439 440 if (hw->phy.type == ixgbe_phy_unknown) { 441 if (ixgbe_identify_phy(hw) != IXGBE_SUCCESS) 442 status = IXGBE_ERR_PHY; 443 } 444 445 if (status == IXGBE_SUCCESS) { 446 status = ixgbe_call_func(hw, hw->phy.ops.reset, (hw), 447 IXGBE_NOT_IMPLEMENTED); 448 } 449 return status; 450 } 451 452 /** 453 * ixgbe_get_phy_firmware_version - 454 * @hw: pointer to hardware structure 455 * @firmware_version: pointer to firmware version 456 **/ 457 s32 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw, u16 *firmware_version) 458 { 459 s32 status = IXGBE_SUCCESS; 460 461 status = ixgbe_call_func(hw, hw->phy.ops.get_firmware_version, 462 (hw, firmware_version), 463 IXGBE_NOT_IMPLEMENTED); 464 return status; 465 } 466 467 /** 468 * ixgbe_read_phy_reg - Read PHY register 469 * @hw: pointer to hardware structure 470 * @reg_addr: 32 bit address of PHY register to read 471 * @phy_data: Pointer to read data from PHY register 472 * 473 * Reads a value from a specified PHY register 474 **/ 475 s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, 476 u16 *phy_data) 477 { 478 if (hw->phy.id == 0) 479 ixgbe_identify_phy(hw); 480 481 return ixgbe_call_func(hw, hw->phy.ops.read_reg, (hw, reg_addr, 482 device_type, phy_data), IXGBE_NOT_IMPLEMENTED); 483 } 484 485 /** 486 * ixgbe_write_phy_reg - Write PHY register 487 * @hw: pointer to hardware structure 488 * @reg_addr: 32 bit PHY register to write 489 * @phy_data: Data to write to the PHY register 490 * 491 * Writes a value to specified PHY register 492 **/ 493 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type, 494 u16 phy_data) 495 { 496 if (hw->phy.id == 0) 497 ixgbe_identify_phy(hw); 498 499 return ixgbe_call_func(hw, hw->phy.ops.write_reg, (hw, reg_addr, 500 device_type, phy_data), IXGBE_NOT_IMPLEMENTED); 501 } 502 503 /** 504 * ixgbe_setup_phy_link - Restart PHY autoneg 505 * @hw: pointer to hardware structure 506 * 507 * Restart autonegotiation and PHY and waits for completion. 508 **/ 509 s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw) 510 { 511 return ixgbe_call_func(hw, hw->phy.ops.setup_link, (hw), 512 IXGBE_NOT_IMPLEMENTED); 513 } 514 515 /** 516 * ixgbe_check_phy_link - Determine link and speed status 517 * @hw: pointer to hardware structure 518 * 519 * Reads a PHY register to determine if link is up and the current speed for 520 * the PHY. 521 **/ 522 s32 ixgbe_check_phy_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 523 bool *link_up) 524 { 525 return ixgbe_call_func(hw, hw->phy.ops.check_link, (hw, speed, 526 link_up), IXGBE_NOT_IMPLEMENTED); 527 } 528 529 /** 530 * ixgbe_setup_phy_link_speed - Set auto advertise 531 * @hw: pointer to hardware structure 532 * @speed: new link speed 533 * 534 * Sets the auto advertised capabilities 535 **/ 536 s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed, 537 bool autoneg_wait_to_complete) 538 { 539 return ixgbe_call_func(hw, hw->phy.ops.setup_link_speed, (hw, speed, 540 autoneg_wait_to_complete), 541 IXGBE_NOT_IMPLEMENTED); 542 } 543 544 /** 545 * ixgbe_check_link - Get link and speed status 546 * @hw: pointer to hardware structure 547 * 548 * Reads the links register to determine if link is up and the current speed 549 **/ 550 s32 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 551 bool *link_up, bool link_up_wait_to_complete) 552 { 553 return ixgbe_call_func(hw, hw->mac.ops.check_link, (hw, speed, 554 link_up, link_up_wait_to_complete), 555 IXGBE_NOT_IMPLEMENTED); 556 } 557 558 /** 559 * ixgbe_disable_tx_laser - Disable Tx laser 560 * @hw: pointer to hardware structure 561 * 562 * If the driver needs to disable the laser on SFI optics. 563 **/ 564 void ixgbe_disable_tx_laser(struct ixgbe_hw *hw) 565 { 566 if (hw->mac.ops.disable_tx_laser) 567 hw->mac.ops.disable_tx_laser(hw); 568 } 569 570 /** 571 * ixgbe_enable_tx_laser - Enable Tx laser 572 * @hw: pointer to hardware structure 573 * 574 * If the driver needs to enable the laser on SFI optics. 575 **/ 576 void ixgbe_enable_tx_laser(struct ixgbe_hw *hw) 577 { 578 if (hw->mac.ops.enable_tx_laser) 579 hw->mac.ops.enable_tx_laser(hw); 580 } 581 582 /** 583 * ixgbe_flap_tx_laser - flap Tx laser to start autotry process 584 * @hw: pointer to hardware structure 585 * 586 * When the driver changes the link speeds that it can support then 587 * flap the tx laser to alert the link partner to start autotry 588 * process on its end. 589 **/ 590 void ixgbe_flap_tx_laser(struct ixgbe_hw *hw) 591 { 592 if (hw->mac.ops.flap_tx_laser) 593 hw->mac.ops.flap_tx_laser(hw); 594 } 595 596 /** 597 * ixgbe_setup_link - Set link speed 598 * @hw: pointer to hardware structure 599 * @speed: new link speed 600 * 601 * Configures link settings. Restarts the link. 602 * Performs autonegotiation if needed. 603 **/ 604 s32 ixgbe_setup_link(struct ixgbe_hw *hw, ixgbe_link_speed speed, 605 bool autoneg_wait_to_complete) 606 { 607 return ixgbe_call_func(hw, hw->mac.ops.setup_link, (hw, speed, 608 autoneg_wait_to_complete), 609 IXGBE_NOT_IMPLEMENTED); 610 } 611 612 /** 613 * ixgbe_get_link_capabilities - Returns link capabilities 614 * @hw: pointer to hardware structure 615 * 616 * Determines the link capabilities of the current configuration. 617 **/ 618 s32 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 619 bool *autoneg) 620 { 621 return ixgbe_call_func(hw, hw->mac.ops.get_link_capabilities, (hw, 622 speed, autoneg), IXGBE_NOT_IMPLEMENTED); 623 } 624 625 /** 626 * ixgbe_led_on - Turn on LEDs 627 * @hw: pointer to hardware structure 628 * @index: led number to turn on 629 * 630 * Turns on the software controllable LEDs. 631 **/ 632 s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index) 633 { 634 return ixgbe_call_func(hw, hw->mac.ops.led_on, (hw, index), 635 IXGBE_NOT_IMPLEMENTED); 636 } 637 638 /** 639 * ixgbe_led_off - Turn off LEDs 640 * @hw: pointer to hardware structure 641 * @index: led number to turn off 642 * 643 * Turns off the software controllable LEDs. 644 **/ 645 s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index) 646 { 647 return ixgbe_call_func(hw, hw->mac.ops.led_off, (hw, index), 648 IXGBE_NOT_IMPLEMENTED); 649 } 650 651 /** 652 * ixgbe_blink_led_start - Blink LEDs 653 * @hw: pointer to hardware structure 654 * @index: led number to blink 655 * 656 * Blink LED based on index. 657 **/ 658 s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index) 659 { 660 return ixgbe_call_func(hw, hw->mac.ops.blink_led_start, (hw, index), 661 IXGBE_NOT_IMPLEMENTED); 662 } 663 664 /** 665 * ixgbe_blink_led_stop - Stop blinking LEDs 666 * @hw: pointer to hardware structure 667 * 668 * Stop blinking LED based on index. 669 **/ 670 s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index) 671 { 672 return ixgbe_call_func(hw, hw->mac.ops.blink_led_stop, (hw, index), 673 IXGBE_NOT_IMPLEMENTED); 674 } 675 676 /** 677 * ixgbe_init_eeprom_params - Initialize EEPROM parameters 678 * @hw: pointer to hardware structure 679 * 680 * Initializes the EEPROM parameters ixgbe_eeprom_info within the 681 * ixgbe_hw struct in order to set up EEPROM access. 682 **/ 683 s32 ixgbe_init_eeprom_params(struct ixgbe_hw *hw) 684 { 685 return ixgbe_call_func(hw, hw->eeprom.ops.init_params, (hw), 686 IXGBE_NOT_IMPLEMENTED); 687 } 688 689 690 /** 691 * ixgbe_write_eeprom - Write word to EEPROM 692 * @hw: pointer to hardware structure 693 * @offset: offset within the EEPROM to be written to 694 * @data: 16 bit word to be written to the EEPROM 695 * 696 * Writes 16 bit value to EEPROM. If ixgbe_eeprom_update_checksum is not 697 * called after this function, the EEPROM will most likely contain an 698 * invalid checksum. 699 **/ 700 s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data) 701 { 702 return ixgbe_call_func(hw, hw->eeprom.ops.write, (hw, offset, data), 703 IXGBE_NOT_IMPLEMENTED); 704 } 705 706 /** 707 * ixgbe_write_eeprom_buffer - Write word(s) to EEPROM 708 * @hw: pointer to hardware structure 709 * @offset: offset within the EEPROM to be written to 710 * @data: 16 bit word(s) to be written to the EEPROM 711 * @words: number of words 712 * 713 * Writes 16 bit word(s) to EEPROM. If ixgbe_eeprom_update_checksum is not 714 * called after this function, the EEPROM will most likely contain an 715 * invalid checksum. 716 **/ 717 s32 ixgbe_write_eeprom_buffer(struct ixgbe_hw *hw, u16 offset, u16 words, 718 u16 *data) 719 { 720 return ixgbe_call_func(hw, hw->eeprom.ops.write_buffer, 721 (hw, offset, words, data), 722 IXGBE_NOT_IMPLEMENTED); 723 } 724 725 /** 726 * ixgbe_read_eeprom - Read word from EEPROM 727 * @hw: pointer to hardware structure 728 * @offset: offset within the EEPROM to be read 729 * @data: read 16 bit value from EEPROM 730 * 731 * Reads 16 bit value from EEPROM 732 **/ 733 s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data) 734 { 735 return ixgbe_call_func(hw, hw->eeprom.ops.read, (hw, offset, data), 736 IXGBE_NOT_IMPLEMENTED); 737 } 738 739 /** 740 * ixgbe_read_eeprom_buffer - Read word(s) from EEPROM 741 * @hw: pointer to hardware structure 742 * @offset: offset within the EEPROM to be read 743 * @data: read 16 bit word(s) from EEPROM 744 * @words: number of words 745 * 746 * Reads 16 bit word(s) from EEPROM 747 **/ 748 s32 ixgbe_read_eeprom_buffer(struct ixgbe_hw *hw, u16 offset, 749 u16 words, u16 *data) 750 { 751 return ixgbe_call_func(hw, hw->eeprom.ops.read_buffer, 752 (hw, offset, words, data), 753 IXGBE_NOT_IMPLEMENTED); 754 } 755 756 /** 757 * ixgbe_validate_eeprom_checksum - Validate EEPROM checksum 758 * @hw: pointer to hardware structure 759 * @checksum_val: calculated checksum 760 * 761 * Performs checksum calculation and validates the EEPROM checksum 762 **/ 763 s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val) 764 { 765 return ixgbe_call_func(hw, hw->eeprom.ops.validate_checksum, 766 (hw, checksum_val), IXGBE_NOT_IMPLEMENTED); 767 } 768 769 /** 770 * ixgbe_eeprom_update_checksum - Updates the EEPROM checksum 771 * @hw: pointer to hardware structure 772 **/ 773 s32 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw) 774 { 775 return ixgbe_call_func(hw, hw->eeprom.ops.update_checksum, (hw), 776 IXGBE_NOT_IMPLEMENTED); 777 } 778 779 /** 780 * ixgbe_insert_mac_addr - Find a RAR for this mac address 781 * @hw: pointer to hardware structure 782 * @addr: Address to put into receive address register 783 * @vmdq: VMDq pool to assign 784 * 785 * Puts an ethernet address into a receive address register, or 786 * finds the rar that it is aleady in; adds to the pool list 787 **/ 788 s32 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq) 789 { 790 return ixgbe_call_func(hw, hw->mac.ops.insert_mac_addr, 791 (hw, addr, vmdq), 792 IXGBE_NOT_IMPLEMENTED); 793 } 794 795 /** 796 * ixgbe_set_rar - Set Rx address register 797 * @hw: pointer to hardware structure 798 * @index: Receive address register to write 799 * @addr: Address to put into receive address register 800 * @vmdq: VMDq "set" 801 * @enable_addr: set flag that address is active 802 * 803 * Puts an ethernet address into a receive address register. 804 **/ 805 s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq, 806 u32 enable_addr) 807 { 808 return ixgbe_call_func(hw, hw->mac.ops.set_rar, (hw, index, addr, vmdq, 809 enable_addr), IXGBE_NOT_IMPLEMENTED); 810 } 811 812 /** 813 * ixgbe_clear_rar - Clear Rx address register 814 * @hw: pointer to hardware structure 815 * @index: Receive address register to write 816 * 817 * Puts an ethernet address into a receive address register. 818 **/ 819 s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index) 820 { 821 return ixgbe_call_func(hw, hw->mac.ops.clear_rar, (hw, index), 822 IXGBE_NOT_IMPLEMENTED); 823 } 824 825 /** 826 * ixgbe_set_vmdq - Associate a VMDq index with a receive address 827 * @hw: pointer to hardware structure 828 * @rar: receive address register index to associate with VMDq index 829 * @vmdq: VMDq set or pool index 830 **/ 831 s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq) 832 { 833 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq, (hw, rar, vmdq), 834 IXGBE_NOT_IMPLEMENTED); 835 836 } 837 838 /** 839 * ixgbe_set_vmdq_san_mac - Associate VMDq index 127 with a receive address 840 * @hw: pointer to hardware structure 841 * @vmdq: VMDq default pool index 842 **/ 843 s32 ixgbe_set_vmdq_san_mac(struct ixgbe_hw *hw, u32 vmdq) 844 { 845 return ixgbe_call_func(hw, hw->mac.ops.set_vmdq_san_mac, 846 (hw, vmdq), IXGBE_NOT_IMPLEMENTED); 847 } 848 849 /** 850 * ixgbe_clear_vmdq - Disassociate a VMDq index from a receive address 851 * @hw: pointer to hardware structure 852 * @rar: receive address register index to disassociate with VMDq index 853 * @vmdq: VMDq set or pool index 854 **/ 855 s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq) 856 { 857 return ixgbe_call_func(hw, hw->mac.ops.clear_vmdq, (hw, rar, vmdq), 858 IXGBE_NOT_IMPLEMENTED); 859 } 860 861 /** 862 * ixgbe_init_rx_addrs - Initializes receive address filters. 863 * @hw: pointer to hardware structure 864 * 865 * Places the MAC address in receive address register 0 and clears the rest 866 * of the receive address registers. Clears the multicast table. Assumes 867 * the receiver is in reset when the routine is called. 868 **/ 869 s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw) 870 { 871 return ixgbe_call_func(hw, hw->mac.ops.init_rx_addrs, (hw), 872 IXGBE_NOT_IMPLEMENTED); 873 } 874 875 /** 876 * ixgbe_get_num_rx_addrs - Returns the number of RAR entries. 877 * @hw: pointer to hardware structure 878 **/ 879 u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw) 880 { 881 return hw->mac.num_rar_entries; 882 } 883 884 /** 885 * ixgbe_update_uc_addr_list - Updates the MAC's list of secondary addresses 886 * @hw: pointer to hardware structure 887 * @addr_list: the list of new multicast addresses 888 * @addr_count: number of addresses 889 * @func: iterator function to walk the multicast address list 890 * 891 * The given list replaces any existing list. Clears the secondary addrs from 892 * receive address registers. Uses unused receive address registers for the 893 * first secondary addresses, and falls back to promiscuous mode as needed. 894 **/ 895 s32 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list, 896 u32 addr_count, ixgbe_mc_addr_itr func) 897 { 898 return ixgbe_call_func(hw, hw->mac.ops.update_uc_addr_list, (hw, 899 addr_list, addr_count, func), 900 IXGBE_NOT_IMPLEMENTED); 901 } 902 903 /** 904 * ixgbe_update_mc_addr_list - Updates the MAC's list of multicast addresses 905 * @hw: pointer to hardware structure 906 * @mc_addr_list: the list of new multicast addresses 907 * @mc_addr_count: number of addresses 908 * @func: iterator function to walk the multicast address list 909 * 910 * The given list replaces any existing list. Clears the MC addrs from receive 911 * address registers and the multicast table. Uses unused receive address 912 * registers for the first multicast addresses, and hashes the rest into the 913 * multicast table. 914 **/ 915 s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list, 916 u32 mc_addr_count, ixgbe_mc_addr_itr func, 917 bool clear) 918 { 919 return ixgbe_call_func(hw, hw->mac.ops.update_mc_addr_list, (hw, 920 mc_addr_list, mc_addr_count, func, clear), 921 IXGBE_NOT_IMPLEMENTED); 922 } 923 924 /** 925 * ixgbe_enable_mc - Enable multicast address in RAR 926 * @hw: pointer to hardware structure 927 * 928 * Enables multicast address in RAR and the use of the multicast hash table. 929 **/ 930 s32 ixgbe_enable_mc(struct ixgbe_hw *hw) 931 { 932 return ixgbe_call_func(hw, hw->mac.ops.enable_mc, (hw), 933 IXGBE_NOT_IMPLEMENTED); 934 } 935 936 /** 937 * ixgbe_disable_mc - Disable multicast address in RAR 938 * @hw: pointer to hardware structure 939 * 940 * Disables multicast address in RAR and the use of the multicast hash table. 941 **/ 942 s32 ixgbe_disable_mc(struct ixgbe_hw *hw) 943 { 944 return ixgbe_call_func(hw, hw->mac.ops.disable_mc, (hw), 945 IXGBE_NOT_IMPLEMENTED); 946 } 947 948 /** 949 * ixgbe_clear_vfta - Clear VLAN filter table 950 * @hw: pointer to hardware structure 951 * 952 * Clears the VLAN filer table, and the VMDq index associated with the filter 953 **/ 954 s32 ixgbe_clear_vfta(struct ixgbe_hw *hw) 955 { 956 return ixgbe_call_func(hw, hw->mac.ops.clear_vfta, (hw), 957 IXGBE_NOT_IMPLEMENTED); 958 } 959 960 /** 961 * ixgbe_set_vfta - Set VLAN filter table 962 * @hw: pointer to hardware structure 963 * @vlan: VLAN id to write to VLAN filter 964 * @vind: VMDq output index that maps queue to VLAN id in VFTA 965 * @vlan_on: boolean flag to turn on/off VLAN in VFTA 966 * 967 * Turn on/off specified VLAN in the VLAN filter table. 968 **/ 969 s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on) 970 { 971 return ixgbe_call_func(hw, hw->mac.ops.set_vfta, (hw, vlan, vind, 972 vlan_on), IXGBE_NOT_IMPLEMENTED); 973 } 974 975 /** 976 * ixgbe_set_vlvf - Set VLAN Pool Filter 977 * @hw: pointer to hardware structure 978 * @vlan: VLAN id to write to VLAN filter 979 * @vind: VMDq output index that maps queue to VLAN id in VFVFB 980 * @vlan_on: boolean flag to turn on/off VLAN in VFVF 981 * @vfta_changed: pointer to boolean flag which indicates whether VFTA 982 * should be changed 983 * 984 * Turn on/off specified bit in VLVF table. 985 **/ 986 s32 ixgbe_set_vlvf(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on, 987 bool *vfta_changed) 988 { 989 return ixgbe_call_func(hw, hw->mac.ops.set_vlvf, (hw, vlan, vind, 990 vlan_on, vfta_changed), IXGBE_NOT_IMPLEMENTED); 991 } 992 993 /** 994 * ixgbe_fc_enable - Enable flow control 995 * @hw: pointer to hardware structure 996 * 997 * Configures the flow control settings based on SW configuration. 998 **/ 999 s32 ixgbe_fc_enable(struct ixgbe_hw *hw) 1000 { 1001 return ixgbe_call_func(hw, hw->mac.ops.fc_enable, (hw), 1002 IXGBE_NOT_IMPLEMENTED); 1003 } 1004 1005 /** 1006 * ixgbe_set_fw_drv_ver - Try to send the driver version number FW 1007 * @hw: pointer to hardware structure 1008 * @maj: driver major number to be sent to firmware 1009 * @min: driver minor number to be sent to firmware 1010 * @build: driver build number to be sent to firmware 1011 * @ver: driver version number to be sent to firmware 1012 **/ 1013 s32 ixgbe_set_fw_drv_ver(struct ixgbe_hw *hw, u8 maj, u8 min, u8 build, 1014 u8 ver) 1015 { 1016 return ixgbe_call_func(hw, hw->mac.ops.set_fw_drv_ver, (hw, maj, min, 1017 build, ver), IXGBE_NOT_IMPLEMENTED); 1018 } 1019 1020 1021 1022 1023 /** 1024 * ixgbe_read_analog_reg8 - Reads 8 bit analog register 1025 * @hw: pointer to hardware structure 1026 * @reg: analog register to read 1027 * @val: read value 1028 * 1029 * Performs write operation to analog register specified. 1030 **/ 1031 s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val) 1032 { 1033 return ixgbe_call_func(hw, hw->mac.ops.read_analog_reg8, (hw, reg, 1034 val), IXGBE_NOT_IMPLEMENTED); 1035 } 1036 1037 /** 1038 * ixgbe_write_analog_reg8 - Writes 8 bit analog register 1039 * @hw: pointer to hardware structure 1040 * @reg: analog register to write 1041 * @val: value to write 1042 * 1043 * Performs write operation to Atlas analog register specified. 1044 **/ 1045 s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val) 1046 { 1047 return ixgbe_call_func(hw, hw->mac.ops.write_analog_reg8, (hw, reg, 1048 val), IXGBE_NOT_IMPLEMENTED); 1049 } 1050 1051 /** 1052 * ixgbe_init_uta_tables - Initializes Unicast Table Arrays. 1053 * @hw: pointer to hardware structure 1054 * 1055 * Initializes the Unicast Table Arrays to zero on device load. This 1056 * is part of the Rx init addr execution path. 1057 **/ 1058 s32 ixgbe_init_uta_tables(struct ixgbe_hw *hw) 1059 { 1060 return ixgbe_call_func(hw, hw->mac.ops.init_uta_tables, (hw), 1061 IXGBE_NOT_IMPLEMENTED); 1062 } 1063 1064 /** 1065 * ixgbe_read_i2c_byte - Reads 8 bit word over I2C at specified device address 1066 * @hw: pointer to hardware structure 1067 * @byte_offset: byte offset to read 1068 * @data: value read 1069 * 1070 * Performs byte read operation to SFP module's EEPROM over I2C interface. 1071 **/ 1072 s32 ixgbe_read_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr, 1073 u8 *data) 1074 { 1075 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_byte, (hw, byte_offset, 1076 dev_addr, data), IXGBE_NOT_IMPLEMENTED); 1077 } 1078 1079 /** 1080 * ixgbe_write_i2c_byte - Writes 8 bit word over I2C 1081 * @hw: pointer to hardware structure 1082 * @byte_offset: byte offset to write 1083 * @data: value to write 1084 * 1085 * Performs byte write operation to SFP module's EEPROM over I2C interface 1086 * at a specified device address. 1087 **/ 1088 s32 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr, 1089 u8 data) 1090 { 1091 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_byte, (hw, byte_offset, 1092 dev_addr, data), IXGBE_NOT_IMPLEMENTED); 1093 } 1094 1095 /** 1096 * ixgbe_write_i2c_eeprom - Writes 8 bit EEPROM word over I2C interface 1097 * @hw: pointer to hardware structure 1098 * @byte_offset: EEPROM byte offset to write 1099 * @eeprom_data: value to write 1100 * 1101 * Performs byte write operation to SFP module's EEPROM over I2C interface. 1102 **/ 1103 s32 ixgbe_write_i2c_eeprom(struct ixgbe_hw *hw, 1104 u8 byte_offset, u8 eeprom_data) 1105 { 1106 return ixgbe_call_func(hw, hw->phy.ops.write_i2c_eeprom, 1107 (hw, byte_offset, eeprom_data), 1108 IXGBE_NOT_IMPLEMENTED); 1109 } 1110 1111 /** 1112 * ixgbe_read_i2c_eeprom - Reads 8 bit EEPROM word over I2C interface 1113 * @hw: pointer to hardware structure 1114 * @byte_offset: EEPROM byte offset to read 1115 * @eeprom_data: value read 1116 * 1117 * Performs byte read operation to SFP module's EEPROM over I2C interface. 1118 **/ 1119 s32 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data) 1120 { 1121 return ixgbe_call_func(hw, hw->phy.ops.read_i2c_eeprom, 1122 (hw, byte_offset, eeprom_data), 1123 IXGBE_NOT_IMPLEMENTED); 1124 } 1125 1126 /** 1127 * ixgbe_get_supported_physical_layer - Returns physical layer type 1128 * @hw: pointer to hardware structure 1129 * 1130 * Determines physical layer capabilities of the current configuration. 1131 **/ 1132 u32 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw) 1133 { 1134 return ixgbe_call_func(hw, hw->mac.ops.get_supported_physical_layer, 1135 (hw), IXGBE_PHYSICAL_LAYER_UNKNOWN); 1136 } 1137 1138 /** 1139 * ixgbe_enable_rx_dma - Enables Rx DMA unit, dependent on device specifics 1140 * @hw: pointer to hardware structure 1141 * @regval: bitfield to write to the Rx DMA register 1142 * 1143 * Enables the Rx DMA unit of the device. 1144 **/ 1145 s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval) 1146 { 1147 return ixgbe_call_func(hw, hw->mac.ops.enable_rx_dma, 1148 (hw, regval), IXGBE_NOT_IMPLEMENTED); 1149 } 1150 1151 /** 1152 * ixgbe_disable_sec_rx_path - Stops the receive data path 1153 * @hw: pointer to hardware structure 1154 * 1155 * Stops the receive data path. 1156 **/ 1157 s32 ixgbe_disable_sec_rx_path(struct ixgbe_hw *hw) 1158 { 1159 return ixgbe_call_func(hw, hw->mac.ops.disable_sec_rx_path, 1160 (hw), IXGBE_NOT_IMPLEMENTED); 1161 } 1162 1163 /** 1164 * ixgbe_enable_sec_rx_path - Enables the receive data path 1165 * @hw: pointer to hardware structure 1166 * 1167 * Enables the receive data path. 1168 **/ 1169 s32 ixgbe_enable_sec_rx_path(struct ixgbe_hw *hw) 1170 { 1171 return ixgbe_call_func(hw, hw->mac.ops.enable_sec_rx_path, 1172 (hw), IXGBE_NOT_IMPLEMENTED); 1173 } 1174 1175 /** 1176 * ixgbe_acquire_swfw_semaphore - Acquire SWFW semaphore 1177 * @hw: pointer to hardware structure 1178 * @mask: Mask to specify which semaphore to acquire 1179 * 1180 * Acquires the SWFW semaphore through SW_FW_SYNC register for the specified 1181 * function (CSR, PHY0, PHY1, EEPROM, Flash) 1182 **/ 1183 s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u16 mask) 1184 { 1185 return ixgbe_call_func(hw, hw->mac.ops.acquire_swfw_sync, 1186 (hw, mask), IXGBE_NOT_IMPLEMENTED); 1187 } 1188 1189 /** 1190 * ixgbe_release_swfw_semaphore - Release SWFW semaphore 1191 * @hw: pointer to hardware structure 1192 * @mask: Mask to specify which semaphore to release 1193 * 1194 * Releases the SWFW semaphore through SW_FW_SYNC register for the specified 1195 * function (CSR, PHY0, PHY1, EEPROM, Flash) 1196 **/ 1197 void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u16 mask) 1198 { 1199 if (hw->mac.ops.release_swfw_sync) 1200 hw->mac.ops.release_swfw_sync(hw, mask); 1201 } 1202 1203