1*fb38d839Srin /* $NetBSD: igc_api.h,v 1.2 2023/10/04 07:35:27 rin Exp $ */ 2d0d8f2a5Srin /* $OpenBSD: igc_api.h,v 1.2 2022/05/11 06:14:15 kevlo Exp $ */ 3d0d8f2a5Srin /*- 4d0d8f2a5Srin * Copyright 2021 Intel Corp 5d0d8f2a5Srin * Copyright 2021 Rubicon Communications, LLC (Netgate) 6d0d8f2a5Srin * SPDX-License-Identifier: BSD-3-Clause 7d0d8f2a5Srin * 8d0d8f2a5Srin * $FreeBSD$ 9d0d8f2a5Srin */ 10d0d8f2a5Srin 11d0d8f2a5Srin #ifndef _IGC_API_H_ 12d0d8f2a5Srin #define _IGC_API_H_ 13d0d8f2a5Srin 14*fb38d839Srin #include <dev/pci/igc/if_igc.h> 15*fb38d839Srin #include <dev/pci/igc/igc_hw.h> 16d0d8f2a5Srin 17d0d8f2a5Srin extern void igc_init_function_pointers_i225(struct igc_hw *); 18d0d8f2a5Srin 19d0d8f2a5Srin int igc_set_mac_type(struct igc_hw *); 20d0d8f2a5Srin int igc_setup_init_funcs(struct igc_hw *, bool); 21d0d8f2a5Srin int igc_init_mac_params(struct igc_hw *); 22d0d8f2a5Srin int igc_init_nvm_params(struct igc_hw *); 23d0d8f2a5Srin int igc_init_phy_params(struct igc_hw *); 24d0d8f2a5Srin int igc_get_bus_info(struct igc_hw *); 25d0d8f2a5Srin void igc_clear_vfta(struct igc_hw *); 26d0d8f2a5Srin void igc_write_vfta(struct igc_hw *, uint32_t, uint32_t); 27d0d8f2a5Srin int igc_force_mac_fc(struct igc_hw *); 28d0d8f2a5Srin int igc_check_for_link(struct igc_hw *); 29d0d8f2a5Srin int igc_reset_hw(struct igc_hw *); 30d0d8f2a5Srin int igc_init_hw(struct igc_hw *); 31d0d8f2a5Srin int igc_setup_link(struct igc_hw *); 32d0d8f2a5Srin int igc_get_speed_and_duplex(struct igc_hw *, uint16_t *, 33d0d8f2a5Srin uint16_t *); 34d0d8f2a5Srin int igc_disable_pcie_master(struct igc_hw *); 35d0d8f2a5Srin void igc_config_collision_dist(struct igc_hw *); 36d0d8f2a5Srin int igc_rar_set(struct igc_hw *, uint8_t *, uint32_t); 37d0d8f2a5Srin uint32_t igc_hash_mc_addr(struct igc_hw *, uint8_t *); 38d0d8f2a5Srin void igc_update_mc_addr_list(struct igc_hw *, uint8_t *, uint32_t); 39d0d8f2a5Srin int igc_check_reset_block(struct igc_hw *); 40d0d8f2a5Srin int igc_get_cable_length(struct igc_hw *); 41d0d8f2a5Srin int igc_validate_mdi_setting(struct igc_hw *); 42d0d8f2a5Srin int igc_get_phy_info(struct igc_hw *); 43d0d8f2a5Srin int igc_phy_hw_reset(struct igc_hw *); 44d0d8f2a5Srin void igc_power_up_phy(struct igc_hw *); 45d0d8f2a5Srin void igc_power_down_phy(struct igc_hw *); 46d0d8f2a5Srin int igc_read_mac_addr(struct igc_hw *); 47d0d8f2a5Srin int igc_read_pba_string(struct igc_hw *, uint8_t *, uint32_t); 48d0d8f2a5Srin void igc_reload_nvm(struct igc_hw *); 49d0d8f2a5Srin int igc_validate_nvm_checksum(struct igc_hw *); 50d0d8f2a5Srin int igc_read_nvm(struct igc_hw *, uint16_t, uint16_t, uint16_t *); 51d0d8f2a5Srin int igc_write_nvm(struct igc_hw *, uint16_t, uint16_t, uint16_t *); 52d0d8f2a5Srin int igc_set_d3_lplu_state(struct igc_hw *, bool); 53d0d8f2a5Srin int igc_set_d0_lplu_state(struct igc_hw *, bool); 54d0d8f2a5Srin 55d0d8f2a5Srin #endif /* _IGC_API_H_ */ 56