xref: /netbsd-src/sys/dev/pci/if_wmvar.h (revision 7f21db1c0118155e0dd40b75182e30c589d9f63e)
1 /*	$NetBSD: if_wmvar.h,v 1.8 2010/01/14 18:56:02 msaitoh Exp $	*/
2 
3 /*
4  * Copyright (c) 2001, 2002, 2003, 2004 Wasabi Systems, Inc.
5  * All rights reserved.
6  *
7  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *	This product includes software developed for the NetBSD Project by
20  *	Wasabi Systems, Inc.
21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22  *    or promote products derived from this software without specific prior
23  *    written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35  * POSSIBILITY OF SUCH DAMAGE.
36  */
37 
38 /*******************************************************************************
39 
40   Copyright (c) 2001-2005, Intel Corporation
41   All rights reserved.
42 
43   Redistribution and use in source and binary forms, with or without
44   modification, are permitted provided that the following conditions are met:
45 
46    1. Redistributions of source code must retain the above copyright notice,
47       this list of conditions and the following disclaimer.
48 
49    2. Redistributions in binary form must reproduce the above copyright
50       notice, this list of conditions and the following disclaimer in the
51       documentation and/or other materials provided with the distribution.
52 
53    3. Neither the name of the Intel Corporation nor the names of its
54       contributors may be used to endorse or promote products derived from
55       this software without specific prior written permission.
56 
57   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
58   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
59   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
60   ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
61   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
62   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
63   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
64   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
65   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
66   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
67   POSSIBILITY OF SUCH DAMAGE.
68 
69 *******************************************************************************/
70 
71 #ifndef _DEV_PCI_IF_WMVAR_H_
72 #define _DEV_PCI_IF_WMVAR_H_
73 
74 /* sc_flags */
75 #define	WM_F_HAS_MII		0x0001	/* has MII */
76 #define	WM_F_EEPROM_HANDSHAKE	0x0002	/* requires EEPROM handshake */
77 #define	WM_F_EEPROM_SEMAPHORE	0x0004	/* EEPROM with semaphore */
78 #define	WM_F_EEPROM_EERDEEWR	0x0008	/* EEPROM access via EERD/EEWR */
79 #define	WM_F_EEPROM_SPI		0x0010	/* EEPROM is SPI */
80 #define	WM_F_EEPROM_FLASH	0x0020	/* EEPROM is FLASH */
81 #define	WM_F_EEPROM_INVALID	0x0040	/* EEPROM not present (bad checksum) */
82 #define	WM_F_IOH_VALID		0x0080	/* I/O handle is valid */
83 #define	WM_F_BUS64		0x0100	/* bus is 64-bit */
84 #define	WM_F_PCIX		0x0200	/* bus is PCI-X */
85 #define	WM_F_CSA		0x0400	/* bus is CSA */
86 #define	WM_F_PCIE		0x0800	/* bus is PCI-Express */
87 #define WM_F_SWFW_SYNC		0x1000  /* Software-Firmware synchronisation */
88 #define WM_F_SWFWHW_SYNC	0x2000  /* Software-Firmware synchronisation */
89 
90 typedef enum {
91 	WM_T_unknown		= 0,
92 	WM_T_82542_2_0,			/* i82542 2.0 (really old) */
93 	WM_T_82542_2_1,			/* i82542 2.1+ (old) */
94 	WM_T_82543,			/* i82543 */
95 	WM_T_82544,			/* i82544 */
96 	WM_T_82540,			/* i82540 */
97 	WM_T_82545,			/* i82545 */
98 	WM_T_82545_3,			/* i82545 3.0+ */
99 	WM_T_82546,			/* i82546 */
100 	WM_T_82546_3,			/* i82546 3.0+ */
101 	WM_T_82541,			/* i82541 */
102 	WM_T_82541_2,			/* i82541 2.0+ */
103 	WM_T_82547,			/* i82547 */
104 	WM_T_82547_2,			/* i82547 2.0+ */
105 	WM_T_82571,			/* i82571 */
106 	WM_T_82572,			/* i82572 */
107 	WM_T_82573,			/* i82573 */
108 	WM_T_82574,			/* i82574 */
109 	WM_T_82583,			/* i82583 */
110 	WM_T_80003,			/* i80003 */
111 	WM_T_ICH8,			/* ICH8 LAN */
112 	WM_T_ICH9,			/* ICH9 LAN */
113 	WM_T_ICH10,			/* ICH10 LAN */
114 	WM_T_PCH,			/* PCH LAN */
115 } wm_chip_type;
116 
117 typedef enum {
118 	WMPHY_UNKNOWN = 0,
119 	WMPHY_NONE,
120 	WMPHY_M88,
121 	WMPHY_IGP,
122 	WMPHY_IGP_2,
123 	WMPHY_GG82563,
124 	WMPHY_IGP_3,
125 	WMPHY_IFE,
126 	WMPHY_BM,
127 	WMPHY_82578,
128 	WMPHY_82577
129 } wm_phy_type;
130 
131 
132 #define WM_PHY_CFG_TIMEOUT	100
133 #define	WM_ICH8_LAN_INIT_TIMEOUT 1500
134 #define	WM_MDIO_OWNERSHIP_TIMEOUT 10
135 
136 #endif /* _DEV_PCI_IF_WMVAR_H_ */
137