1 /* $NetBSD: if_wi_pci.c,v 1.25 2003/06/29 22:30:25 fvdl Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Hideaki Imaizumi <hiddy@sfc.wide.ad.jp> 9 * and Ichiro FUKUHARA (ichiro@ichiro.org). 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * PCI bus front-end for the Intersil PCI WaveLan. 42 * Works with Prism2.5 Mini-PCI wavelan. 43 */ 44 45 #include <sys/cdefs.h> 46 __KERNEL_RCSID(0, "$NetBSD: if_wi_pci.c,v 1.25 2003/06/29 22:30:25 fvdl Exp $"); 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/mbuf.h> 51 #include <sys/syslog.h> 52 #include <sys/socket.h> 53 #include <sys/device.h> 54 #include <sys/callout.h> 55 56 #include <net/if.h> 57 #include <net/if_ether.h> 58 #include <net/if_media.h> 59 #include <net/if_ieee80211.h> 60 61 #include <machine/bus.h> 62 #include <machine/intr.h> 63 64 #include <dev/pci/pcireg.h> 65 #include <dev/pci/pcivar.h> 66 #include <dev/pci/pcidevs.h> 67 68 #include <dev/ic/wi_ieee.h> 69 #include <dev/ic/wireg.h> 70 #include <dev/ic/wivar.h> 71 72 #define WI_PCI_CBMA 0x10 /* Configuration Base Memory Address */ 73 #define WI_PCI_PLX_LOMEM 0x10 /* PLX chip membase */ 74 #define WI_PCI_PLX_LOIO 0x14 /* PLX chip iobase */ 75 #define WI_PCI_LOMEM 0x18 /* ISA membase */ 76 #define WI_PCI_LOIO 0x1C /* ISA iobase */ 77 78 #define CHIP_PLX_OTHER 0x01 79 #define CHIP_PLX_9052 0x02 80 81 #define WI_PLX_COR_OFFSET 0x3E0 82 #define WI_PLX_COR_VALUE 0x41 83 84 struct wi_pci_softc { 85 struct wi_softc psc_wi; /* real "wi" softc */ 86 87 /* PCI-specific goo */ 88 pci_intr_handle_t psc_ih; 89 struct pci_attach_args *psc_pa; 90 91 void *sc_powerhook; /* power hook descriptor */ 92 }; 93 94 static int wi_pci_match __P((struct device *, struct cfdata *, void *)); 95 static void wi_pci_attach __P((struct device *, struct device *, void *)); 96 static int wi_pci_enable __P((struct wi_softc *)); 97 static void wi_pci_disable __P((struct wi_softc *)); 98 static void wi_pci_reset __P((struct wi_softc *)); 99 static void wi_pci_powerhook __P((int, void *)); 100 101 static const struct wi_pci_product 102 *wi_pci_lookup __P((struct pci_attach_args *)); 103 104 CFATTACH_DECL(wi_pci, sizeof(struct wi_pci_softc), 105 wi_pci_match, wi_pci_attach, NULL, NULL); 106 107 const struct wi_pci_product { 108 pci_vendor_id_t wpp_vendor; /* vendor ID */ 109 pci_product_id_t wpp_product; /* product ID */ 110 const char *wpp_name; /* product name */ 111 int wpp_plx; /* uses PLX chip */ 112 } wi_pci_products[] = { 113 { PCI_VENDOR_GLOBALSUN, PCI_PRODUCT_GLOBALSUN_GL24110P, 114 NULL, CHIP_PLX_OTHER }, 115 { PCI_VENDOR_GLOBALSUN, PCI_PRODUCT_GLOBALSUN_GL24110P02, 116 NULL, CHIP_PLX_OTHER }, 117 { PCI_VENDOR_EUMITCOM, PCI_PRODUCT_EUMITCOM_WL11000P, 118 NULL, CHIP_PLX_OTHER }, 119 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3CRWE777A, 120 NULL, CHIP_PLX_OTHER }, 121 { PCI_VENDOR_NETGEAR, PCI_PRODUCT_NETGEAR_MA301, 122 NULL, CHIP_PLX_OTHER }, 123 { PCI_VENDOR_INTERSIL, PCI_PRODUCT_INTERSIL_MINI_PCI_WLAN, 124 "Intersil Prism2.5", 0 }, 125 { PCI_VENDOR_NDC, PCI_PRODUCT_NDC_NCP130, 126 NULL, CHIP_PLX_9052 }, 127 { PCI_VENDOR_USR2, PCI_PRODUCT_USR2_2415, 128 NULL, CHIP_PLX_OTHER }, 129 { 0, 0, 130 NULL, 0}, 131 }; 132 133 static int 134 wi_pci_enable(sc) 135 struct wi_softc *sc; 136 { 137 struct wi_pci_softc *psc = (struct wi_pci_softc *)sc; 138 139 /* establish the interrupt. */ 140 sc->sc_ih = pci_intr_establish(psc->psc_pa->pa_pc, 141 psc->psc_ih, IPL_NET, wi_intr, sc); 142 if (sc->sc_ih == NULL) { 143 printf("%s: couldn't establish interrupt\n", 144 sc->sc_dev.dv_xname); 145 return (EIO); 146 } 147 148 /* reset HFA3842 MAC core */ 149 wi_pci_reset(sc); 150 151 return (0); 152 } 153 154 static void 155 wi_pci_disable(sc) 156 struct wi_softc *sc; 157 { 158 struct wi_pci_softc *psc = (struct wi_pci_softc *)sc; 159 160 pci_intr_disestablish(psc->psc_pa->pa_pc, sc->sc_ih); 161 } 162 163 static void 164 wi_pci_reset(sc) 165 struct wi_softc *sc; 166 { 167 int i, secs, usecs; 168 169 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 170 WI_PCI_COR, WI_COR_SOFT_RESET); 171 DELAY(250*1000); /* 1/4 second */ 172 173 bus_space_write_2(sc->sc_iot, sc->sc_ioh, 174 WI_PCI_COR, WI_COR_CLEAR); 175 DELAY(500*1000); /* 1/2 second */ 176 177 /* wait 2 seconds for firmware to complete initialization. */ 178 179 for (i = 200000; i--; DELAY(10)) 180 if (!(CSR_READ_2(sc, WI_COMMAND) & WI_CMD_BUSY)) 181 break; 182 183 if (i < 0) { 184 printf("%s: PCI reset timed out\n", sc->sc_dev.dv_xname); 185 } else if (sc->sc_if.if_flags & IFF_DEBUG) { 186 usecs = (200000 - i) * 10; 187 secs = usecs / 1000000; 188 usecs %= 1000000; 189 190 printf("%s: PCI reset in %d.%06d seconds\n", 191 sc->sc_dev.dv_xname, secs, usecs); 192 } 193 194 return; 195 } 196 197 static const struct wi_pci_product * 198 wi_pci_lookup(pa) 199 struct pci_attach_args *pa; 200 { 201 const struct wi_pci_product *wpp; 202 203 for (wpp = wi_pci_products; wpp->wpp_vendor != 0; wpp++) { 204 if (PCI_VENDOR(pa->pa_id) == wpp->wpp_vendor && 205 PCI_PRODUCT(pa->pa_id) == wpp->wpp_product) 206 return (wpp); 207 } 208 return (NULL); 209 } 210 211 static int 212 wi_pci_match(parent, match, aux) 213 struct device *parent; 214 struct cfdata *match; 215 void *aux; 216 { 217 struct pci_attach_args *pa = aux; 218 219 if (wi_pci_lookup(pa) != NULL) 220 return (1); 221 return (0); 222 } 223 224 static void 225 wi_pci_attach(parent, self, aux) 226 struct device *parent, *self; 227 void *aux; 228 { 229 struct wi_pci_softc *psc = (struct wi_pci_softc *)self; 230 struct wi_softc *sc = &psc->psc_wi; 231 struct pci_attach_args *pa = aux; 232 pci_chipset_tag_t pc = pa->pa_pc; 233 const char *intrstr; 234 const struct wi_pci_product *wpp; 235 pci_intr_handle_t ih; 236 bus_space_tag_t memt, iot, plxt; 237 bus_space_handle_t memh, ioh, plxh; 238 239 psc->psc_pa = pa; 240 241 wpp = wi_pci_lookup(pa); 242 #ifdef DIAGNOSTIC 243 if (wpp == NULL) { 244 printf("\n"); 245 panic("wi_pci_attach: impossible"); 246 } 247 #endif 248 249 if (wpp->wpp_plx) { 250 /* Map memory and I/O registers. */ 251 if (pci_mapreg_map(pa, WI_PCI_LOMEM, PCI_MAPREG_TYPE_MEM, 0, 252 &memt, &memh, NULL, NULL) != 0) { 253 printf(": can't map mem space\n"); 254 return; 255 } 256 if (pci_mapreg_map(pa, WI_PCI_LOIO, PCI_MAPREG_TYPE_IO, 0, 257 &iot, &ioh, NULL, NULL) != 0) { 258 printf(": can't map I/O space\n"); 259 return; 260 } 261 262 if (wpp->wpp_plx == CHIP_PLX_OTHER) { 263 /* The PLX 9052 doesn't have IO at 0x14. Perhaps 264 other chips have, so we'll make this conditional. */ 265 if (pci_mapreg_map(pa, WI_PCI_PLX_LOIO, 266 PCI_MAPREG_TYPE_IO, 0, &plxt, 267 &plxh, NULL, NULL) != 0) { 268 printf(": can't map PLX\n"); 269 return; 270 } 271 } 272 } else { 273 if (pci_mapreg_map(pa, WI_PCI_CBMA, 274 PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 275 0, &iot, &ioh, NULL, NULL) != 0) { 276 printf(": can't map mem space\n"); 277 return; 278 } 279 280 memt = iot; 281 memh = ioh; 282 sc->sc_pci = 1; 283 } 284 285 if (wpp->wpp_name != NULL) { 286 printf(": %s Wireless Lan\n", wpp->wpp_name); 287 } else { 288 char devinfo[256]; 289 290 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo); 291 printf(": %s (rev. 0x%02x)\n", devinfo, 292 PCI_REVISION(pa->pa_class)); 293 } 294 295 sc->sc_enabled = 1; 296 sc->sc_enable = wi_pci_enable; 297 sc->sc_disable = wi_pci_disable; 298 299 sc->sc_iot = iot; 300 sc->sc_ioh = ioh; 301 /* Make sure interrupts are disabled. */ 302 CSR_WRITE_2(sc, WI_INT_EN, 0); 303 CSR_WRITE_2(sc, WI_EVENT_ACK, 0xFFFF); 304 305 if (wpp->wpp_plx == CHIP_PLX_OTHER) { 306 uint32_t command; 307 #define WI_LOCAL_INTCSR 0x4c 308 #define WI_LOCAL_INTEN 0x40 /* poke this into INTCSR */ 309 310 command = bus_space_read_4(plxt, plxh, WI_LOCAL_INTCSR); 311 command |= WI_LOCAL_INTEN; 312 bus_space_write_4(plxt, plxh, WI_LOCAL_INTCSR, command); 313 } 314 315 /* Map and establish the interrupt. */ 316 if (pci_intr_map(pa, &ih)) { 317 printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname); 318 return; 319 } 320 intrstr = pci_intr_string(pc, ih); 321 322 psc->psc_ih = ih; 323 sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, wi_intr, sc); 324 if (sc->sc_ih == NULL) { 325 printf("%s: couldn't establish interrupt", 326 sc->sc_dev.dv_xname); 327 if (intrstr != NULL) 328 printf(" at %s", intrstr); 329 printf("\n"); 330 return; 331 } 332 333 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 334 335 if (wpp->wpp_plx) { 336 /* 337 * Setup the PLX chip for level interrupts and config index 1 338 * XXX - should really reset the PLX chip too. 339 */ 340 bus_space_write_1(memt, memh, 341 WI_PLX_COR_OFFSET, WI_PLX_COR_VALUE); 342 } else { 343 /* reset HFA3842 MAC core */ 344 wi_pci_reset(sc); 345 } 346 347 printf("%s:", sc->sc_dev.dv_xname); 348 if (wi_attach(sc) != 0) { 349 printf("%s: failed to attach controller\n", 350 sc->sc_dev.dv_xname); 351 pci_intr_disestablish(pa->pa_pc, sc->sc_ih); 352 return; 353 } 354 355 sc->sc_reset = wi_pci_reset; 356 357 /* Add a suspend hook to restore PCI config state */ 358 psc->sc_powerhook = powerhook_establish(wi_pci_powerhook, psc); 359 if (psc->sc_powerhook == NULL) 360 printf ("%s: WARNING: unable to establish pci power hook\n", 361 sc->sc_dev.dv_xname); 362 } 363 364 static void 365 wi_pci_powerhook(why, arg) 366 int why; 367 void *arg; 368 { 369 struct wi_pci_softc *psc = arg; 370 struct wi_softc *sc = &psc->psc_wi; 371 372 wi_power(sc, why); 373 } 374