1 /* $NetBSD: if_tlp_pci.c,v 1.86 2006/02/18 05:04:12 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center; and Charles M. Hannum. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * PCI bus front-end for the Digital Semiconductor ``Tulip'' (21x4x) 42 * Ethernet controller family driver. 43 */ 44 45 #include <sys/cdefs.h> 46 __KERNEL_RCSID(0, "$NetBSD: if_tlp_pci.c,v 1.86 2006/02/18 05:04:12 thorpej Exp $"); 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/mbuf.h> 51 #include <sys/malloc.h> 52 #include <sys/kernel.h> 53 #include <sys/socket.h> 54 #include <sys/ioctl.h> 55 #include <sys/errno.h> 56 #include <sys/device.h> 57 58 #include <machine/endian.h> 59 60 #include <net/if.h> 61 #include <net/if_dl.h> 62 #include <net/if_media.h> 63 #include <net/if_ether.h> 64 65 #include <machine/bus.h> 66 #include <machine/intr.h> 67 #ifdef __sparc__ 68 #include <machine/promlib.h> 69 #endif 70 71 #include <dev/mii/miivar.h> 72 #include <dev/mii/mii_bitbang.h> 73 74 #include <dev/ic/tulipreg.h> 75 #include <dev/ic/tulipvar.h> 76 77 #include <dev/pci/pcivar.h> 78 #include <dev/pci/pcireg.h> 79 #include <dev/pci/pcidevs.h> 80 81 /* 82 * PCI configuration space registers used by the Tulip. 83 */ 84 #define TULIP_PCI_IOBA 0x10 /* i/o mapped base */ 85 #define TULIP_PCI_MMBA 0x14 /* memory mapped base */ 86 #define TULIP_PCI_CFDA 0x40 /* configuration driver area */ 87 88 #define CFDA_SLEEP 0x80000000 /* sleep mode */ 89 #define CFDA_SNOOZE 0x40000000 /* snooze mode */ 90 91 struct tulip_pci_softc { 92 struct tulip_softc sc_tulip; /* real Tulip softc */ 93 94 /* PCI-specific goo. */ 95 void *sc_ih; /* interrupt handle */ 96 97 pci_chipset_tag_t sc_pc; /* our PCI chipset */ 98 pcitag_t sc_pcitag; /* our PCI tag */ 99 100 int sc_flags; /* flags; see below */ 101 102 LIST_HEAD(, tulip_pci_softc) sc_intrslaves; 103 LIST_ENTRY(tulip_pci_softc) sc_intrq; 104 105 /* Our {ROM,interrupt} master. */ 106 struct tulip_pci_softc *sc_master; 107 }; 108 109 /* sc_flags */ 110 #define TULIP_PCI_SHAREDINTR 0x01 /* interrupt is shared */ 111 #define TULIP_PCI_SLAVEINTR 0x02 /* interrupt is slave */ 112 #define TULIP_PCI_SHAREDROM 0x04 /* ROM is shared */ 113 #define TULIP_PCI_SLAVEROM 0x08 /* slave of shared ROM */ 114 115 static int tlp_pci_match(struct device *, struct cfdata *, void *); 116 static void tlp_pci_attach(struct device *, struct device *, void *); 117 118 CFATTACH_DECL(tlp_pci, sizeof(struct tulip_pci_softc), 119 tlp_pci_match, tlp_pci_attach, NULL, NULL); 120 121 static const struct tulip_pci_product { 122 u_int32_t tpp_vendor; /* PCI vendor ID */ 123 u_int32_t tpp_product; /* PCI product ID */ 124 tulip_chip_t tpp_chip; /* base Tulip chip type */ 125 } tlp_pci_products[] = { 126 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21040, 127 TULIP_CHIP_21040 }, 128 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21041, 129 TULIP_CHIP_21041 }, 130 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21140, 131 TULIP_CHIP_21140 }, 132 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142, 133 TULIP_CHIP_21142 }, 134 135 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C168, 136 TULIP_CHIP_82C168 }, 137 138 /* 139 * Note: This is like a MX98725 with Wake-On-LAN and a 140 * 128-bit multicast hash table. 141 */ 142 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C115, 143 TULIP_CHIP_82C115 }, 144 145 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713, 146 TULIP_CHIP_MX98713 }, 147 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX987x5, 148 TULIP_CHIP_MX98715 }, 149 150 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100TX, 151 TULIP_CHIP_MX98713 }, 152 153 { PCI_VENDOR_WINBOND, PCI_PRODUCT_WINBOND_W89C840F, 154 TULIP_CHIP_WB89C840F }, 155 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100ATX, 156 TULIP_CHIP_WB89C840F }, 157 158 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102, 159 TULIP_CHIP_DM9102 }, 160 161 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981, 162 TULIP_CHIP_AL981 }, 163 164 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN985, 165 TULIP_CHIP_AN985 }, 166 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN2242, 167 TULIP_CHIP_AN985 }, 168 169 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C910SOHOB, 170 TULIP_CHIP_AN985 }, 171 172 { PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A, 173 TULIP_CHIP_AX88140 }, 174 175 { 0, 0, 176 TULIP_CHIP_INVALID }, 177 }; 178 179 struct tlp_pci_quirks { 180 void (*tpq_func)(struct tulip_pci_softc *, 181 const u_int8_t *); 182 u_int8_t tpq_oui[3]; 183 }; 184 185 static void tlp_pci_dec_quirks(struct tulip_pci_softc *, 186 const u_int8_t *); 187 188 static void tlp_pci_znyx_21040_quirks(struct tulip_pci_softc *, 189 const u_int8_t *); 190 static void tlp_pci_smc_21040_quirks(struct tulip_pci_softc *, 191 const u_int8_t *); 192 static void tlp_pci_cogent_21040_quirks(struct tulip_pci_softc *, 193 const u_int8_t *); 194 static void tlp_pci_accton_21040_quirks(struct tulip_pci_softc *, 195 const u_int8_t *); 196 197 static void tlp_pci_cobalt_21142_quirks(struct tulip_pci_softc *, 198 const u_int8_t *); 199 static void tlp_pci_algor_21142_quirks(struct tulip_pci_softc *, 200 const u_int8_t *); 201 static void tlp_pci_netwinder_21142_quirks(struct tulip_pci_softc *, 202 const u_int8_t *); 203 static void tlp_pci_znyx_21142_quirks(struct tulip_pci_softc *, 204 const u_int8_t *); 205 206 static void tlp_pci_adaptec_quirks(struct tulip_pci_softc *, 207 const u_int8_t *); 208 209 static const struct tlp_pci_quirks tlp_pci_21040_quirks[] = { 210 { tlp_pci_znyx_21040_quirks, { 0x00, 0xc0, 0x95 } }, 211 { tlp_pci_smc_21040_quirks, { 0x00, 0x00, 0xc0 } }, 212 { tlp_pci_cogent_21040_quirks, { 0x00, 0x00, 0x92 } }, 213 { tlp_pci_accton_21040_quirks, { 0x00, 0x00, 0xe8 } }, 214 { NULL, { 0, 0, 0 } } 215 }; 216 217 static const struct tlp_pci_quirks tlp_pci_21041_quirks[] = { 218 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 219 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 220 { NULL, { 0, 0, 0 } } 221 }; 222 223 static void tlp_pci_asante_21140_quirks(struct tulip_pci_softc *, 224 const u_int8_t *); 225 static void tlp_pci_smc_21140_quirks(struct tulip_pci_softc *, 226 const u_int8_t *); 227 static void tlp_pci_vpc_21140_quirks(struct tulip_pci_softc *, 228 const u_int8_t *); 229 230 static const struct tlp_pci_quirks tlp_pci_21140_quirks[] = { 231 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 232 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 233 { tlp_pci_asante_21140_quirks, { 0x00, 0x00, 0x94 } }, 234 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0x92 } }, 235 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } }, 236 { tlp_pci_smc_21140_quirks, { 0x00, 0x00, 0xc0 } }, 237 { tlp_pci_vpc_21140_quirks, { 0x00, 0x03, 0xff } }, 238 { NULL, { 0, 0, 0 } } 239 }; 240 241 static const struct tlp_pci_quirks tlp_pci_21142_quirks[] = { 242 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 243 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 244 { tlp_pci_cobalt_21142_quirks, { 0x00, 0x10, 0xe0 } }, 245 { tlp_pci_algor_21142_quirks, { 0x00, 0x40, 0xbc } }, 246 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } }, 247 { tlp_pci_netwinder_21142_quirks,{ 0x00, 0x10, 0x57 } }, 248 { tlp_pci_znyx_21142_quirks, { 0x00, 0xc0, 0x95 } }, 249 { NULL, { 0, 0, 0 } } 250 }; 251 252 static int tlp_pci_shared_intr(void *); 253 254 static const struct tulip_pci_product * 255 tlp_pci_lookup(const struct pci_attach_args *pa) 256 { 257 const struct tulip_pci_product *tpp; 258 259 for (tpp = tlp_pci_products; 260 tlp_chip_names[tpp->tpp_chip] != NULL; 261 tpp++) { 262 if (PCI_VENDOR(pa->pa_id) == tpp->tpp_vendor && 263 PCI_PRODUCT(pa->pa_id) == tpp->tpp_product) 264 return (tpp); 265 } 266 return (NULL); 267 } 268 269 static void 270 tlp_pci_get_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr, 271 const struct tlp_pci_quirks *tpq) 272 { 273 274 for (; tpq->tpq_func != NULL; tpq++) { 275 if (tpq->tpq_oui[0] == enaddr[0] && 276 tpq->tpq_oui[1] == enaddr[1] && 277 tpq->tpq_oui[2] == enaddr[2]) { 278 (*tpq->tpq_func)(psc, enaddr); 279 return; 280 } 281 } 282 } 283 284 static void 285 tlp_pci_check_slaved(struct tulip_pci_softc *psc, int shared, int slaved) 286 { 287 extern struct cfdriver tlp_cd; 288 struct tulip_pci_softc *cur, *best = NULL; 289 struct tulip_softc *sc = &psc->sc_tulip; 290 int i; 291 292 /* 293 * First of all, find the lowest pcidev numbered device on our 294 * bus marked as shared. That should be our master. 295 */ 296 for (i = 0; i < tlp_cd.cd_ndevs; i++) { 297 if ((cur = tlp_cd.cd_devs[i]) == NULL) 298 continue; 299 if (cur->sc_tulip.sc_dev.dv_parent != sc->sc_dev.dv_parent) 300 continue; 301 if ((cur->sc_flags & shared) == 0) 302 continue; 303 if (cur == psc) 304 continue; 305 if (best == NULL || 306 best->sc_tulip.sc_devno > cur->sc_tulip.sc_devno) 307 best = cur; 308 } 309 310 if (best != NULL) { 311 psc->sc_master = best; 312 psc->sc_flags |= (shared | slaved); 313 } 314 } 315 316 static int 317 tlp_pci_match(struct device *parent, struct cfdata *match, void *aux) 318 { 319 struct pci_attach_args *pa = aux; 320 321 if (tlp_pci_lookup(pa) != NULL) 322 return (10); /* beat if_de.c */ 323 324 return (0); 325 } 326 327 static void 328 tlp_pci_attach(struct device *parent, struct device *self, void *aux) 329 { 330 struct tulip_pci_softc *psc = (void *) self; 331 struct tulip_softc *sc = &psc->sc_tulip; 332 struct pci_attach_args *pa = aux; 333 pci_chipset_tag_t pc = pa->pa_pc; 334 pci_intr_handle_t ih; 335 const char *intrstr = NULL; 336 bus_space_tag_t iot, memt; 337 bus_space_handle_t ioh, memh; 338 int ioh_valid, memh_valid, i, j; 339 const struct tulip_pci_product *tpp; 340 u_int8_t enaddr[ETHER_ADDR_LEN]; 341 u_int32_t val = 0; 342 pcireg_t reg; 343 int pmreg; 344 345 sc->sc_devno = pa->pa_device; 346 psc->sc_pc = pa->pa_pc; 347 psc->sc_pcitag = pa->pa_tag; 348 349 LIST_INIT(&psc->sc_intrslaves); 350 351 tpp = tlp_pci_lookup(pa); 352 if (tpp == NULL) { 353 printf("\n"); 354 panic("tlp_pci_attach: impossible"); 355 } 356 sc->sc_chip = tpp->tpp_chip; 357 358 /* 359 * By default, Tulip registers are 8 bytes long (4 bytes 360 * followed by a 4 byte pad). 361 */ 362 sc->sc_regshift = 3; 363 364 /* 365 * No power management hooks. 366 * XXX Maybe we should add some! 367 */ 368 sc->sc_flags |= TULIPF_ENABLED; 369 370 /* 371 * Get revision info, and set some chip-specific variables. 372 */ 373 sc->sc_rev = PCI_REVISION(pa->pa_class); 374 switch (sc->sc_chip) { 375 case TULIP_CHIP_21140: 376 if (sc->sc_rev >= 0x20) 377 sc->sc_chip = TULIP_CHIP_21140A; 378 break; 379 380 case TULIP_CHIP_21142: 381 if (sc->sc_rev >= 0x20) 382 sc->sc_chip = TULIP_CHIP_21143; 383 break; 384 385 case TULIP_CHIP_82C168: 386 if (sc->sc_rev >= 0x20) 387 sc->sc_chip = TULIP_CHIP_82C169; 388 break; 389 390 case TULIP_CHIP_MX98713: 391 if (sc->sc_rev >= 0x10) 392 sc->sc_chip = TULIP_CHIP_MX98713A; 393 break; 394 395 case TULIP_CHIP_MX98715: 396 if (sc->sc_rev >= 0x20) 397 sc->sc_chip = TULIP_CHIP_MX98715A; 398 if (sc->sc_rev >= 0x25) 399 sc->sc_chip = TULIP_CHIP_MX98715AEC_X; 400 if (sc->sc_rev >= 0x30) 401 sc->sc_chip = TULIP_CHIP_MX98725; 402 break; 403 404 case TULIP_CHIP_WB89C840F: 405 sc->sc_regshift = 2; 406 break; 407 408 case TULIP_CHIP_AN985: 409 /* 410 * The AN983 and AN985 are very similar, and are 411 * differentiated by a "signature" register that 412 * is like, but not identical, to a PCI ID register. 413 */ 414 reg = pci_conf_read(pc, pa->pa_tag, 0x80); 415 switch (reg) { 416 case 0x09811317: 417 sc->sc_chip = TULIP_CHIP_AN985; 418 break; 419 420 case 0x09851317: 421 sc->sc_chip = TULIP_CHIP_AN983; 422 break; 423 424 default: 425 /* Unknown -- use default. */ 426 break; 427 } 428 break; 429 430 case TULIP_CHIP_AX88140: 431 if (sc->sc_rev >= 0x10) 432 sc->sc_chip = TULIP_CHIP_AX88141; 433 break; 434 435 case TULIP_CHIP_DM9102: 436 if (sc->sc_rev >= 0x30) 437 sc->sc_chip = TULIP_CHIP_DM9102A; 438 break; 439 440 default: 441 /* Nothing. */ 442 break; 443 } 444 445 printf(": %s Ethernet, pass %d.%d\n", 446 tlp_chip_names[sc->sc_chip], 447 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf); 448 449 switch (sc->sc_chip) { 450 case TULIP_CHIP_21040: 451 if (sc->sc_rev < 0x20) { 452 printf("%s: 21040 must be at least pass 2.0\n", 453 sc->sc_dev.dv_xname); 454 return; 455 } 456 break; 457 458 case TULIP_CHIP_21140: 459 if (sc->sc_rev < 0x11) { 460 printf("%s: 21140 must be at least pass 1.1\n", 461 sc->sc_dev.dv_xname); 462 return; 463 } 464 break; 465 466 default: 467 /* Nothing. */ 468 break; 469 } 470 471 /* 472 * Check to see if the device is in power-save mode, and 473 * being it out if necessary. 474 */ 475 switch (sc->sc_chip) { 476 case TULIP_CHIP_21140: 477 case TULIP_CHIP_21140A: 478 case TULIP_CHIP_21142: 479 case TULIP_CHIP_21143: 480 case TULIP_CHIP_MX98713A: 481 case TULIP_CHIP_MX98715: 482 case TULIP_CHIP_MX98715A: 483 case TULIP_CHIP_MX98715AEC_X: 484 case TULIP_CHIP_MX98725: 485 case TULIP_CHIP_DM9102: 486 case TULIP_CHIP_DM9102A: 487 case TULIP_CHIP_AX88140: 488 case TULIP_CHIP_AX88141: 489 /* 490 * Clear the "sleep mode" bit in the CFDA register. 491 */ 492 reg = pci_conf_read(pc, pa->pa_tag, TULIP_PCI_CFDA); 493 if (reg & (CFDA_SLEEP|CFDA_SNOOZE)) 494 pci_conf_write(pc, pa->pa_tag, TULIP_PCI_CFDA, 495 reg & ~(CFDA_SLEEP|CFDA_SNOOZE)); 496 break; 497 498 default: 499 /* Nothing. */ 500 break; 501 } 502 503 if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PWRMGMT, &pmreg, 0)) { 504 reg = pci_conf_read(pc, pa->pa_tag, pmreg + PCI_PMCSR); 505 switch (reg & PCI_PMCSR_STATE_MASK) { 506 case PCI_PMCSR_STATE_D1: 507 case PCI_PMCSR_STATE_D2: 508 printf("%s: waking up from power state D%d\n%s", 509 sc->sc_dev.dv_xname, 510 reg & PCI_PMCSR_STATE_MASK, sc->sc_dev.dv_xname); 511 pci_conf_write(pc, pa->pa_tag, pmreg + PCI_PMCSR, 512 (reg & ~PCI_PMCSR_STATE_MASK) | 513 PCI_PMCSR_STATE_D0); 514 break; 515 case PCI_PMCSR_STATE_D3: 516 /* 517 * The card has lost all configuration data in 518 * this state, so punt. 519 */ 520 printf("%s: unable to wake up from power state D3, " 521 "reboot required.\n", sc->sc_dev.dv_xname); 522 pci_conf_write(pc, pa->pa_tag, pmreg + PCI_PMCSR, 523 (reg & ~PCI_PMCSR_STATE_MASK) | 524 PCI_PMCSR_STATE_D0); 525 return; 526 } 527 } 528 529 /* 530 * Map the device. 531 */ 532 ioh_valid = (pci_mapreg_map(pa, TULIP_PCI_IOBA, 533 PCI_MAPREG_TYPE_IO, 0, 534 &iot, &ioh, NULL, NULL) == 0); 535 memh_valid = (pci_mapreg_map(pa, TULIP_PCI_MMBA, 536 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 537 &memt, &memh, NULL, NULL) == 0); 538 539 if (memh_valid) { 540 sc->sc_st = memt; 541 sc->sc_sh = memh; 542 } else if (ioh_valid) { 543 sc->sc_st = iot; 544 sc->sc_sh = ioh; 545 } else { 546 printf("%s: unable to map device registers\n", 547 sc->sc_dev.dv_xname); 548 return; 549 } 550 551 sc->sc_dmat = pa->pa_dmat; 552 553 /* 554 * Make sure bus mastering is enabled. 555 */ 556 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 557 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 558 PCI_COMMAND_MASTER_ENABLE); 559 560 /* 561 * Get the cacheline size. 562 */ 563 sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag, 564 PCI_BHLC_REG)); 565 566 /* 567 * Get PCI data moving command info. 568 */ 569 if (pa->pa_flags & PCI_FLAGS_MRL_OKAY) 570 sc->sc_flags |= TULIPF_MRL; 571 if (pa->pa_flags & PCI_FLAGS_MRM_OKAY) 572 sc->sc_flags |= TULIPF_MRM; 573 if (pa->pa_flags & PCI_FLAGS_MWI_OKAY) 574 sc->sc_flags |= TULIPF_MWI; 575 576 /* 577 * Read the contents of the Ethernet Address ROM/SROM. 578 */ 579 switch (sc->sc_chip) { 580 case TULIP_CHIP_21040: 581 sc->sc_srom_addrbits = 6; 582 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, M_NOWAIT); 583 TULIP_WRITE(sc, CSR_MIIROM, MIIROM_SROMCS); 584 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 585 for (j = 0; j < 10000; j++) { 586 val = TULIP_READ(sc, CSR_MIIROM); 587 if ((val & MIIROM_DN) == 0) 588 break; 589 } 590 sc->sc_srom[i] = val & MIIROM_DATA; 591 } 592 break; 593 594 case TULIP_CHIP_82C168: 595 case TULIP_CHIP_82C169: 596 { 597 sc->sc_srom_addrbits = 2; 598 sc->sc_srom = malloc(TULIP_ROM_SIZE(2), M_DEVBUF, M_NOWAIT); 599 600 /* 601 * The Lite-On PNIC stores the Ethernet address in 602 * the first 3 words of the EEPROM. EEPROM access 603 * is not like the other Tulip chips. 604 */ 605 for (i = 0; i < 6; i += 2) { 606 TULIP_WRITE(sc, CSR_PNIC_SROMCTL, 607 PNIC_SROMCTL_READ | (i >> 1)); 608 for (j = 0; j < 500; j++) { 609 delay(2); 610 val = TULIP_READ(sc, CSR_MIIROM); 611 if ((val & PNIC_MIIROM_BUSY) == 0) 612 break; 613 } 614 if (val & PNIC_MIIROM_BUSY) { 615 printf("%s: EEPROM timed out\n", 616 sc->sc_dev.dv_xname); 617 return; 618 } 619 val &= PNIC_MIIROM_DATA; 620 sc->sc_srom[i] = val >> 8; 621 sc->sc_srom[i + 1] = val & 0xff; 622 } 623 break; 624 } 625 626 default: 627 /* 628 * XXX This isn't quite the right way to do this; we should 629 * XXX be attempting to fetch the mac-addr property in the 630 * XXX bus-agnostic part of the driver independently. But 631 * XXX that requires a larger change in the SROM handling 632 * XXX logic, and for now we can at least remove a machine- 633 * XXX dependent wart from the PCI front-end. 634 */ 635 if (devprop_get(&sc->sc_dev, "mac-addr", 636 enaddr, sizeof(enaddr), NULL) == sizeof(enaddr)) { 637 extern int tlp_srom_debug; 638 sc->sc_srom_addrbits = 6; 639 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, 640 M_NOWAIT|M_ZERO); 641 memcpy(sc->sc_srom, enaddr, sizeof(enaddr)); 642 if (tlp_srom_debug) { 643 printf("SROM CONTENTS:"); 644 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 645 if ((i % 8) == 0) 646 printf("\n\t"); 647 printf("0x%02x ", sc->sc_srom[i]); 648 } 649 printf("\n"); 650 } 651 break; 652 } 653 654 /* Check for a slaved ROM on a multi-port board. */ 655 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDROM, 656 TULIP_PCI_SLAVEROM); 657 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 658 sc->sc_srom_addrbits = 659 psc->sc_master->sc_tulip.sc_srom_addrbits; 660 sc->sc_srom = psc->sc_master->sc_tulip.sc_srom; 661 enaddr[5] += 662 sc->sc_devno - psc->sc_master->sc_tulip.sc_devno; 663 } 664 else if (tlp_read_srom(sc) == 0) 665 goto cant_cope; 666 break; 667 } 668 669 /* 670 * Deal with chip/board quirks. This includes setting up 671 * the mediasw, and extracting the Ethernet address from 672 * the rombuf. 673 */ 674 switch (sc->sc_chip) { 675 case TULIP_CHIP_21040: 676 /* 677 * Parse the Ethernet Address ROM. 678 */ 679 if (tlp_parse_old_srom(sc, enaddr) == 0) 680 goto cant_cope; 681 682 683 /* 684 * All 21040 boards start out with the same 685 * media switch. 686 */ 687 sc->sc_mediasw = &tlp_21040_mediasw; 688 689 /* 690 * Deal with any quirks this board might have. 691 */ 692 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21040_quirks); 693 break; 694 695 case TULIP_CHIP_21041: 696 /* Check for new format SROM. */ 697 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 698 /* 699 * Not an ISV SROM; try the old DEC Ethernet Address 700 * ROM format. 701 */ 702 if (tlp_parse_old_srom(sc, enaddr) == 0) 703 goto cant_cope; 704 } 705 706 /* 707 * All 21041 boards use the same media switch; they all 708 * work basically the same! Yippee! 709 */ 710 sc->sc_mediasw = &tlp_21041_mediasw; 711 712 /* 713 * Deal with any quirks this board might have. 714 */ 715 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21041_quirks); 716 break; 717 718 case TULIP_CHIP_21140: 719 case TULIP_CHIP_21140A: 720 /* Check for new format SROM. */ 721 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 722 /* 723 * Not an ISV SROM; try the old DEC Ethernet Address 724 * ROM format. 725 */ 726 if (tlp_parse_old_srom(sc, enaddr) == 0) 727 goto cant_cope; 728 } else { 729 /* 730 * We start out with the 2114x ISV media switch. 731 * When we search for quirks, we may change to 732 * a different switch. 733 */ 734 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 735 } 736 737 /* 738 * Deal with any quirks this board might have. 739 */ 740 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21140_quirks); 741 742 /* 743 * Bail out now if we can't deal with this board. 744 */ 745 if (sc->sc_mediasw == NULL) 746 goto cant_cope; 747 break; 748 749 case TULIP_CHIP_21142: 750 case TULIP_CHIP_21143: 751 /* Check for new format SROM. */ 752 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 753 /* 754 * Not an ISV SROM; try the old DEC Ethernet Address 755 * ROM format. 756 */ 757 if (tlp_parse_old_srom(sc, enaddr) == 0) { 758 /* 759 * One last try: just copy the address 760 * from offset 20 and try to look 761 * up quirks. 762 */ 763 memcpy(enaddr, &sc->sc_srom[20], 764 ETHER_ADDR_LEN); 765 } 766 } else { 767 /* 768 * We start out with the 2114x ISV media switch. 769 * When we search for quirks, we may change to 770 * a different switch. 771 */ 772 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 773 } 774 775 /* 776 * Deal with any quirks this board might have. 777 */ 778 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21142_quirks); 779 780 /* 781 * Bail out now if we can't deal with this board. 782 */ 783 if (sc->sc_mediasw == NULL) 784 goto cant_cope; 785 break; 786 787 case TULIP_CHIP_82C168: 788 case TULIP_CHIP_82C169: 789 /* 790 * Lite-On PNIC's Ethernet address is the first 6 791 * bytes of its EEPROM. 792 */ 793 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 794 795 /* 796 * Lite-On PNICs always use the same mediasw; we 797 * select MII vs. internal NWAY automatically. 798 */ 799 sc->sc_mediasw = &tlp_pnic_mediasw; 800 break; 801 802 case TULIP_CHIP_MX98713: 803 /* 804 * The Macronix MX98713 has an MII and GPIO, but no 805 * internal Nway block. This chip is basically a 806 * perfect 21140A clone, with the exception of the 807 * a magic register frobbing in order to make the 808 * interface function. 809 */ 810 if (tlp_isv_srom_enaddr(sc, enaddr)) { 811 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 812 break; 813 } 814 /* FALLTHROUGH */ 815 816 case TULIP_CHIP_82C115: 817 /* 818 * Yippee! The Lite-On 82C115 is a clone of 819 * the MX98725 (the data sheet even says `MXIC' 820 * on it)! Imagine that, a clone of a clone. 821 * 822 * The differences are really minimal: 823 * 824 * - Wake-On-LAN support 825 * - 128-bit multicast hash table, rather than 826 * the standard 512-bit hash table 827 */ 828 /* FALLTHROUGH */ 829 830 case TULIP_CHIP_MX98713A: 831 case TULIP_CHIP_MX98715A: 832 case TULIP_CHIP_MX98715AEC_X: 833 case TULIP_CHIP_MX98725: 834 /* 835 * The MX98713A has an MII as well as an internal Nway block, 836 * but no GPIO. The MX98715 and MX98725 have an internal 837 * Nway block only. 838 * 839 * The internal Nway block, unlike the Lite-On PNIC's, does 840 * just that - performs Nway. Once autonegotiation completes, 841 * we must program the GPR media information into the chip. 842 * 843 * The byte offset of the Ethernet address is stored at 844 * offset 0x70. 845 */ 846 memcpy(enaddr, &sc->sc_srom[sc->sc_srom[0x70]], ETHER_ADDR_LEN); 847 sc->sc_mediasw = &tlp_pmac_mediasw; 848 break; 849 850 case TULIP_CHIP_WB89C840F: 851 /* 852 * Winbond 89C840F's Ethernet address is the first 853 * 6 bytes of its EEPROM. 854 */ 855 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 856 857 /* 858 * Winbond 89C840F has an MII attached to the SIO. 859 */ 860 sc->sc_mediasw = &tlp_sio_mii_mediasw; 861 break; 862 863 case TULIP_CHIP_AL981: 864 /* 865 * The ADMtek AL981's Ethernet address is located 866 * at offset 8 of its EEPROM. 867 */ 868 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 869 870 /* 871 * ADMtek AL981 has a built-in PHY accessed through 872 * special registers. 873 */ 874 sc->sc_mediasw = &tlp_al981_mediasw; 875 break; 876 877 case TULIP_CHIP_AN983: 878 case TULIP_CHIP_AN985: 879 /* 880 * The ADMtek AN985's Ethernet address is located 881 * at offset 8 of its EEPROM. 882 */ 883 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 884 885 /* 886 * The ADMtek AN985 can be configured in Single-Chip 887 * mode or MAC-only mode. Single-Chip uses the built-in 888 * PHY, MAC-only has an external PHY (usually HomePNA). 889 * The selection is based on an EEPROM setting, and both 890 * PHYs are accessed via MII attached to SIO. 891 * 892 * The AN985 "ghosts" the internal PHY onto all 893 * MII addresses, so we have to use a media init 894 * routine that limits the search. 895 * XXX How does this work with MAC-only mode? 896 */ 897 sc->sc_mediasw = &tlp_an985_mediasw; 898 break; 899 900 case TULIP_CHIP_DM9102: 901 case TULIP_CHIP_DM9102A: 902 /* 903 * Some boards with the Davicom chip have an ISV 904 * SROM (mostly DM9102A boards -- trying to describe 905 * the HomePNA PHY, probably) although the data in 906 * them is generally wrong. Check for ISV format 907 * and grab the Ethernet address that way, and if 908 * that fails, fall back on grabbing it from an 909 * observed offset of 20 (which is where it would 910 * be in an ISV SROM anyhow, tho ISV can cope with 911 * multi-port boards). 912 */ 913 if (!tlp_isv_srom_enaddr(sc, enaddr)) { 914 #ifdef __sparc__ 915 if ((sc->sc_srom[20] == 0 && 916 sc->sc_srom[21] == 0 && 917 sc->sc_srom[22] == 0) || 918 (sc->sc_srom[20] == 0xff && 919 sc->sc_srom[21] == 0xff && 920 sc->sc_srom[22] == 0xff)) { 921 prom_getether(PCITAG_NODE(pa->pa_tag), enaddr); 922 } else 923 #endif 924 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN); 925 } 926 927 /* 928 * Davicom chips all have an internal MII interface 929 * and a built-in PHY. DM9102A also has a an external 930 * MII interface, usually with a HomePNA PHY attached 931 * to it. 932 */ 933 sc->sc_mediasw = &tlp_dm9102_mediasw; 934 break; 935 936 case TULIP_CHIP_AX88140: 937 case TULIP_CHIP_AX88141: 938 /* 939 * ASIX AX88140/AX88141 Ethernet Address is located at offset 940 * 20 of the SROM. 941 */ 942 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN); 943 944 /* 945 * ASIX AX88140A/AX88141 chip can have a built-in PHY or 946 * an external MII interface. 947 */ 948 sc->sc_mediasw = &tlp_asix_mediasw; 949 break; 950 951 default: 952 cant_cope: 953 printf("%s: sorry, unable to handle your board\n", 954 sc->sc_dev.dv_xname); 955 return; 956 } 957 958 /* 959 * Handle shared interrupts. 960 */ 961 if (psc->sc_flags & TULIP_PCI_SHAREDINTR) { 962 if (psc->sc_master) 963 psc->sc_flags |= TULIP_PCI_SLAVEINTR; 964 else { 965 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDINTR, 966 TULIP_PCI_SLAVEINTR); 967 if (psc->sc_master == NULL) 968 psc->sc_master = psc; 969 } 970 LIST_INSERT_HEAD(&psc->sc_master->sc_intrslaves, 971 psc, sc_intrq); 972 } 973 974 if (psc->sc_flags & TULIP_PCI_SLAVEINTR) { 975 printf("%s: sharing interrupt with %s\n", 976 sc->sc_dev.dv_xname, 977 psc->sc_master->sc_tulip.sc_dev.dv_xname); 978 } else { 979 /* 980 * Map and establish our interrupt. 981 */ 982 if (pci_intr_map(pa, &ih)) { 983 printf("%s: unable to map interrupt\n", 984 sc->sc_dev.dv_xname); 985 return; 986 } 987 intrstr = pci_intr_string(pc, ih); 988 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, 989 (psc->sc_flags & TULIP_PCI_SHAREDINTR) ? 990 tlp_pci_shared_intr : tlp_intr, sc); 991 if (psc->sc_ih == NULL) { 992 printf("%s: unable to establish interrupt", 993 sc->sc_dev.dv_xname); 994 if (intrstr != NULL) 995 printf(" at %s", intrstr); 996 printf("\n"); 997 return; 998 } 999 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, 1000 intrstr); 1001 } 1002 1003 /* 1004 * Finish off the attach. 1005 */ 1006 tlp_attach(sc, enaddr); 1007 } 1008 1009 static int 1010 tlp_pci_shared_intr(void *arg) 1011 { 1012 struct tulip_pci_softc *master = arg, *slave; 1013 int rv = 0; 1014 1015 for (slave = LIST_FIRST(&master->sc_intrslaves); 1016 slave != NULL; 1017 slave = LIST_NEXT(slave, sc_intrq)) 1018 rv |= tlp_intr(&slave->sc_tulip); 1019 1020 return (rv); 1021 } 1022 1023 static void 1024 tlp_pci_dec_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1025 { 1026 struct tulip_softc *sc = &psc->sc_tulip; 1027 1028 /* 1029 * This isn't really a quirk-gathering device, really. We 1030 * just want to get the spiffy DEC board name from the SROM. 1031 */ 1032 strcpy(sc->sc_name, "DEC "); 1033 1034 if (memcmp(&sc->sc_srom[29], "DE500", 5) == 0 || 1035 memcmp(&sc->sc_srom[29], "DE450", 5) == 0) 1036 memcpy(&sc->sc_name[4], &sc->sc_srom[29], 8); 1037 else 1038 sc->sc_name[3] = '\0'; 1039 } 1040 1041 static void 1042 tlp_pci_znyx_21040_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1043 { 1044 struct tulip_softc *sc = &psc->sc_tulip; 1045 u_int16_t id = 0; 1046 1047 /* 1048 * If we have a slaved ROM, just copy the bits from the master. 1049 * This is in case we fail the ROM ID check (older boards) and 1050 * need to fall back on Ethernet address model checking; that 1051 * will fail for slave chips. 1052 */ 1053 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 1054 strcpy(sc->sc_name, psc->sc_master->sc_tulip.sc_name); 1055 sc->sc_mediasw = psc->sc_master->sc_tulip.sc_mediasw; 1056 psc->sc_flags |= 1057 psc->sc_master->sc_flags & TULIP_PCI_SHAREDINTR; 1058 return; 1059 } 1060 1061 if (sc->sc_srom[32] == 0x4a && sc->sc_srom[33] == 0x52) { 1062 id = sc->sc_srom[37] | (sc->sc_srom[36] << 8); 1063 switch (id) { 1064 zx312: 1065 case 0x0602: /* ZX312 */ 1066 strcpy(sc->sc_name, "ZNYX ZX312"); 1067 return; 1068 1069 case 0x0622: /* ZX312T */ 1070 strcpy(sc->sc_name, "ZNYX ZX312T"); 1071 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1072 return; 1073 1074 zx314_inta: 1075 case 0x0701: /* ZX314 INTA */ 1076 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1077 /* FALLTHROUGH */ 1078 case 0x0711: /* ZX314 */ 1079 strcpy(sc->sc_name, "ZNYX ZX314"); 1080 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1081 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1082 return; 1083 1084 zx315_inta: 1085 case 0x0801: /* ZX315 INTA */ 1086 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1087 /* FALLTHROUGH */ 1088 case 0x0811: /* ZX315 */ 1089 strcpy(sc->sc_name, "ZNYX ZX315"); 1090 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1091 return; 1092 1093 default: 1094 id = 0; 1095 break; 1096 } 1097 } 1098 1099 /* 1100 * Deal with boards that have broken ROMs. 1101 */ 1102 if (id == 0) { 1103 if ((enaddr[3] & ~3) == 0xf0 && (enaddr[5] & 3) == 0x00) 1104 goto zx314_inta; 1105 if ((enaddr[3] & ~3) == 0xf4 && (enaddr[5] & 1) == 0x00) 1106 goto zx315_inta; 1107 if ((enaddr[3] & ~3) == 0xec) 1108 goto zx312; 1109 } 1110 1111 strcpy(sc->sc_name, "ZNYX ZX31x"); 1112 } 1113 1114 static void tlp_pci_znyx_21142_qs6611_reset(struct tulip_softc *); 1115 1116 static void 1117 tlp_pci_znyx_21142_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1118 { 1119 struct tulip_softc *sc = &psc->sc_tulip; 1120 pcireg_t subid; 1121 1122 subid = pci_conf_read(psc->sc_pc, psc->sc_pcitag, PCI_SUBSYS_ID_REG); 1123 1124 if (PCI_VENDOR(subid) != PCI_VENDOR_ZNYX) 1125 return; /* ? */ 1126 1127 switch (PCI_PRODUCT(subid) & 0xff) { 1128 /* 1129 * ZNYX 21143 boards with QS6611 PHY 1130 */ 1131 case 0x12: /* ZX345Q */ 1132 case 0x13: /* ZX346Q */ 1133 case 0x14: /* ZX348Q */ 1134 case 0x18: /* ZX414 */ 1135 case 0x19: /* ZX412 */ 1136 case 0x1a: /* ZX444 */ 1137 case 0x1b: /* ZX442 */ 1138 case 0x23: /* ZX212 */ 1139 case 0x24: /* ZX214 */ 1140 case 0x29: /* ZX374 */ 1141 case 0x2d: /* ZX372 */ 1142 case 0x2b: /* ZX244 */ 1143 case 0x2c: /* ZX424 */ 1144 case 0x2e: /* ZX422 */ 1145 printf("%s: QS6611 PHY\n", sc->sc_dev.dv_xname); 1146 sc->sc_reset = tlp_pci_znyx_21142_qs6611_reset; 1147 break; 1148 } 1149 } 1150 1151 static void 1152 tlp_pci_znyx_21142_qs6611_reset(struct tulip_softc *sc) 1153 { 1154 1155 /* 1156 * Reset QS6611 PHY. 1157 */ 1158 TULIP_WRITE(sc, CSR_SIAGEN, 1159 SIAGEN_CWE | SIAGEN_LGS1 | SIAGEN_ABM | (0xf << 16)); 1160 delay(200); 1161 TULIP_WRITE(sc, CSR_SIAGEN, (0x4 << 16)); 1162 delay(10000); 1163 } 1164 1165 static void 1166 tlp_pci_smc_21040_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1167 { 1168 struct tulip_softc *sc = &psc->sc_tulip; 1169 u_int16_t id1, id2, ei; 1170 int auibnc = 0, utp = 0; 1171 char *cp; 1172 1173 id1 = sc->sc_srom[0x60] | (sc->sc_srom[0x61] << 8); 1174 id2 = sc->sc_srom[0x62] | (sc->sc_srom[0x63] << 8); 1175 ei = sc->sc_srom[0x66] | (sc->sc_srom[0x67] << 8); 1176 1177 strcpy(sc->sc_name, "SMC 8432"); 1178 cp = &sc->sc_name[8]; 1179 1180 if ((id1 & 1) == 0) { 1181 *cp++ = 'B'; 1182 auibnc = 1; 1183 } 1184 if ((id1 & 0xff) > 0x32) { 1185 *cp++ = 'T'; 1186 utp = 1; 1187 } 1188 if ((id1 & 0x4000) == 0) { 1189 *cp++ = 'A'; 1190 auibnc = 1; 1191 } 1192 if (id2 == 0x15) { 1193 sc->sc_name[7] = '4'; 1194 *cp++ = '-'; 1195 *cp++ = 'C'; 1196 *cp++ = 'H'; 1197 *cp++ = ei ? '2' : '1'; 1198 } 1199 *cp = '\0'; 1200 1201 if (utp != 0 && auibnc == 0) 1202 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1203 else if (utp == 0 && auibnc != 0) 1204 sc->sc_mediasw = &tlp_21040_auibnc_mediasw; 1205 } 1206 1207 static void 1208 tlp_pci_cogent_21040_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1209 { 1210 1211 strcpy(psc->sc_tulip.sc_name, "Cogent multi-port"); 1212 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1213 } 1214 1215 static void 1216 tlp_pci_accton_21040_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1217 { 1218 1219 strcpy(psc->sc_tulip.sc_name, "ACCTON EN1203"); 1220 } 1221 1222 static void tlp_pci_asante_21140_reset(struct tulip_softc *); 1223 1224 static void 1225 tlp_pci_asante_21140_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1226 { 1227 struct tulip_softc *sc = &psc->sc_tulip; 1228 1229 /* 1230 * Some Asante boards don't use the ISV SROM format. For 1231 * those that don't, we initialize the GPIO direction bits, 1232 * and provide our own reset hook, which resets the MII. 1233 * 1234 * All of these boards use SIO-attached-MII media. 1235 */ 1236 if (sc->sc_mediasw == &tlp_2114x_isv_mediasw) 1237 return; 1238 1239 strcpy(sc->sc_name, "Asante"); 1240 1241 sc->sc_gp_dir = 0xbf; 1242 sc->sc_reset = tlp_pci_asante_21140_reset; 1243 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1244 } 1245 1246 static void 1247 tlp_pci_asante_21140_reset(struct tulip_softc *sc) 1248 { 1249 1250 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1251 TULIP_WRITE(sc, CSR_GPP, 0x8); 1252 delay(100); 1253 TULIP_WRITE(sc, CSR_GPP, 0); 1254 } 1255 1256 /* 1257 * SMC 9332DST media switch. 1258 */ 1259 static void tlp_smc9332dst_tmsw_init(struct tulip_softc *); 1260 1261 static const struct tulip_mediasw tlp_smc9332dst_mediasw = { 1262 tlp_smc9332dst_tmsw_init, 1263 tlp_21140_gpio_get, 1264 tlp_21140_gpio_set 1265 }; 1266 1267 static void 1268 tlp_pci_smc_21140_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1269 { 1270 struct tulip_softc *sc = &psc->sc_tulip; 1271 1272 if (sc->sc_mediasw != NULL) { 1273 return; 1274 } 1275 strcpy(psc->sc_tulip.sc_name, "SMC 9332DST"); 1276 sc->sc_mediasw = &tlp_smc9332dst_mediasw; 1277 } 1278 1279 static void 1280 tlp_smc9332dst_tmsw_init(struct tulip_softc *sc) 1281 { 1282 struct tulip_21x4x_media *tm; 1283 const char *sep = ""; 1284 uint32_t reg; 1285 int i, cnt; 1286 1287 sc->sc_gp_dir = GPP_SMC9332DST_PINS; 1288 sc->sc_opmode = OPMODE_MBO | OPMODE_PS; 1289 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 1290 1291 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 1292 tlp_mediastatus); 1293 printf("%s: ", sc->sc_dev.dv_xname); 1294 1295 #define ADD(m, c) \ 1296 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \ 1297 tm->tm_opmode = (c); \ 1298 tm->tm_gpdata = GPP_SMC9332DST_INIT; \ 1299 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm) 1300 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 1301 1302 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0), OPMODE_TTM); 1303 PRINT("10baseT"); 1304 1305 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, 0), 1306 OPMODE_TTM | OPMODE_FD); 1307 PRINT("10baseT-FDX"); 1308 1309 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 1310 OPMODE_PS | OPMODE_PCS | OPMODE_SCR); 1311 PRINT("100baseTX"); 1312 1313 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, 0), 1314 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD); 1315 PRINT("100baseTX-FDX"); 1316 1317 #undef ADD 1318 #undef PRINT 1319 1320 printf("\n"); 1321 1322 tlp_reset(sc); 1323 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode | OPMODE_PCS | OPMODE_SCR); 1324 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1325 delay(10); 1326 TULIP_WRITE(sc, CSR_GPP, GPP_SMC9332DST_INIT); 1327 delay(200000); 1328 cnt = 0; 1329 for (i = 1000; i > 0; i--) { 1330 reg = TULIP_READ(sc, CSR_GPP); 1331 if ((~reg & (GPP_SMC9332DST_OK10 | 1332 GPP_SMC9332DST_OK100)) == 0) { 1333 if (cnt++ > 100) { 1334 break; 1335 } 1336 } else if ((reg & GPP_SMC9332DST_OK10) == 0) { 1337 break; 1338 } else { 1339 cnt = 0; 1340 } 1341 delay(1000); 1342 } 1343 if (cnt > 100) { 1344 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX); 1345 } else { 1346 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 1347 } 1348 } 1349 1350 static void 1351 tlp_pci_vpc_21140_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1352 { 1353 struct tulip_softc *sc = &psc->sc_tulip; 1354 char *p1 = (char *) &sc->sc_srom[32]; 1355 char *p2 = &sc->sc_name[0]; 1356 1357 do { 1358 if ((unsigned char) *p1 & 0x80) 1359 *p2++ = ' '; 1360 else 1361 *p2++ = *p1; 1362 } while (*p1++); 1363 } 1364 1365 static void tlp_pci_cobalt_21142_reset(struct tulip_softc *); 1366 1367 static void 1368 tlp_pci_cobalt_21142_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1369 { 1370 struct tulip_softc *sc = &psc->sc_tulip; 1371 1372 /* 1373 * Cobalt Networks interfaces are just MII-on-SIO. 1374 */ 1375 sc->sc_reset = tlp_pci_cobalt_21142_reset; 1376 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1377 1378 /* 1379 * The Cobalt systems tend to fall back to store-and-forward 1380 * pretty quickly, so we select that from the beginning to 1381 * avoid initial timeouts. 1382 */ 1383 sc->sc_txthresh = TXTH_SF; 1384 } 1385 1386 static void 1387 tlp_pci_cobalt_21142_reset(struct tulip_softc *sc) 1388 { 1389 /* 1390 * Reset PHY. 1391 */ 1392 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE | (1 << 16)); 1393 delay(10); 1394 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE); 1395 delay(10); 1396 } 1397 1398 static void 1399 tlp_pci_algor_21142_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1400 { 1401 struct tulip_softc *sc = &psc->sc_tulip; 1402 1403 /* 1404 * Algorithmics boards just have MII-on-SIO. 1405 * 1406 * XXX They also have AUI on the serial interface. 1407 * XXX Deal with this. 1408 */ 1409 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1410 } 1411 1412 /* 1413 * Cogent EM1x0 (aka. Adaptec ANA-6910) media switch. 1414 */ 1415 static void tlp_cogent_em1x0_tmsw_init(struct tulip_softc *); 1416 1417 static const struct tulip_mediasw tlp_cogent_em1x0_mediasw = { 1418 tlp_cogent_em1x0_tmsw_init, 1419 tlp_21140_gpio_get, 1420 tlp_21140_gpio_set 1421 }; 1422 1423 static void 1424 tlp_pci_adaptec_quirks(struct tulip_pci_softc *psc, const u_int8_t *enaddr) 1425 { 1426 struct tulip_softc *sc = &psc->sc_tulip; 1427 uint8_t *srom = sc->sc_srom, id0; 1428 uint16_t id1, id2; 1429 1430 if (sc->sc_mediasw == NULL) { 1431 id0 = srom[32]; 1432 switch (id0) { 1433 case 0x12: 1434 strcpy(psc->sc_tulip.sc_name, "Cogent EM100TX"); 1435 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1436 break; 1437 1438 case 0x15: 1439 strcpy(psc->sc_tulip.sc_name, "Cogent EM100FX"); 1440 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1441 break; 1442 1443 #if 0 1444 case XXX: 1445 strcpy(psc->sc_tulip.sc_name, "Cogent EM110TX"); 1446 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1447 break; 1448 #endif 1449 1450 default: 1451 printf("%s: unknown Cogent board ID 0x%02x\n", 1452 sc->sc_dev.dv_xname, id0); 1453 } 1454 return; 1455 } 1456 1457 id1 = TULIP_ROM_GETW(srom, 0); 1458 id2 = TULIP_ROM_GETW(srom, 2); 1459 if (id1 != 0x1109) { 1460 goto unknown; 1461 } 1462 1463 switch (id2) { 1464 case 0x1900: 1465 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911"); 1466 break; 1467 1468 case 0x2400: 1469 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6944A"); 1470 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1471 break; 1472 1473 case 0x2b00: 1474 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911A"); 1475 break; 1476 1477 case 0x3000: 1478 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6922"); 1479 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1480 break; 1481 1482 default: 1483 unknown: 1484 printf("%s: unknown Adaptec/Cogent board ID 0x%04x/0x%04x\n", 1485 sc->sc_dev.dv_xname, id1, id2); 1486 } 1487 } 1488 1489 static void 1490 tlp_cogent_em1x0_tmsw_init(struct tulip_softc *sc) 1491 { 1492 struct tulip_21x4x_media *tm; 1493 const char *sep = ""; 1494 1495 sc->sc_gp_dir = GPP_COGENT_EM1x0_PINS; 1496 sc->sc_opmode = OPMODE_MBO | OPMODE_PS; 1497 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 1498 1499 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 1500 tlp_mediastatus); 1501 printf("%s: ", sc->sc_dev.dv_xname); 1502 1503 #define ADD(m, c) \ 1504 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \ 1505 tm->tm_opmode = (c); \ 1506 tm->tm_gpdata = GPP_COGENT_EM1x0_INIT; \ 1507 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm) 1508 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 1509 1510 if (sc->sc_srom[32] == 0x15) { 1511 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, 0, 0), 1512 OPMODE_PS | OPMODE_PCS); 1513 PRINT("100baseFX"); 1514 1515 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0), 1516 OPMODE_PS | OPMODE_PCS | OPMODE_FD); 1517 PRINT("100baseFX-FDX"); 1518 printf("\n"); 1519 1520 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_FX); 1521 } else { 1522 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 1523 OPMODE_PS | OPMODE_PCS | OPMODE_SCR); 1524 PRINT("100baseTX"); 1525 1526 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0), 1527 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD); 1528 PRINT("100baseTX-FDX"); 1529 printf("\n"); 1530 1531 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX); 1532 } 1533 1534 #undef ADD 1535 #undef PRINT 1536 } 1537 1538 static void tlp_pci_netwinder_21142_reset(struct tulip_softc *); 1539 1540 static void 1541 tlp_pci_netwinder_21142_quirks(struct tulip_pci_softc *psc, 1542 const u_int8_t *enaddr) 1543 { 1544 struct tulip_softc *sc = &psc->sc_tulip; 1545 1546 /* 1547 * Netwinders just use MII-on_SIO. 1548 */ 1549 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1550 sc->sc_reset = tlp_pci_netwinder_21142_reset; 1551 } 1552 1553 void 1554 tlp_pci_netwinder_21142_reset(struct tulip_softc *sc) 1555 { 1556 1557 /* 1558 * Reset the PHY. 1559 */ 1560 TULIP_WRITE(sc, CSR_SIAGEN, 0x0821 << 16); 1561 delay(10); 1562 TULIP_WRITE(sc, CSR_SIAGEN, 0x0000 << 16); 1563 delay(10); 1564 TULIP_WRITE(sc, CSR_SIAGEN, 0x0001 << 16); 1565 delay(10); 1566 } 1567