1 /* $NetBSD: if_tlp_pci.c,v 1.114 2009/05/06 09:25:16 cegger Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center; and Charles M. Hannum. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * PCI bus front-end for the Digital Semiconductor ``Tulip'' (21x4x) 35 * Ethernet controller family driver. 36 */ 37 38 #include <sys/cdefs.h> 39 __KERNEL_RCSID(0, "$NetBSD: if_tlp_pci.c,v 1.114 2009/05/06 09:25:16 cegger Exp $"); 40 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 #include <sys/mbuf.h> 44 #include <sys/malloc.h> 45 #include <sys/kernel.h> 46 #include <sys/socket.h> 47 #include <sys/ioctl.h> 48 #include <sys/errno.h> 49 #include <sys/device.h> 50 51 #include <machine/endian.h> 52 53 #include <net/if.h> 54 #include <net/if_dl.h> 55 #include <net/if_media.h> 56 #include <net/if_ether.h> 57 58 #include <sys/bus.h> 59 #include <sys/intr.h> 60 #ifdef __sparc__ 61 #include <machine/promlib.h> 62 #endif 63 64 #include <dev/mii/miivar.h> 65 #include <dev/mii/mii_bitbang.h> 66 67 #include <dev/ic/tulipreg.h> 68 #include <dev/ic/tulipvar.h> 69 70 #include <dev/pci/pcivar.h> 71 #include <dev/pci/pcireg.h> 72 #include <dev/pci/pcidevs.h> 73 74 /* 75 * PCI configuration space registers used by the Tulip. 76 */ 77 #define TULIP_PCI_IOBA 0x10 /* i/o mapped base */ 78 #define TULIP_PCI_MMBA 0x14 /* memory mapped base */ 79 #define TULIP_PCI_CFDA 0x40 /* configuration driver area */ 80 81 #define CFDA_SLEEP 0x80000000 /* sleep mode */ 82 #define CFDA_SNOOZE 0x40000000 /* snooze mode */ 83 84 struct tulip_pci_softc { 85 struct tulip_softc sc_tulip; /* real Tulip softc */ 86 87 /* PCI-specific goo. */ 88 void *sc_ih; /* interrupt handle */ 89 bus_size_t sc_mapsize; 90 91 pci_chipset_tag_t sc_pc; /* our PCI chipset */ 92 pcitag_t sc_pcitag; /* our PCI tag */ 93 94 int sc_flags; /* flags; see below */ 95 96 LIST_HEAD(, tulip_pci_softc) sc_intrslaves; 97 LIST_ENTRY(tulip_pci_softc) sc_intrq; 98 99 /* Our {ROM,interrupt} master. */ 100 struct tulip_pci_softc *sc_master; 101 }; 102 103 /* sc_flags */ 104 #define TULIP_PCI_SHAREDINTR 0x01 /* interrupt is shared */ 105 #define TULIP_PCI_SLAVEINTR 0x02 /* interrupt is slave */ 106 #define TULIP_PCI_SHAREDROM 0x04 /* ROM is shared */ 107 #define TULIP_PCI_SLAVEROM 0x08 /* slave of shared ROM */ 108 109 static int tlp_pci_match(device_t, cfdata_t, void *); 110 static void tlp_pci_attach(device_t, device_t, void *); 111 static int tlp_pci_detach(device_t, int); 112 113 CFATTACH_DECL3_NEW(tlp_pci, sizeof(struct tulip_pci_softc), 114 tlp_pci_match, tlp_pci_attach, tlp_pci_detach, NULL, NULL, NULL, 115 DVF_DETACH_SHUTDOWN); 116 117 static const struct tulip_pci_product { 118 uint32_t tpp_vendor; /* PCI vendor ID */ 119 uint32_t tpp_product; /* PCI product ID */ 120 tulip_chip_t tpp_chip; /* base Tulip chip type */ 121 } tlp_pci_products[] = { 122 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21040, 123 TULIP_CHIP_21040 }, 124 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21041, 125 TULIP_CHIP_21041 }, 126 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21140, 127 TULIP_CHIP_21140 }, 128 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142, 129 TULIP_CHIP_21142 }, 130 131 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C168, 132 TULIP_CHIP_82C168 }, 133 134 /* 135 * Note: This is like a MX98725 with Wake-On-LAN and a 136 * 128-bit multicast hash table. 137 */ 138 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C115, 139 TULIP_CHIP_82C115 }, 140 141 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713, 142 TULIP_CHIP_MX98713 }, 143 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX987x5, 144 TULIP_CHIP_MX98715 }, 145 146 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100TX, 147 TULIP_CHIP_MX98713 }, 148 149 { PCI_VENDOR_WINBOND, PCI_PRODUCT_WINBOND_W89C840F, 150 TULIP_CHIP_WB89C840F }, 151 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100ATX, 152 TULIP_CHIP_WB89C840F }, 153 154 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102, 155 TULIP_CHIP_DM9102 }, 156 157 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981, 158 TULIP_CHIP_AL981 }, 159 160 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AN983, 161 TULIP_CHIP_AN985 }, 162 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_ADM9511, 163 TULIP_CHIP_AN985 }, 164 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_ADM9513, 165 TULIP_CHIP_AN985 }, 166 { PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_EN2242, 167 TULIP_CHIP_AN985 }, 168 169 { PCI_VENDOR_3COM, PCI_PRODUCT_3COM_3C910SOHOB, 170 TULIP_CHIP_AN985 }, 171 172 { PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A, 173 TULIP_CHIP_AX88140 }, 174 175 { PCI_VENDOR_CONEXANT, PCI_PRODUCT_CONEXANT_LANFINITY, 176 TULIP_CHIP_RS7112 }, 177 178 { 0, 0, 179 TULIP_CHIP_INVALID }, 180 }; 181 182 struct tlp_pci_quirks { 183 void (*tpq_func)(struct tulip_pci_softc *, 184 const uint8_t *); 185 uint8_t tpq_oui[3]; 186 }; 187 188 static void tlp_pci_dec_quirks(struct tulip_pci_softc *, 189 const uint8_t *); 190 191 static void tlp_pci_znyx_21040_quirks(struct tulip_pci_softc *, 192 const uint8_t *); 193 static void tlp_pci_smc_21040_quirks(struct tulip_pci_softc *, 194 const uint8_t *); 195 static void tlp_pci_cogent_21040_quirks(struct tulip_pci_softc *, 196 const uint8_t *); 197 static void tlp_pci_accton_21040_quirks(struct tulip_pci_softc *, 198 const uint8_t *); 199 200 static void tlp_pci_cobalt_21142_quirks(struct tulip_pci_softc *, 201 const uint8_t *); 202 static void tlp_pci_algor_21142_quirks(struct tulip_pci_softc *, 203 const uint8_t *); 204 static void tlp_pci_netwinder_21142_quirks(struct tulip_pci_softc *, 205 const uint8_t *); 206 static void tlp_pci_phobos_21142_quirks(struct tulip_pci_softc *, 207 const uint8_t *); 208 static void tlp_pci_znyx_21142_quirks(struct tulip_pci_softc *, 209 const uint8_t *); 210 211 static void tlp_pci_adaptec_quirks(struct tulip_pci_softc *, 212 const uint8_t *); 213 214 static const struct tlp_pci_quirks tlp_pci_21040_quirks[] = { 215 { tlp_pci_znyx_21040_quirks, { 0x00, 0xc0, 0x95 } }, 216 { tlp_pci_smc_21040_quirks, { 0x00, 0x00, 0xc0 } }, 217 { tlp_pci_cogent_21040_quirks, { 0x00, 0x00, 0x92 } }, 218 { tlp_pci_accton_21040_quirks, { 0x00, 0x00, 0xe8 } }, 219 { NULL, { 0, 0, 0 } } 220 }; 221 222 static const struct tlp_pci_quirks tlp_pci_21041_quirks[] = { 223 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 224 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 225 { NULL, { 0, 0, 0 } } 226 }; 227 228 static void tlp_pci_asante_21140_quirks(struct tulip_pci_softc *, 229 const uint8_t *); 230 static void tlp_pci_e100_quirks(struct tulip_pci_softc *, 231 const uint8_t *); 232 static void tlp_pci_phobos_21140_quirks(struct tulip_pci_softc *, 233 const uint8_t *); 234 static void tlp_pci_smc_21140_quirks(struct tulip_pci_softc *, 235 const uint8_t *); 236 static void tlp_pci_vpc_21140_quirks(struct tulip_pci_softc *, 237 const uint8_t *); 238 239 static const struct tlp_pci_quirks tlp_pci_21140_quirks[] = { 240 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 241 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 242 { tlp_pci_e100_quirks, { 0x00, 0xa0, 0x59 } }, 243 { tlp_pci_asante_21140_quirks, { 0x00, 0x00, 0x94 } }, 244 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0x92 } }, 245 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } }, 246 { tlp_pci_phobos_21140_quirks, { 0x00, 0x60, 0xf5 } }, 247 { tlp_pci_smc_21140_quirks, { 0x00, 0x00, 0xc0 } }, 248 { tlp_pci_vpc_21140_quirks, { 0x00, 0x03, 0xff } }, 249 { NULL, { 0, 0, 0 } } 250 }; 251 252 static const struct tlp_pci_quirks tlp_pci_21142_quirks[] = { 253 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 254 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 255 { tlp_pci_cobalt_21142_quirks, { 0x00, 0x10, 0xe0 } }, 256 { tlp_pci_algor_21142_quirks, { 0x00, 0x40, 0xbc } }, 257 { tlp_pci_adaptec_quirks, { 0x00, 0x00, 0xd1 } }, 258 { tlp_pci_netwinder_21142_quirks,{ 0x00, 0x10, 0x57 } }, 259 { tlp_pci_phobos_21142_quirks, { 0x00, 0x60, 0xf5 } }, 260 { tlp_pci_znyx_21142_quirks, { 0x00, 0xc0, 0x95 } }, 261 { NULL, { 0, 0, 0 } } 262 }; 263 264 static int tlp_pci_shared_intr(void *); 265 266 static const struct tulip_pci_product * 267 tlp_pci_lookup(const struct pci_attach_args *pa) 268 { 269 const struct tulip_pci_product *tpp; 270 271 /* Don't match lmc cards */ 272 if (PCI_VENDOR(pci_conf_read(pa->pa_pc, pa->pa_tag, 273 PCI_SUBSYS_ID_REG)) == PCI_VENDOR_LMC) 274 return NULL; 275 276 for (tpp = tlp_pci_products; 277 tlp_chip_names[tpp->tpp_chip] != NULL; 278 tpp++) { 279 if (PCI_VENDOR(pa->pa_id) == tpp->tpp_vendor && 280 PCI_PRODUCT(pa->pa_id) == tpp->tpp_product) 281 return tpp; 282 } 283 return NULL; 284 } 285 286 static void 287 tlp_pci_get_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr, 288 const struct tlp_pci_quirks *tpq) 289 { 290 291 for (; tpq->tpq_func != NULL; tpq++) { 292 if (tpq->tpq_oui[0] == enaddr[0] && 293 tpq->tpq_oui[1] == enaddr[1] && 294 tpq->tpq_oui[2] == enaddr[2]) { 295 (*tpq->tpq_func)(psc, enaddr); 296 return; 297 } 298 } 299 } 300 301 static void 302 tlp_pci_check_slaved(struct tulip_pci_softc *psc, int shared, int slaved) 303 { 304 extern struct cfdriver tlp_cd; 305 struct tulip_pci_softc *cur, *best = NULL; 306 struct tulip_softc *sc = &psc->sc_tulip; 307 int i; 308 309 /* 310 * First of all, find the lowest pcidev numbered device on our 311 * bus marked as shared. That should be our master. 312 */ 313 for (i = 0; i < tlp_cd.cd_ndevs; i++) { 314 if ((cur = device_lookup_private(&tlp_cd, i)) == NULL) 315 continue; 316 if (device_parent(cur->sc_tulip.sc_dev) != 317 device_parent(sc->sc_dev)) 318 continue; 319 if ((cur->sc_flags & shared) == 0) 320 continue; 321 if (cur == psc) 322 continue; 323 if (best == NULL || 324 best->sc_tulip.sc_devno > cur->sc_tulip.sc_devno) 325 best = cur; 326 } 327 328 if (best != NULL) { 329 psc->sc_master = best; 330 psc->sc_flags |= (shared | slaved); 331 } 332 } 333 334 static int 335 tlp_pci_match(device_t parent, cfdata_t match, void *aux) 336 { 337 struct pci_attach_args *pa = aux; 338 339 if (tlp_pci_lookup(pa) != NULL) 340 return 10; /* beat if_de.c */ 341 342 return 0; 343 } 344 345 static void 346 tlp_pci_attach(device_t parent, device_t self, void *aux) 347 { 348 struct tulip_pci_softc *psc = device_private(self); 349 struct tulip_softc *sc = &psc->sc_tulip; 350 struct pci_attach_args *pa = aux; 351 pci_chipset_tag_t pc = pa->pa_pc; 352 pci_intr_handle_t ih; 353 const char *intrstr = NULL; 354 bus_space_tag_t iot, memt; 355 bus_space_handle_t ioh, memh; 356 int ioh_valid, memh_valid, i, j; 357 const struct tulip_pci_product *tpp; 358 prop_data_t ea; 359 uint8_t enaddr[ETHER_ADDR_LEN]; 360 uint32_t val = 0; 361 pcireg_t reg; 362 int error; 363 bus_size_t iosize = 0, memsize = 0; 364 365 sc->sc_dev = self; 366 sc->sc_devno = pa->pa_device; 367 psc->sc_pc = pa->pa_pc; 368 psc->sc_pcitag = pa->pa_tag; 369 370 LIST_INIT(&psc->sc_intrslaves); 371 372 tpp = tlp_pci_lookup(pa); 373 if (tpp == NULL) { 374 printf("\n"); 375 panic("tlp_pci_attach: impossible"); 376 } 377 sc->sc_chip = tpp->tpp_chip; 378 379 /* 380 * By default, Tulip registers are 8 bytes long (4 bytes 381 * followed by a 4 byte pad). 382 */ 383 sc->sc_regshift = 3; 384 385 /* 386 * No power management hooks. 387 * XXX Maybe we should add some! 388 */ 389 sc->sc_flags |= TULIPF_ENABLED; 390 391 /* 392 * Get revision info, and set some chip-specific variables. 393 */ 394 sc->sc_rev = PCI_REVISION(pa->pa_class); 395 switch (sc->sc_chip) { 396 case TULIP_CHIP_21140: 397 if (sc->sc_rev >= 0x20) 398 sc->sc_chip = TULIP_CHIP_21140A; 399 break; 400 401 case TULIP_CHIP_21142: 402 if (sc->sc_rev >= 0x20) 403 sc->sc_chip = TULIP_CHIP_21143; 404 break; 405 406 case TULIP_CHIP_82C168: 407 if (sc->sc_rev >= 0x20) 408 sc->sc_chip = TULIP_CHIP_82C169; 409 break; 410 411 case TULIP_CHIP_MX98713: 412 if (sc->sc_rev >= 0x10) 413 sc->sc_chip = TULIP_CHIP_MX98713A; 414 break; 415 416 case TULIP_CHIP_MX98715: 417 if (sc->sc_rev >= 0x20) 418 sc->sc_chip = TULIP_CHIP_MX98715A; 419 if (sc->sc_rev >= 0x25) 420 sc->sc_chip = TULIP_CHIP_MX98715AEC_X; 421 if (sc->sc_rev >= 0x30) 422 sc->sc_chip = TULIP_CHIP_MX98725; 423 break; 424 425 case TULIP_CHIP_WB89C840F: 426 sc->sc_regshift = 2; 427 break; 428 429 case TULIP_CHIP_AN985: 430 /* 431 * The AN983 and AN985 are very similar, and are 432 * differentiated by a "signature" register that 433 * is like, but not identical, to a PCI ID register. 434 */ 435 reg = pci_conf_read(pc, pa->pa_tag, 0x80); 436 switch (reg) { 437 case 0x09811317: 438 sc->sc_chip = TULIP_CHIP_AN985; 439 break; 440 441 case 0x09851317: 442 sc->sc_chip = TULIP_CHIP_AN983; 443 break; 444 445 default: 446 /* Unknown -- use default. */ 447 break; 448 } 449 break; 450 451 case TULIP_CHIP_AX88140: 452 if (sc->sc_rev >= 0x10) 453 sc->sc_chip = TULIP_CHIP_AX88141; 454 break; 455 456 case TULIP_CHIP_DM9102: 457 if (sc->sc_rev >= 0x30) 458 sc->sc_chip = TULIP_CHIP_DM9102A; 459 break; 460 461 default: 462 /* Nothing. */ 463 break; 464 } 465 466 aprint_normal(": %s Ethernet, pass %d.%d\n", 467 tlp_chip_names[sc->sc_chip], 468 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf); 469 470 switch (sc->sc_chip) { 471 case TULIP_CHIP_21040: 472 if (sc->sc_rev < 0x20) { 473 aprint_normal_dev(self, 474 "21040 must be at least pass 2.0\n"); 475 return; 476 } 477 break; 478 479 case TULIP_CHIP_21140: 480 if (sc->sc_rev < 0x11) { 481 aprint_normal_dev(self, 482 "21140 must be at least pass 1.1\n"); 483 return; 484 } 485 break; 486 487 default: 488 /* Nothing. */ 489 break; 490 } 491 492 /* 493 * Check to see if the device is in power-save mode, and 494 * being it out if necessary. 495 */ 496 switch (sc->sc_chip) { 497 case TULIP_CHIP_21140: 498 case TULIP_CHIP_21140A: 499 case TULIP_CHIP_21142: 500 case TULIP_CHIP_21143: 501 case TULIP_CHIP_MX98713A: 502 case TULIP_CHIP_MX98715: 503 case TULIP_CHIP_MX98715A: 504 case TULIP_CHIP_MX98715AEC_X: 505 case TULIP_CHIP_MX98725: 506 case TULIP_CHIP_DM9102: 507 case TULIP_CHIP_DM9102A: 508 case TULIP_CHIP_AX88140: 509 case TULIP_CHIP_AX88141: 510 case TULIP_CHIP_RS7112: 511 /* 512 * Clear the "sleep mode" bit in the CFDA register. 513 */ 514 reg = pci_conf_read(pc, pa->pa_tag, TULIP_PCI_CFDA); 515 if (reg & (CFDA_SLEEP|CFDA_SNOOZE)) 516 pci_conf_write(pc, pa->pa_tag, TULIP_PCI_CFDA, 517 reg & ~(CFDA_SLEEP|CFDA_SNOOZE)); 518 break; 519 520 default: 521 /* Nothing. */ 522 break; 523 } 524 525 /* power up chip */ 526 if ((error = pci_activate(pa->pa_pc, pa->pa_tag, self, 527 NULL)) && error != EOPNOTSUPP) { 528 aprint_error_dev(self, "cannot activate %d\n", 529 error); 530 return; 531 } 532 533 /* 534 * Map the device. 535 */ 536 537 ioh_valid = (pci_mapreg_map(pa, TULIP_PCI_IOBA, 538 PCI_MAPREG_TYPE_IO, 0, 539 &iot, &ioh, NULL, &iosize) == 0); 540 memh_valid = (pci_mapreg_map(pa, TULIP_PCI_MMBA, 541 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 542 &memt, &memh, NULL, &memsize) == 0); 543 if (memh_valid) { 544 sc->sc_st = memt; 545 sc->sc_sh = memh; 546 psc->sc_mapsize = memsize; 547 if (ioh_valid) { 548 bus_space_unmap(iot, ioh, iosize); 549 ioh_valid = 0; 550 } 551 } else if (ioh_valid) { 552 sc->sc_st = iot; 553 sc->sc_sh = ioh; 554 psc->sc_mapsize = iosize; 555 if (memh_valid) { 556 bus_space_unmap(memt, memh, memsize); 557 memh_valid = 0; 558 } 559 } else { 560 aprint_error_dev(self, "unable to map device registers\n"); 561 goto fail; 562 } 563 564 sc->sc_dmat = pa->pa_dmat; 565 566 /* 567 * Make sure bus mastering is enabled. 568 */ 569 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 570 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 571 PCI_COMMAND_MASTER_ENABLE); 572 573 /* 574 * Get the cacheline size. 575 */ 576 sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag, 577 PCI_BHLC_REG)); 578 579 /* 580 * Get PCI data moving command info. 581 */ 582 if (pa->pa_flags & PCI_FLAGS_MRL_OKAY) 583 sc->sc_flags |= TULIPF_MRL; 584 if (pa->pa_flags & PCI_FLAGS_MRM_OKAY) 585 sc->sc_flags |= TULIPF_MRM; 586 if (pa->pa_flags & PCI_FLAGS_MWI_OKAY) 587 sc->sc_flags |= TULIPF_MWI; 588 589 /* 590 * Read the contents of the Ethernet Address ROM/SROM. 591 */ 592 switch (sc->sc_chip) { 593 case TULIP_CHIP_21040: 594 sc->sc_srom_addrbits = 6; 595 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, M_NOWAIT); 596 TULIP_WRITE(sc, CSR_MIIROM, MIIROM_SROMCS); 597 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 598 for (j = 0; j < 10000; j++) { 599 val = TULIP_READ(sc, CSR_MIIROM); 600 if ((val & MIIROM_DN) == 0) 601 break; 602 } 603 sc->sc_srom[i] = val & MIIROM_DATA; 604 } 605 break; 606 607 case TULIP_CHIP_82C168: 608 case TULIP_CHIP_82C169: 609 { 610 sc->sc_srom_addrbits = 2; 611 sc->sc_srom = malloc(TULIP_ROM_SIZE(2), M_DEVBUF, M_NOWAIT); 612 613 /* 614 * The Lite-On PNIC stores the Ethernet address in 615 * the first 3 words of the EEPROM. EEPROM access 616 * is not like the other Tulip chips. 617 */ 618 for (i = 0; i < 6; i += 2) { 619 TULIP_WRITE(sc, CSR_PNIC_SROMCTL, 620 PNIC_SROMCTL_READ | (i >> 1)); 621 for (j = 0; j < 500; j++) { 622 delay(2); 623 val = TULIP_READ(sc, CSR_MIIROM); 624 if ((val & PNIC_MIIROM_BUSY) == 0) 625 break; 626 } 627 if (val & PNIC_MIIROM_BUSY) { 628 aprint_error_dev(self, "EEPROM timed out\n"); 629 goto fail; 630 } 631 val &= PNIC_MIIROM_DATA; 632 sc->sc_srom[i] = val >> 8; 633 sc->sc_srom[i + 1] = val & 0xff; 634 } 635 break; 636 } 637 638 default: 639 /* 640 * XXX This isn't quite the right way to do this; we should 641 * XXX be attempting to fetch the mac-addr property in the 642 * XXX bus-agnostic part of the driver independently. But 643 * XXX that requires a larger change in the SROM handling 644 * XXX logic, and for now we can at least remove a machine- 645 * XXX dependent wart from the PCI front-end. 646 */ 647 ea = prop_dictionary_get(device_properties(self), 648 "mac-addr"); 649 if (ea != NULL) { 650 extern int tlp_srom_debug; 651 KASSERT(prop_object_type(ea) == PROP_TYPE_DATA); 652 KASSERT(prop_data_size(ea) == ETHER_ADDR_LEN); 653 654 memcpy(enaddr, prop_data_data_nocopy(ea), 655 ETHER_ADDR_LEN); 656 657 sc->sc_srom_addrbits = 6; 658 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, 659 M_NOWAIT|M_ZERO); 660 memcpy(sc->sc_srom, enaddr, sizeof(enaddr)); 661 if (tlp_srom_debug) { 662 aprint_normal("SROM CONTENTS:"); 663 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 664 if ((i % 8) == 0) 665 aprint_normal("\n\t"); 666 aprint_normal("0x%02x ", sc->sc_srom[i]); 667 } 668 aprint_normal("\n"); 669 } 670 break; 671 } 672 673 /* Check for a slaved ROM on a multi-port board. */ 674 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDROM, 675 TULIP_PCI_SLAVEROM); 676 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 677 sc->sc_srom_addrbits = 678 psc->sc_master->sc_tulip.sc_srom_addrbits; 679 sc->sc_srom = psc->sc_master->sc_tulip.sc_srom; 680 enaddr[5] += 681 sc->sc_devno - psc->sc_master->sc_tulip.sc_devno; 682 } 683 else if (tlp_read_srom(sc) == 0) 684 goto cant_cope; 685 break; 686 } 687 688 /* 689 * Deal with chip/board quirks. This includes setting up 690 * the mediasw, and extracting the Ethernet address from 691 * the rombuf. 692 */ 693 switch (sc->sc_chip) { 694 case TULIP_CHIP_21040: 695 /* 696 * Parse the Ethernet Address ROM. 697 */ 698 if (tlp_parse_old_srom(sc, enaddr) == 0) 699 goto cant_cope; 700 701 702 /* 703 * All 21040 boards start out with the same 704 * media switch. 705 */ 706 sc->sc_mediasw = &tlp_21040_mediasw; 707 708 /* 709 * Deal with any quirks this board might have. 710 */ 711 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21040_quirks); 712 break; 713 714 case TULIP_CHIP_21041: 715 /* Check for new format SROM. */ 716 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 717 /* 718 * Not an ISV SROM; try the old DEC Ethernet Address 719 * ROM format. 720 */ 721 if (tlp_parse_old_srom(sc, enaddr) == 0) 722 goto cant_cope; 723 } 724 725 /* 726 * All 21041 boards use the same media switch; they all 727 * work basically the same! Yippee! 728 */ 729 sc->sc_mediasw = &tlp_21041_mediasw; 730 731 /* 732 * Deal with any quirks this board might have. 733 */ 734 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21041_quirks); 735 break; 736 737 case TULIP_CHIP_21140: 738 case TULIP_CHIP_21140A: 739 /* Check for new format SROM. */ 740 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 741 /* 742 * Not an ISV SROM; try the old DEC Ethernet Address 743 * ROM format. 744 */ 745 if (tlp_parse_old_srom(sc, enaddr) == 0) 746 goto cant_cope; 747 } else { 748 /* 749 * We start out with the 2114x ISV media switch. 750 * When we search for quirks, we may change to 751 * a different switch. 752 */ 753 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 754 } 755 756 /* 757 * Deal with any quirks this board might have. 758 */ 759 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21140_quirks); 760 761 /* 762 * Bail out now if we can't deal with this board. 763 */ 764 if (sc->sc_mediasw == NULL) 765 goto cant_cope; 766 break; 767 768 case TULIP_CHIP_21142: 769 case TULIP_CHIP_21143: 770 /* Check for new format SROM. */ 771 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 772 /* 773 * Not an ISV SROM; try the old DEC Ethernet Address 774 * ROM format. 775 */ 776 if (tlp_parse_old_srom(sc, enaddr) == 0) { 777 /* 778 * One last try: just copy the address 779 * from offset 20 and try to look 780 * up quirks. 781 */ 782 memcpy(enaddr, &sc->sc_srom[20], 783 ETHER_ADDR_LEN); 784 } 785 } else { 786 /* 787 * We start out with the 2114x ISV media switch. 788 * When we search for quirks, we may change to 789 * a different switch. 790 */ 791 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 792 } 793 794 /* 795 * Deal with any quirks this board might have. 796 */ 797 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21142_quirks); 798 799 /* 800 * Bail out now if we can't deal with this board. 801 */ 802 if (sc->sc_mediasw == NULL) 803 goto cant_cope; 804 break; 805 806 case TULIP_CHIP_82C168: 807 case TULIP_CHIP_82C169: 808 /* 809 * Lite-On PNIC's Ethernet address is the first 6 810 * bytes of its EEPROM. 811 */ 812 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 813 814 /* 815 * Lite-On PNICs always use the same mediasw; we 816 * select MII vs. internal NWAY automatically. 817 */ 818 sc->sc_mediasw = &tlp_pnic_mediasw; 819 break; 820 821 case TULIP_CHIP_MX98713: 822 /* 823 * The Macronix MX98713 has an MII and GPIO, but no 824 * internal Nway block. This chip is basically a 825 * perfect 21140A clone, with the exception of the 826 * a magic register frobbing in order to make the 827 * interface function. 828 */ 829 if (tlp_isv_srom_enaddr(sc, enaddr)) { 830 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 831 break; 832 } 833 /* FALLTHROUGH */ 834 835 case TULIP_CHIP_82C115: 836 /* 837 * Yippee! The Lite-On 82C115 is a clone of 838 * the MX98725 (the data sheet even says `MXIC' 839 * on it)! Imagine that, a clone of a clone. 840 * 841 * The differences are really minimal: 842 * 843 * - Wake-On-LAN support 844 * - 128-bit multicast hash table, rather than 845 * the standard 512-bit hash table 846 */ 847 /* FALLTHROUGH */ 848 849 case TULIP_CHIP_MX98713A: 850 case TULIP_CHIP_MX98715A: 851 case TULIP_CHIP_MX98715AEC_X: 852 case TULIP_CHIP_MX98725: 853 /* 854 * The MX98713A has an MII as well as an internal Nway block, 855 * but no GPIO. The MX98715 and MX98725 have an internal 856 * Nway block only. 857 * 858 * The internal Nway block, unlike the Lite-On PNIC's, does 859 * just that - performs Nway. Once autonegotiation completes, 860 * we must program the GPR media information into the chip. 861 * 862 * The byte offset of the Ethernet address is stored at 863 * offset 0x70. 864 */ 865 memcpy(enaddr, &sc->sc_srom[sc->sc_srom[0x70]], ETHER_ADDR_LEN); 866 sc->sc_mediasw = &tlp_pmac_mediasw; 867 break; 868 869 case TULIP_CHIP_WB89C840F: 870 /* 871 * Winbond 89C840F's Ethernet address is the first 872 * 6 bytes of its EEPROM. 873 */ 874 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 875 876 /* 877 * Winbond 89C840F has an MII attached to the SIO. 878 */ 879 sc->sc_mediasw = &tlp_sio_mii_mediasw; 880 break; 881 882 case TULIP_CHIP_AL981: 883 /* 884 * The ADMtek AL981's Ethernet address is located 885 * at offset 8 of its EEPROM. 886 */ 887 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 888 889 /* 890 * ADMtek AL981 has a built-in PHY accessed through 891 * special registers. 892 */ 893 sc->sc_mediasw = &tlp_al981_mediasw; 894 break; 895 896 case TULIP_CHIP_AN983: 897 case TULIP_CHIP_AN985: 898 /* 899 * The ADMtek AN985's Ethernet address is located 900 * at offset 8 of its EEPROM. 901 */ 902 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 903 904 /* 905 * The ADMtek AN985 can be configured in Single-Chip 906 * mode or MAC-only mode. Single-Chip uses the built-in 907 * PHY, MAC-only has an external PHY (usually HomePNA). 908 * The selection is based on an EEPROM setting, and both 909 * PHYs are accessed via MII attached to SIO. 910 * 911 * The AN985 "ghosts" the internal PHY onto all 912 * MII addresses, so we have to use a media init 913 * routine that limits the search. 914 * XXX How does this work with MAC-only mode? 915 */ 916 sc->sc_mediasw = &tlp_an985_mediasw; 917 break; 918 919 case TULIP_CHIP_DM9102: 920 case TULIP_CHIP_DM9102A: 921 /* 922 * Some boards with the Davicom chip have an ISV 923 * SROM (mostly DM9102A boards -- trying to describe 924 * the HomePNA PHY, probably) although the data in 925 * them is generally wrong. Check for ISV format 926 * and grab the Ethernet address that way, and if 927 * that fails, fall back on grabbing it from an 928 * observed offset of 20 (which is where it would 929 * be in an ISV SROM anyhow, tho ISV can cope with 930 * multi-port boards). 931 */ 932 if (!tlp_isv_srom_enaddr(sc, enaddr)) { 933 #ifdef __sparc__ 934 if ((sc->sc_srom[20] == 0 && 935 sc->sc_srom[21] == 0 && 936 sc->sc_srom[22] == 0) || 937 (sc->sc_srom[20] == 0xff && 938 sc->sc_srom[21] == 0xff && 939 sc->sc_srom[22] == 0xff)) { 940 prom_getether(PCITAG_NODE(pa->pa_tag), enaddr); 941 } else 942 #endif 943 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN); 944 } 945 946 /* 947 * Davicom chips all have an internal MII interface 948 * and a built-in PHY. DM9102A also has a an external 949 * MII interface, usually with a HomePNA PHY attached 950 * to it. 951 */ 952 sc->sc_mediasw = &tlp_dm9102_mediasw; 953 break; 954 955 case TULIP_CHIP_AX88140: 956 case TULIP_CHIP_AX88141: 957 /* 958 * ASIX AX88140/AX88141 Ethernet Address is located at offset 959 * 20 of the SROM. 960 */ 961 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN); 962 963 /* 964 * ASIX AX88140A/AX88141 chip can have a built-in PHY or 965 * an external MII interface. 966 */ 967 sc->sc_mediasw = &tlp_asix_mediasw; 968 break; 969 970 case TULIP_CHIP_RS7112: 971 /* 972 * RS7112 Ethernet Address is located of offset 0x19a 973 * of the SROM 974 */ 975 memcpy(enaddr, &sc->sc_srom[0x19a], ETHER_ADDR_LEN); 976 977 /* RS7112 chip has a PHY at MII address 1 */ 978 sc->sc_mediasw = &tlp_rs7112_mediasw; 979 break; 980 981 default: 982 cant_cope: 983 aprint_error_dev(self, "sorry, unable to handle your board\n"); 984 goto fail; 985 } 986 987 /* 988 * Handle shared interrupts. 989 */ 990 if (psc->sc_flags & TULIP_PCI_SHAREDINTR) { 991 if (psc->sc_master) 992 psc->sc_flags |= TULIP_PCI_SLAVEINTR; 993 else { 994 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDINTR, 995 TULIP_PCI_SLAVEINTR); 996 if (psc->sc_master == NULL) 997 psc->sc_master = psc; 998 } 999 LIST_INSERT_HEAD(&psc->sc_master->sc_intrslaves, 1000 psc, sc_intrq); 1001 } 1002 1003 if (psc->sc_flags & TULIP_PCI_SLAVEINTR) { 1004 aprint_normal_dev(self, "sharing interrupt with %s\n", 1005 device_xname(psc->sc_master->sc_tulip.sc_dev)); 1006 } else { 1007 /* 1008 * Map and establish our interrupt. 1009 */ 1010 if (pci_intr_map(pa, &ih)) { 1011 aprint_error_dev(self, "unable to map interrupt\n"); 1012 goto fail; 1013 } 1014 intrstr = pci_intr_string(pc, ih); 1015 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, 1016 (psc->sc_flags & TULIP_PCI_SHAREDINTR) ? 1017 tlp_pci_shared_intr : tlp_intr, sc); 1018 if (psc->sc_ih == NULL) { 1019 aprint_error_dev(self, "unable to establish interrupt"); 1020 if (intrstr != NULL) 1021 aprint_error(" at %s", intrstr); 1022 aprint_error("\n"); 1023 goto fail; 1024 } 1025 aprint_normal_dev(self, "interrupting at %s\n", 1026 intrstr); 1027 } 1028 1029 /* 1030 * Finish off the attach. 1031 */ 1032 error = tlp_attach(sc, enaddr); 1033 if (error) 1034 goto fail; 1035 return; 1036 1037 fail: 1038 if (psc->sc_ih != NULL) { 1039 pci_intr_disestablish(psc->sc_pc, psc->sc_ih); 1040 psc->sc_ih = NULL; 1041 } 1042 1043 if (ioh_valid) 1044 bus_space_unmap(iot, ioh, iosize); 1045 if (memh_valid) 1046 bus_space_unmap(memt, memh, memsize); 1047 psc->sc_mapsize = 0; 1048 return; 1049 } 1050 1051 static int 1052 tlp_pci_detach(device_t self, int flags) 1053 { 1054 struct tulip_pci_softc *psc = device_private(self); 1055 struct tulip_softc *sc = &psc->sc_tulip; 1056 int rv; 1057 1058 rv = tlp_detach(sc); 1059 if (rv) 1060 return rv; 1061 1062 if (psc->sc_ih != NULL) { 1063 pci_intr_disestablish(psc->sc_pc, psc->sc_ih); 1064 psc->sc_ih = NULL; 1065 } 1066 1067 if (psc->sc_mapsize) { 1068 bus_space_unmap(sc->sc_st, sc->sc_sh, psc->sc_mapsize); 1069 psc->sc_mapsize = 0; 1070 } 1071 1072 return 0; 1073 } 1074 1075 static int 1076 tlp_pci_shared_intr(void *arg) 1077 { 1078 struct tulip_pci_softc *master = arg, *slave; 1079 int rv = 0; 1080 1081 for (slave = LIST_FIRST(&master->sc_intrslaves); 1082 slave != NULL; 1083 slave = LIST_NEXT(slave, sc_intrq)) 1084 rv |= tlp_intr(&slave->sc_tulip); 1085 1086 return rv; 1087 } 1088 1089 static void 1090 tlp_pci_dec_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1091 { 1092 struct tulip_softc *sc = &psc->sc_tulip; 1093 1094 /* 1095 * This isn't really a quirk-gathering device, really. We 1096 * just want to get the spiffy DEC board name from the SROM. 1097 */ 1098 strcpy(sc->sc_name, "DEC "); 1099 1100 if (memcmp(&sc->sc_srom[29], "DE500", 5) == 0 || 1101 memcmp(&sc->sc_srom[29], "DE450", 5) == 0) 1102 memcpy(&sc->sc_name[4], &sc->sc_srom[29], 8); 1103 else 1104 sc->sc_name[3] = '\0'; 1105 } 1106 1107 static void 1108 tlp_pci_znyx_21040_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1109 { 1110 struct tulip_softc *sc = &psc->sc_tulip; 1111 uint16_t id = 0; 1112 1113 /* 1114 * If we have a slaved ROM, just copy the bits from the master. 1115 * This is in case we fail the ROM ID check (older boards) and 1116 * need to fall back on Ethernet address model checking; that 1117 * will fail for slave chips. 1118 */ 1119 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 1120 strcpy(sc->sc_name, psc->sc_master->sc_tulip.sc_name); 1121 sc->sc_mediasw = psc->sc_master->sc_tulip.sc_mediasw; 1122 psc->sc_flags |= 1123 psc->sc_master->sc_flags & TULIP_PCI_SHAREDINTR; 1124 return; 1125 } 1126 1127 if (sc->sc_srom[32] == 0x4a && sc->sc_srom[33] == 0x52) { 1128 id = sc->sc_srom[37] | (sc->sc_srom[36] << 8); 1129 switch (id) { 1130 zx312: 1131 case 0x0602: /* ZX312 */ 1132 strcpy(sc->sc_name, "ZNYX ZX312"); 1133 return; 1134 1135 case 0x0622: /* ZX312T */ 1136 strcpy(sc->sc_name, "ZNYX ZX312T"); 1137 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1138 return; 1139 1140 zx314_inta: 1141 case 0x0701: /* ZX314 INTA */ 1142 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1143 /* FALLTHROUGH */ 1144 case 0x0711: /* ZX314 */ 1145 strcpy(sc->sc_name, "ZNYX ZX314"); 1146 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1147 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1148 return; 1149 1150 zx315_inta: 1151 case 0x0801: /* ZX315 INTA */ 1152 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 1153 /* FALLTHROUGH */ 1154 case 0x0811: /* ZX315 */ 1155 strcpy(sc->sc_name, "ZNYX ZX315"); 1156 psc->sc_flags |= TULIP_PCI_SHAREDROM; 1157 return; 1158 1159 default: 1160 id = 0; 1161 break; 1162 } 1163 } 1164 1165 /* 1166 * Deal with boards that have broken ROMs. 1167 */ 1168 if (id == 0) { 1169 if ((enaddr[3] & ~3) == 0xf0 && (enaddr[5] & 3) == 0x00) 1170 goto zx314_inta; 1171 if ((enaddr[3] & ~3) == 0xf4 && (enaddr[5] & 1) == 0x00) 1172 goto zx315_inta; 1173 if ((enaddr[3] & ~3) == 0xec) 1174 goto zx312; 1175 } 1176 1177 strcpy(sc->sc_name, "ZNYX ZX31x"); 1178 } 1179 1180 static void tlp_pci_znyx_21142_qs6611_reset(struct tulip_softc *); 1181 1182 static void 1183 tlp_pci_znyx_21142_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1184 { 1185 struct tulip_softc *sc = &psc->sc_tulip; 1186 pcireg_t subid; 1187 1188 subid = pci_conf_read(psc->sc_pc, psc->sc_pcitag, PCI_SUBSYS_ID_REG); 1189 1190 if (PCI_VENDOR(subid) != PCI_VENDOR_ZNYX) 1191 return; /* ? */ 1192 1193 switch (PCI_PRODUCT(subid) & 0xff) { 1194 /* 1195 * ZNYX 21143 boards with QS6611 PHY 1196 */ 1197 case 0x12: /* ZX345Q */ 1198 case 0x13: /* ZX346Q */ 1199 case 0x14: /* ZX348Q */ 1200 case 0x18: /* ZX414 */ 1201 case 0x19: /* ZX412 */ 1202 case 0x1a: /* ZX444 */ 1203 case 0x1b: /* ZX442 */ 1204 case 0x23: /* ZX212 */ 1205 case 0x24: /* ZX214 */ 1206 case 0x29: /* ZX374 */ 1207 case 0x2d: /* ZX372 */ 1208 case 0x2b: /* ZX244 */ 1209 case 0x2c: /* ZX424 */ 1210 case 0x2e: /* ZX422 */ 1211 printf("%s: QS6611 PHY\n", device_xname(sc->sc_dev)); 1212 sc->sc_reset = tlp_pci_znyx_21142_qs6611_reset; 1213 break; 1214 } 1215 } 1216 1217 static void 1218 tlp_pci_znyx_21142_qs6611_reset(struct tulip_softc *sc) 1219 { 1220 1221 /* 1222 * Reset QS6611 PHY. 1223 */ 1224 TULIP_WRITE(sc, CSR_SIAGEN, 1225 SIAGEN_CWE | SIAGEN_LGS1 | SIAGEN_ABM | (0xf << 16)); 1226 delay(200); 1227 TULIP_WRITE(sc, CSR_SIAGEN, (0x4 << 16)); 1228 delay(10000); 1229 } 1230 1231 static void 1232 tlp_pci_smc_21040_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1233 { 1234 struct tulip_softc *sc = &psc->sc_tulip; 1235 uint16_t id1, id2, ei; 1236 int auibnc = 0, utp = 0; 1237 char *cp; 1238 1239 id1 = sc->sc_srom[0x60] | (sc->sc_srom[0x61] << 8); 1240 id2 = sc->sc_srom[0x62] | (sc->sc_srom[0x63] << 8); 1241 ei = sc->sc_srom[0x66] | (sc->sc_srom[0x67] << 8); 1242 1243 strcpy(sc->sc_name, "SMC 8432"); 1244 cp = &sc->sc_name[8]; 1245 1246 if ((id1 & 1) == 0) { 1247 *cp++ = 'B'; 1248 auibnc = 1; 1249 } 1250 if ((id1 & 0xff) > 0x32) { 1251 *cp++ = 'T'; 1252 utp = 1; 1253 } 1254 if ((id1 & 0x4000) == 0) { 1255 *cp++ = 'A'; 1256 auibnc = 1; 1257 } 1258 if (id2 == 0x15) { 1259 sc->sc_name[7] = '4'; 1260 *cp++ = '-'; 1261 *cp++ = 'C'; 1262 *cp++ = 'H'; 1263 *cp++ = ei ? '2' : '1'; 1264 } 1265 *cp = '\0'; 1266 1267 if (utp != 0 && auibnc == 0) 1268 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1269 else if (utp == 0 && auibnc != 0) 1270 sc->sc_mediasw = &tlp_21040_auibnc_mediasw; 1271 } 1272 1273 static void 1274 tlp_pci_cogent_21040_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1275 { 1276 1277 strcpy(psc->sc_tulip.sc_name, "Cogent multi-port"); 1278 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1279 } 1280 1281 static void 1282 tlp_pci_accton_21040_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1283 { 1284 1285 strcpy(psc->sc_tulip.sc_name, "ACCTON EN1203"); 1286 } 1287 1288 static void tlp_pci_asante_21140_reset(struct tulip_softc *); 1289 1290 static void 1291 tlp_pci_asante_21140_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1292 { 1293 struct tulip_softc *sc = &psc->sc_tulip; 1294 1295 /* 1296 * Some Asante boards don't use the ISV SROM format. For 1297 * those that don't, we initialize the GPIO direction bits, 1298 * and provide our own reset hook, which resets the MII. 1299 * 1300 * All of these boards use SIO-attached-MII media. 1301 */ 1302 if (sc->sc_mediasw == &tlp_2114x_isv_mediasw) 1303 return; 1304 1305 strcpy(sc->sc_name, "Asante"); 1306 1307 sc->sc_gp_dir = 0xbf; 1308 sc->sc_reset = tlp_pci_asante_21140_reset; 1309 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1310 } 1311 1312 static void 1313 tlp_pci_e100_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1314 { 1315 struct tulip_softc *sc = &psc->sc_tulip; 1316 1317 if (sc->sc_mediasw == &tlp_2114x_isv_mediasw) 1318 return; 1319 1320 strcpy(sc->sc_name, "UMAX E100"); 1321 1322 sc->sc_gp_dir = 0xbf; 1323 sc->sc_reset = tlp_pci_asante_21140_reset; 1324 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1325 } 1326 1327 static void 1328 tlp_pci_asante_21140_reset(struct tulip_softc *sc) 1329 { 1330 1331 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1332 TULIP_WRITE(sc, CSR_GPP, 0x8); 1333 delay(100); 1334 TULIP_WRITE(sc, CSR_GPP, 0); 1335 } 1336 1337 static void tlp_pci_phobos_21140_reset(struct tulip_softc *); 1338 1339 static void 1340 tlp_pci_phobos_21140_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1341 { 1342 struct tulip_softc *sc = &psc->sc_tulip; 1343 1344 /* 1345 * Phobo boards just use MII-on_SIO. 1346 */ 1347 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1348 sc->sc_reset = tlp_pci_phobos_21140_reset; 1349 1350 /* 1351 * These boards appear solely on sgimips machines behind a special 1352 * GIO<->PCI ASIC and require the DBO and BLE bits to be set in CSR0. 1353 */ 1354 sc->sc_flags |= (TULIPF_BLE | TULIPF_DBO); 1355 } 1356 1357 static void 1358 tlp_pci_phobos_21140_reset(struct tulip_softc *sc) 1359 { 1360 1361 TULIP_WRITE(sc, CSR_GPP, 0x1fd); 1362 delay(10); 1363 TULIP_WRITE(sc, CSR_GPP, 0xfd); 1364 delay(10); 1365 TULIP_WRITE(sc, CSR_GPP, 0); 1366 } 1367 1368 /* 1369 * SMC 9332DST media switch. 1370 */ 1371 static void tlp_smc9332dst_tmsw_init(struct tulip_softc *); 1372 1373 static const struct tulip_mediasw tlp_smc9332dst_mediasw = { 1374 tlp_smc9332dst_tmsw_init, 1375 tlp_21140_gpio_get, 1376 tlp_21140_gpio_set 1377 }; 1378 1379 static void 1380 tlp_pci_smc_21140_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1381 { 1382 struct tulip_softc *sc = &psc->sc_tulip; 1383 1384 if (sc->sc_mediasw != NULL) { 1385 return; 1386 } 1387 strcpy(psc->sc_tulip.sc_name, "SMC 9332DST"); 1388 sc->sc_mediasw = &tlp_smc9332dst_mediasw; 1389 } 1390 1391 static void 1392 tlp_smc9332dst_tmsw_init(struct tulip_softc *sc) 1393 { 1394 struct tulip_21x4x_media *tm; 1395 const char *sep = ""; 1396 uint32_t reg; 1397 int i, cnt; 1398 1399 sc->sc_gp_dir = GPP_SMC9332DST_PINS; 1400 sc->sc_opmode = OPMODE_MBO | OPMODE_PS; 1401 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 1402 1403 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 1404 tlp_mediastatus); 1405 printf("%s: ", device_xname(sc->sc_dev)); 1406 1407 #define ADD(m, c) \ 1408 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \ 1409 tm->tm_opmode = (c); \ 1410 tm->tm_gpdata = GPP_SMC9332DST_INIT; \ 1411 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm) 1412 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 1413 1414 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, 0), OPMODE_TTM); 1415 PRINT("10baseT"); 1416 1417 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, 0), 1418 OPMODE_TTM | OPMODE_FD); 1419 PRINT("10baseT-FDX"); 1420 1421 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 1422 OPMODE_PS | OPMODE_PCS | OPMODE_SCR); 1423 PRINT("100baseTX"); 1424 1425 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, 0), 1426 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD); 1427 PRINT("100baseTX-FDX"); 1428 1429 #undef ADD 1430 #undef PRINT 1431 1432 printf("\n"); 1433 1434 tlp_reset(sc); 1435 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode | OPMODE_PCS | OPMODE_SCR); 1436 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1437 delay(10); 1438 TULIP_WRITE(sc, CSR_GPP, GPP_SMC9332DST_INIT); 1439 delay(200000); 1440 cnt = 0; 1441 for (i = 1000; i > 0; i--) { 1442 reg = TULIP_READ(sc, CSR_GPP); 1443 if ((~reg & (GPP_SMC9332DST_OK10 | 1444 GPP_SMC9332DST_OK100)) == 0) { 1445 if (cnt++ > 100) { 1446 break; 1447 } 1448 } else if ((reg & GPP_SMC9332DST_OK10) == 0) { 1449 break; 1450 } else { 1451 cnt = 0; 1452 } 1453 delay(1000); 1454 } 1455 if (cnt > 100) { 1456 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX); 1457 } else { 1458 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_10_T); 1459 } 1460 } 1461 1462 static void 1463 tlp_pci_vpc_21140_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1464 { 1465 struct tulip_softc *sc = &psc->sc_tulip; 1466 char *p1 = (char *) &sc->sc_srom[32]; 1467 char *p2 = &sc->sc_name[0]; 1468 1469 do { 1470 if ((unsigned char) *p1 & 0x80) 1471 *p2++ = ' '; 1472 else 1473 *p2++ = *p1; 1474 } while (*p1++); 1475 } 1476 1477 static void tlp_pci_cobalt_21142_reset(struct tulip_softc *); 1478 1479 static void 1480 tlp_pci_cobalt_21142_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1481 { 1482 struct tulip_softc *sc = &psc->sc_tulip; 1483 1484 /* 1485 * Cobalt Networks interfaces are just MII-on-SIO. 1486 */ 1487 sc->sc_reset = tlp_pci_cobalt_21142_reset; 1488 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1489 1490 /* 1491 * The Cobalt systems tend to fall back to store-and-forward 1492 * pretty quickly, so we select that from the beginning to 1493 * avoid initial timeouts. 1494 */ 1495 sc->sc_txthresh = TXTH_SF; 1496 } 1497 1498 static void 1499 tlp_pci_cobalt_21142_reset(struct tulip_softc *sc) 1500 { 1501 1502 /* 1503 * Reset PHY. 1504 */ 1505 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE | (1 << 16)); 1506 delay(10); 1507 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE); 1508 delay(10); 1509 } 1510 1511 static void 1512 tlp_pci_algor_21142_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1513 { 1514 struct tulip_softc *sc = &psc->sc_tulip; 1515 1516 /* 1517 * Algorithmics boards just have MII-on-SIO. 1518 * 1519 * XXX They also have AUI on the serial interface. 1520 * XXX Deal with this. 1521 */ 1522 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1523 } 1524 1525 /* 1526 * Cogent EM1x0 (aka. Adaptec ANA-6910) media switch. 1527 */ 1528 static void tlp_cogent_em1x0_tmsw_init(struct tulip_softc *); 1529 1530 static const struct tulip_mediasw tlp_cogent_em1x0_mediasw = { 1531 tlp_cogent_em1x0_tmsw_init, 1532 tlp_21140_gpio_get, 1533 tlp_21140_gpio_set 1534 }; 1535 1536 static void 1537 tlp_pci_adaptec_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1538 { 1539 struct tulip_softc *sc = &psc->sc_tulip; 1540 uint8_t *srom = sc->sc_srom, id0; 1541 uint16_t id1, id2; 1542 1543 if (sc->sc_mediasw == NULL) { 1544 id0 = srom[32]; 1545 switch (id0) { 1546 case 0x12: 1547 strcpy(psc->sc_tulip.sc_name, "Cogent EM100TX"); 1548 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1549 break; 1550 1551 case 0x15: 1552 strcpy(psc->sc_tulip.sc_name, "Cogent EM100FX"); 1553 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1554 break; 1555 1556 #if 0 1557 case XXX: 1558 strcpy(psc->sc_tulip.sc_name, "Cogent EM110TX"); 1559 sc->sc_mediasw = &tlp_cogent_em1x0_mediasw; 1560 break; 1561 #endif 1562 1563 default: 1564 printf("%s: unknown Cogent board ID 0x%02x\n", 1565 device_xname(sc->sc_dev), id0); 1566 } 1567 return; 1568 } 1569 1570 id1 = TULIP_ROM_GETW(srom, 0); 1571 id2 = TULIP_ROM_GETW(srom, 2); 1572 if (id1 != 0x1109) { 1573 goto unknown; 1574 } 1575 1576 switch (id2) { 1577 case 0x1900: 1578 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911"); 1579 break; 1580 1581 case 0x2400: 1582 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6944A"); 1583 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1584 break; 1585 1586 case 0x2b00: 1587 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6911A"); 1588 break; 1589 1590 case 0x3000: 1591 strcpy(psc->sc_tulip.sc_name, "Adaptec ANA-6922"); 1592 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1593 break; 1594 1595 default: 1596 unknown: 1597 printf("%s: unknown Adaptec/Cogent board ID 0x%04x/0x%04x\n", 1598 device_xname(sc->sc_dev), id1, id2); 1599 } 1600 } 1601 1602 static void 1603 tlp_cogent_em1x0_tmsw_init(struct tulip_softc *sc) 1604 { 1605 struct tulip_21x4x_media *tm; 1606 const char *sep = ""; 1607 1608 sc->sc_gp_dir = GPP_COGENT_EM1x0_PINS; 1609 sc->sc_opmode = OPMODE_MBO | OPMODE_PS; 1610 TULIP_WRITE(sc, CSR_OPMODE, sc->sc_opmode); 1611 1612 ifmedia_init(&sc->sc_mii.mii_media, 0, tlp_mediachange, 1613 tlp_mediastatus); 1614 printf("%s: ", device_xname(sc->sc_dev)); 1615 1616 #define ADD(m, c) \ 1617 tm = malloc(sizeof(*tm), M_DEVBUF, M_WAITOK|M_ZERO); \ 1618 tm->tm_opmode = (c); \ 1619 tm->tm_gpdata = GPP_COGENT_EM1x0_INIT; \ 1620 ifmedia_add(&sc->sc_mii.mii_media, (m), 0, tm) 1621 #define PRINT(str) printf("%s%s", sep, str); sep = ", " 1622 1623 if (sc->sc_srom[32] == 0x15) { 1624 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, 0, 0), 1625 OPMODE_PS | OPMODE_PCS); 1626 PRINT("100baseFX"); 1627 1628 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0), 1629 OPMODE_PS | OPMODE_PCS | OPMODE_FD); 1630 PRINT("100baseFX-FDX"); 1631 printf("\n"); 1632 1633 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_FX); 1634 } else { 1635 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, 0), 1636 OPMODE_PS | OPMODE_PCS | OPMODE_SCR); 1637 PRINT("100baseTX"); 1638 1639 ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_FX, IFM_FDX, 0), 1640 OPMODE_PS | OPMODE_PCS | OPMODE_SCR | OPMODE_FD); 1641 PRINT("100baseTX-FDX"); 1642 printf("\n"); 1643 1644 ifmedia_set(&sc->sc_mii.mii_media, IFM_ETHER|IFM_100_TX); 1645 } 1646 1647 #undef ADD 1648 #undef PRINT 1649 } 1650 1651 static void tlp_pci_netwinder_21142_reset(struct tulip_softc *); 1652 1653 static void 1654 tlp_pci_netwinder_21142_quirks(struct tulip_pci_softc *psc, 1655 const uint8_t *enaddr) 1656 { 1657 struct tulip_softc *sc = &psc->sc_tulip; 1658 1659 /* 1660 * Netwinders just use MII-on_SIO. 1661 */ 1662 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1663 sc->sc_reset = tlp_pci_netwinder_21142_reset; 1664 } 1665 1666 void 1667 tlp_pci_netwinder_21142_reset(struct tulip_softc *sc) 1668 { 1669 1670 /* 1671 * Reset the PHY. 1672 */ 1673 TULIP_WRITE(sc, CSR_SIAGEN, 0x0821 << 16); 1674 delay(10); 1675 TULIP_WRITE(sc, CSR_SIAGEN, 0x0000 << 16); 1676 delay(10); 1677 TULIP_WRITE(sc, CSR_SIAGEN, 0x0001 << 16); 1678 delay(10); 1679 } 1680 1681 static void tlp_pci_phobos_21142_reset(struct tulip_softc *); 1682 1683 static void 1684 tlp_pci_phobos_21142_quirks(struct tulip_pci_softc *psc, const uint8_t *enaddr) 1685 { 1686 struct tulip_softc *sc = &psc->sc_tulip; 1687 1688 /* 1689 * Phobo boards just use MII-on_SIO. 1690 */ 1691 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1692 sc->sc_reset = tlp_pci_phobos_21142_reset; 1693 1694 /* 1695 * These boards appear solely on sgimips machines behind a special 1696 * GIO<->PCI ASIC and require the DBO and BLE bits to be set in CSR0. 1697 */ 1698 sc->sc_flags |= (TULIPF_BLE | TULIPF_DBO); 1699 } 1700 1701 static void 1702 tlp_pci_phobos_21142_reset(struct tulip_softc *sc) 1703 { 1704 /* 1705 * Reset PHY. 1706 */ 1707 TULIP_WRITE(sc, CSR_SIAGEN, (0x880f << 16)); 1708 delay(10); 1709 TULIP_WRITE(sc, CSR_SIAGEN, (0x800f << 16)); 1710 delay(10); 1711 } 1712