1 /* $NetBSD: if_tlp_pci.c,v 1.40 2000/06/25 18:49:22 sommerfeld Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * PCI bus front-end for the Digital Semiconductor ``Tulip'' (21x4x) 42 * Ethernet controller family driver. 43 */ 44 45 #include "opt_inet.h" 46 #include "opt_ns.h" 47 #include "bpfilter.h" 48 #include "opt_tlp.h" 49 50 #include <sys/param.h> 51 #include <sys/systm.h> 52 #include <sys/mbuf.h> 53 #include <sys/malloc.h> 54 #include <sys/kernel.h> 55 #include <sys/socket.h> 56 #include <sys/ioctl.h> 57 #include <sys/errno.h> 58 #include <sys/device.h> 59 60 #include <machine/endian.h> 61 62 #include <net/if.h> 63 #include <net/if_dl.h> 64 #include <net/if_media.h> 65 #include <net/if_ether.h> 66 67 #if NBPFILTER > 0 68 #include <net/bpf.h> 69 #endif 70 71 #ifdef INET 72 #include <netinet/in.h> 73 #include <netinet/if_inarp.h> 74 #endif 75 76 #ifdef NS 77 #include <netns/ns.h> 78 #include <netns/ns_if.h> 79 #endif 80 81 #include <machine/bus.h> 82 #include <machine/intr.h> 83 84 #include <dev/mii/miivar.h> 85 #include <dev/mii/mii_bitbang.h> 86 87 #include <dev/ic/tulipreg.h> 88 #include <dev/ic/tulipvar.h> 89 90 #include <dev/pci/pcivar.h> 91 #include <dev/pci/pcireg.h> 92 #include <dev/pci/pcidevs.h> 93 94 /* 95 * PCI configuration space registers used by the Tulip. 96 */ 97 #define TULIP_PCI_IOBA 0x10 /* i/o mapped base */ 98 #define TULIP_PCI_MMBA 0x14 /* memory mapped base */ 99 #define TULIP_PCI_CFDA 0x40 /* configuration driver area */ 100 101 #define CFDA_SLEEP 0x80000000 /* sleep mode */ 102 #define CFDA_SNOOZE 0x40000000 /* snooze mode */ 103 104 struct tulip_pci_softc { 105 struct tulip_softc sc_tulip; /* real Tulip softc */ 106 107 /* PCI-specific goo. */ 108 void *sc_ih; /* interrupt handle */ 109 110 pci_chipset_tag_t sc_pc; /* our PCI chipset */ 111 pcitag_t sc_pcitag; /* our PCI tag */ 112 113 int sc_flags; /* flags; see below */ 114 115 LIST_HEAD(, tulip_pci_softc) sc_intrslaves; 116 LIST_ENTRY(tulip_pci_softc) sc_intrq; 117 118 /* Our {ROM,interrupt} master. */ 119 struct tulip_pci_softc *sc_master; 120 }; 121 122 /* sc_flags */ 123 #define TULIP_PCI_SHAREDINTR 0x01 /* interrupt is shared */ 124 #define TULIP_PCI_SLAVEINTR 0x02 /* interrupt is slave */ 125 #define TULIP_PCI_SHAREDROM 0x04 /* ROM is shared */ 126 #define TULIP_PCI_SLAVEROM 0x08 /* slave of shared ROM */ 127 128 int tlp_pci_match __P((struct device *, struct cfdata *, void *)); 129 void tlp_pci_attach __P((struct device *, struct device *, void *)); 130 131 struct cfattach tlp_pci_ca = { 132 sizeof(struct tulip_pci_softc), tlp_pci_match, tlp_pci_attach, 133 }; 134 135 const struct tulip_pci_product { 136 u_int32_t tpp_vendor; /* PCI vendor ID */ 137 u_int32_t tpp_product; /* PCI product ID */ 138 tulip_chip_t tpp_chip; /* base Tulip chip type */ 139 } tlp_pci_products[] = { 140 #ifdef TLP_MATCH_21040 141 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21040, 142 TULIP_CHIP_21040 }, 143 #endif 144 #ifdef TLP_MATCH_21041 145 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21041, 146 TULIP_CHIP_21041 }, 147 #endif 148 #ifdef TLP_MATCH_21140 149 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21140, 150 TULIP_CHIP_21140 }, 151 #endif 152 #ifdef TLP_MATCH_21142 153 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142, 154 TULIP_CHIP_21142 }, 155 #endif 156 157 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C168, 158 TULIP_CHIP_82C168 }, 159 160 /* 161 * Note: This is like a MX98725 with Wake-On-LAN and a 162 * 128-bit multicast hash table. 163 */ 164 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C115, 165 TULIP_CHIP_82C115 }, 166 167 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713, 168 TULIP_CHIP_MX98713 }, 169 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX987x5, 170 TULIP_CHIP_MX98715 }, 171 172 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100TX, 173 TULIP_CHIP_MX98713 }, 174 175 { PCI_VENDOR_WINBOND, PCI_PRODUCT_WINBOND_W89C840F, 176 TULIP_CHIP_WB89C840F }, 177 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100ATX, 178 TULIP_CHIP_WB89C840F }, 179 180 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102, 181 TULIP_CHIP_DM9102 }, 182 183 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981, 184 TULIP_CHIP_AL981 }, 185 186 #if 0 187 { PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A, 188 TULIP_CHIP_AX88140 }, 189 #endif 190 191 { 0, 0, 192 TULIP_CHIP_INVALID }, 193 }; 194 195 struct tlp_pci_quirks { 196 void (*tpq_func) __P((struct tulip_pci_softc *, 197 const u_int8_t *)); 198 u_int8_t tpq_oui[3]; 199 }; 200 201 void tlp_pci_dec_quirks __P((struct tulip_pci_softc *, 202 const u_int8_t *)); 203 204 void tlp_pci_znyx_21040_quirks __P((struct tulip_pci_softc *, 205 const u_int8_t *)); 206 void tlp_pci_smc_21040_quirks __P((struct tulip_pci_softc *, 207 const u_int8_t *)); 208 void tlp_pci_cogent_21040_quirks __P((struct tulip_pci_softc *, 209 const u_int8_t *)); 210 void tlp_pci_accton_21040_quirks __P((struct tulip_pci_softc *, 211 const u_int8_t *)); 212 213 void tlp_pci_cobalt_21142_quirks __P((struct tulip_pci_softc *, 214 const u_int8_t *)); 215 216 const struct tlp_pci_quirks tlp_pci_21040_quirks[] = { 217 { tlp_pci_znyx_21040_quirks, { 0x00, 0xc0, 0x95 } }, 218 { tlp_pci_smc_21040_quirks, { 0x00, 0x00, 0xc0 } }, 219 { tlp_pci_cogent_21040_quirks, { 0x00, 0x00, 0x92 } }, 220 { tlp_pci_accton_21040_quirks, { 0x00, 0x00, 0xe8 } }, 221 { NULL, { 0, 0, 0 } } 222 }; 223 224 const struct tlp_pci_quirks tlp_pci_21041_quirks[] = { 225 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 226 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 227 { NULL, { 0, 0, 0 } } 228 }; 229 230 void tlp_pci_asante_21140_quirks __P((struct tulip_pci_softc *, 231 const u_int8_t *)); 232 233 const struct tlp_pci_quirks tlp_pci_21140_quirks[] = { 234 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 235 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 236 { tlp_pci_asante_21140_quirks, { 0x00, 0x00, 0x94 } }, 237 { NULL, { 0, 0, 0 } } 238 }; 239 240 const struct tlp_pci_quirks tlp_pci_21142_quirks[] = { 241 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 242 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 243 { tlp_pci_cobalt_21142_quirks, { 0x00, 0x10, 0xe0 } }, 244 { NULL, { 0, 0, 0 } } 245 }; 246 247 int tlp_pci_shared_intr __P((void *)); 248 249 const struct tulip_pci_product *tlp_pci_lookup 250 __P((const struct pci_attach_args *)); 251 void tlp_pci_get_quirks __P((struct tulip_pci_softc *, const u_int8_t *, 252 const struct tlp_pci_quirks *)); 253 void tlp_pci_check_slaved __P((struct tulip_pci_softc *, int, int)); 254 255 const struct tulip_pci_product * 256 tlp_pci_lookup(pa) 257 const struct pci_attach_args *pa; 258 { 259 const struct tulip_pci_product *tpp; 260 261 for (tpp = tlp_pci_products; 262 tlp_chip_names[tpp->tpp_chip] != NULL; 263 tpp++) { 264 if (PCI_VENDOR(pa->pa_id) == tpp->tpp_vendor && 265 PCI_PRODUCT(pa->pa_id) == tpp->tpp_product) 266 return (tpp); 267 } 268 return (NULL); 269 } 270 271 void 272 tlp_pci_get_quirks(psc, enaddr, tpq) 273 struct tulip_pci_softc *psc; 274 const u_int8_t *enaddr; 275 const struct tlp_pci_quirks *tpq; 276 { 277 278 for (; tpq->tpq_func != NULL; tpq++) { 279 if (tpq->tpq_oui[0] == enaddr[0] && 280 tpq->tpq_oui[1] == enaddr[1] && 281 tpq->tpq_oui[2] == enaddr[2]) { 282 (*tpq->tpq_func)(psc, enaddr); 283 return; 284 } 285 } 286 } 287 288 void 289 tlp_pci_check_slaved(psc, shared, slaved) 290 struct tulip_pci_softc *psc; 291 int shared, slaved; 292 { 293 extern struct cfdriver tlp_cd; 294 struct tulip_pci_softc *cur, *best = NULL; 295 struct tulip_softc *sc = &psc->sc_tulip; 296 int i; 297 298 /* 299 * First of all, find the lowest pcidev numbered device on our 300 * bus marked as shared. That should be our master. 301 */ 302 for (i = 0; i < tlp_cd.cd_ndevs; i++) { 303 if ((cur = tlp_cd.cd_devs[i]) == NULL) 304 continue; 305 if (cur->sc_tulip.sc_dev.dv_parent != sc->sc_dev.dv_parent) 306 continue; 307 if ((cur->sc_flags & shared) == 0) 308 continue; 309 if (cur == psc) 310 continue; 311 if (best == NULL || 312 best->sc_tulip.sc_devno > cur->sc_tulip.sc_devno) 313 best = cur; 314 } 315 316 if (best != NULL) { 317 psc->sc_master = best; 318 psc->sc_flags |= (shared | slaved); 319 } 320 } 321 322 int 323 tlp_pci_match(parent, match, aux) 324 struct device *parent; 325 struct cfdata *match; 326 void *aux; 327 { 328 struct pci_attach_args *pa = aux; 329 330 if (tlp_pci_lookup(pa) != NULL) 331 return (10); /* beat if_de.c */ 332 333 return (0); 334 } 335 336 void 337 tlp_pci_attach(parent, self, aux) 338 struct device *parent, *self; 339 void *aux; 340 { 341 struct tulip_pci_softc *psc = (void *) self; 342 struct tulip_softc *sc = &psc->sc_tulip; 343 struct pci_attach_args *pa = aux; 344 pci_chipset_tag_t pc = pa->pa_pc; 345 pci_intr_handle_t ih; 346 const char *intrstr = NULL; 347 bus_space_tag_t iot, memt; 348 bus_space_handle_t ioh, memh; 349 int ioh_valid, memh_valid, i, j; 350 const struct tulip_pci_product *tpp; 351 u_int8_t enaddr[ETHER_ADDR_LEN]; 352 u_int32_t val; 353 pcireg_t reg; 354 int pmreg; 355 356 sc->sc_devno = pa->pa_device; 357 psc->sc_pc = pa->pa_pc; 358 psc->sc_pcitag = pa->pa_tag; 359 360 LIST_INIT(&psc->sc_intrslaves); 361 362 tpp = tlp_pci_lookup(pa); 363 if (tpp == NULL) { 364 printf("\n"); 365 panic("tlp_pci_attach: impossible"); 366 } 367 sc->sc_chip = tpp->tpp_chip; 368 369 /* 370 * By default, Tulip registers are 8 bytes long (4 bytes 371 * followed by a 4 byte pad). 372 */ 373 sc->sc_regshift = 3; 374 375 /* 376 * No power management hooks. 377 * XXX Maybe we should add some! 378 */ 379 sc->sc_flags |= TULIPF_ENABLED; 380 381 /* 382 * Get revision info, and set some chip-specific variables. 383 */ 384 sc->sc_rev = PCI_REVISION(pa->pa_class); 385 switch (sc->sc_chip) { 386 case TULIP_CHIP_21140: 387 if (sc->sc_rev >= 0x20) 388 sc->sc_chip = TULIP_CHIP_21140A; 389 break; 390 391 case TULIP_CHIP_21142: 392 if (sc->sc_rev >= 0x20) 393 sc->sc_chip = TULIP_CHIP_21143; 394 break; 395 396 case TULIP_CHIP_82C168: 397 if (sc->sc_rev >= 0x20) 398 sc->sc_chip = TULIP_CHIP_82C169; 399 break; 400 401 case TULIP_CHIP_MX98713: 402 if (sc->sc_rev >= 0x10) 403 sc->sc_chip = TULIP_CHIP_MX98713A; 404 break; 405 406 case TULIP_CHIP_MX98715: 407 if (sc->sc_rev >= 0x20) 408 sc->sc_chip = TULIP_CHIP_MX98715A; 409 if (sc->sc_rev >= 0x30) 410 sc->sc_chip = TULIP_CHIP_MX98725; 411 break; 412 413 case TULIP_CHIP_WB89C840F: 414 sc->sc_regshift = 2; 415 break; 416 417 case TULIP_CHIP_AX88140: 418 if (sc->sc_rev >= 0x10) 419 sc->sc_chip = TULIP_CHIP_AX88141; 420 break; 421 422 case TULIP_CHIP_DM9102: 423 if (sc->sc_rev >= 0x30) 424 sc->sc_chip = TULIP_CHIP_DM9102A; 425 break; 426 427 default: 428 /* Nothing. */ 429 } 430 431 printf(": %s Ethernet, pass %d.%d\n", 432 tlp_chip_names[sc->sc_chip], 433 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf); 434 435 switch (sc->sc_chip) { 436 case TULIP_CHIP_21040: 437 if (sc->sc_rev < 0x20) { 438 printf("%s: 21040 must be at least pass 2.0\n", 439 sc->sc_dev.dv_xname); 440 return; 441 } 442 break; 443 444 case TULIP_CHIP_21140: 445 if (sc->sc_rev < 0x11) { 446 printf("%s: 21140 must be at least pass 1.1\n", 447 sc->sc_dev.dv_xname); 448 return; 449 } 450 break; 451 452 default: 453 /* Nothing. */ 454 } 455 456 /* 457 * Check to see if the device is in power-save mode, and 458 * being it out if necessary. 459 */ 460 switch (sc->sc_chip) { 461 case TULIP_CHIP_21140: 462 case TULIP_CHIP_21140A: 463 case TULIP_CHIP_21142: 464 case TULIP_CHIP_21143: 465 case TULIP_CHIP_MX98713A: 466 case TULIP_CHIP_MX98715: 467 case TULIP_CHIP_MX98715A: 468 case TULIP_CHIP_MX98725: 469 case TULIP_CHIP_DM9102: 470 case TULIP_CHIP_DM9102A: 471 /* 472 * Clear the "sleep mode" bit in the CFDA register. 473 */ 474 reg = pci_conf_read(pc, pa->pa_tag, TULIP_PCI_CFDA); 475 if (reg & (CFDA_SLEEP|CFDA_SNOOZE)) 476 pci_conf_write(pc, pa->pa_tag, TULIP_PCI_CFDA, 477 reg & ~(CFDA_SLEEP|CFDA_SNOOZE)); 478 break; 479 480 default: 481 /* Nothing. */ 482 } 483 484 if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PWRMGMT, &pmreg, 0)) { 485 reg = pci_conf_read(pc, pa->pa_tag, pmreg + 4) & 0x3; 486 if (reg == 3) { 487 /* 488 * The card has lost all configuration data in 489 * this state, so punt. 490 */ 491 printf("%s: unable to wake up from power state D3\n", 492 sc->sc_dev.dv_xname); 493 return; 494 } 495 if (reg != 0) { 496 printf("%s: waking up from power state D%d\n", 497 sc->sc_dev.dv_xname, reg); 498 pci_conf_write(pc, pa->pa_tag, pmreg + 4, 0); 499 } 500 } 501 502 /* 503 * Map the device. 504 */ 505 ioh_valid = (pci_mapreg_map(pa, TULIP_PCI_IOBA, 506 PCI_MAPREG_TYPE_IO, 0, 507 &iot, &ioh, NULL, NULL) == 0); 508 memh_valid = (pci_mapreg_map(pa, TULIP_PCI_MMBA, 509 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 510 &memt, &memh, NULL, NULL) == 0); 511 512 if (memh_valid) { 513 sc->sc_st = memt; 514 sc->sc_sh = memh; 515 } else if (ioh_valid) { 516 sc->sc_st = iot; 517 sc->sc_sh = ioh; 518 } else { 519 printf(": unable to map device registers\n"); 520 return; 521 } 522 523 sc->sc_dmat = pa->pa_dmat; 524 525 /* 526 * Make sure bus mastering is enabled. 527 */ 528 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 529 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 530 PCI_COMMAND_MASTER_ENABLE); 531 532 /* 533 * Get the cacheline size. 534 */ 535 sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag, 536 PCI_BHLC_REG)); 537 538 /* 539 * Get PCI data moving command info. 540 */ 541 if (pa->pa_flags & PCI_FLAGS_MRL_OKAY) 542 sc->sc_flags |= TULIPF_MRL; 543 if (pa->pa_flags & PCI_FLAGS_MRM_OKAY) 544 sc->sc_flags |= TULIPF_MRM; 545 if (pa->pa_flags & PCI_FLAGS_MWI_OKAY) 546 sc->sc_flags |= TULIPF_MWI; 547 548 /* 549 * Read the contents of the Ethernet Address ROM/SROM. 550 */ 551 switch (sc->sc_chip) { 552 case TULIP_CHIP_21040: 553 sc->sc_srom_addrbits = 6; 554 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, M_NOWAIT); 555 TULIP_WRITE(sc, CSR_MIIROM, MIIROM_SROMCS); 556 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 557 for (j = 0; j < 10000; j++) { 558 val = TULIP_READ(sc, CSR_MIIROM); 559 if ((val & MIIROM_DN) == 0) 560 break; 561 } 562 sc->sc_srom[i] = val & MIIROM_DATA; 563 } 564 break; 565 566 case TULIP_CHIP_82C168: 567 case TULIP_CHIP_82C169: 568 { 569 sc->sc_srom_addrbits = 2; 570 sc->sc_srom = malloc(TULIP_ROM_SIZE(2), M_DEVBUF, M_NOWAIT); 571 572 /* 573 * The Lite-On PNIC stores the Ethernet address in 574 * the first 3 words of the EEPROM. EEPROM access 575 * is not like the other Tulip chips. 576 */ 577 for (i = 0; i < 6; i += 2) { 578 TULIP_WRITE(sc, CSR_PNIC_SROMCTL, 579 PNIC_SROMCTL_READ | (i >> 1)); 580 for (j = 0; j < 500; j++) { 581 delay(2); 582 val = TULIP_READ(sc, CSR_MIIROM); 583 if ((val & PNIC_MIIROM_BUSY) == 0) 584 break; 585 } 586 if (val & PNIC_MIIROM_BUSY) { 587 printf("%s: EEPROM timed out\n", 588 sc->sc_dev.dv_xname); 589 return; 590 } 591 val &= PNIC_MIIROM_DATA; 592 sc->sc_srom[i] = val >> 8; 593 sc->sc_srom[i + 1] = val & 0xff; 594 } 595 break; 596 } 597 598 default: 599 if (tlp_read_srom(sc) == 0) 600 goto cant_cope; 601 break; 602 } 603 604 /* 605 * Deal with chip/board quirks. This includes setting up 606 * the mediasw, and extracting the Ethernet address from 607 * the rombuf. 608 */ 609 switch (sc->sc_chip) { 610 case TULIP_CHIP_21040: 611 /* Check for a slaved ROM on a multi-port board. */ 612 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDROM, 613 TULIP_PCI_SLAVEROM); 614 if (psc->sc_flags & TULIP_PCI_SLAVEROM) 615 memcpy(sc->sc_srom, psc->sc_master->sc_tulip.sc_srom, 616 sizeof(sc->sc_srom)); 617 618 /* 619 * Parse the Ethernet Address ROM. 620 */ 621 if (tlp_parse_old_srom(sc, enaddr) == 0) 622 goto cant_cope; 623 624 /* 625 * If we have a slaved ROM, adjust the Ethernet address. 626 */ 627 if (psc->sc_flags & TULIP_PCI_SLAVEROM) 628 enaddr[5] += 629 sc->sc_devno - psc->sc_master->sc_tulip.sc_devno; 630 631 /* 632 * All 21040 boards start out with the same 633 * media switch. 634 */ 635 sc->sc_mediasw = &tlp_21040_mediasw; 636 637 /* 638 * Deal with any quirks this board might have. 639 */ 640 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21040_quirks); 641 break; 642 643 case TULIP_CHIP_21041: 644 /* Check for a slaved ROM on a multi-port board. */ 645 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDROM, 646 TULIP_PCI_SLAVEROM); 647 if (psc->sc_flags & TULIP_PCI_SLAVEROM) 648 memcpy(sc->sc_srom, psc->sc_master->sc_tulip.sc_srom, 649 sizeof(sc->sc_srom)); 650 651 /* Check for new format SROM. */ 652 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 653 /* 654 * Not an ISV SROM; try the old DEC Ethernet Address 655 * ROM format. 656 */ 657 if (tlp_parse_old_srom(sc, enaddr) == 0) 658 goto cant_cope; 659 } 660 661 /* 662 * All 21041 boards use the same media switch; they all 663 * work basically the same! Yippee! 664 */ 665 sc->sc_mediasw = &tlp_21041_mediasw; 666 667 /* 668 * Deal with any quirks this board might have. 669 */ 670 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21041_quirks); 671 break; 672 673 case TULIP_CHIP_21140: 674 case TULIP_CHIP_21140A: 675 /* Check for new format SROM. */ 676 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 677 /* 678 * Not an ISV SROM; try the old DEC Ethernet Address 679 * ROM format. 680 */ 681 if (tlp_parse_old_srom(sc, enaddr) == 0) 682 goto cant_cope; 683 } else { 684 /* 685 * We start out with the 2114x ISV media switch. 686 * When we search for quirks, we may change to 687 * a different switch. 688 */ 689 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 690 } 691 692 /* 693 * Deal with any quirks this board might have. 694 */ 695 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21140_quirks); 696 697 /* 698 * Bail out now if we can't deal with this board. 699 */ 700 if (sc->sc_mediasw == NULL) 701 goto cant_cope; 702 break; 703 704 case TULIP_CHIP_21142: 705 case TULIP_CHIP_21143: 706 /* Check for new format SROM. */ 707 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 708 /* 709 * Not an ISV SROM; try the old DEC Ethernet Address 710 * ROM format. 711 */ 712 if (tlp_parse_old_srom(sc, enaddr) == 0) 713 goto cant_cope; 714 } else { 715 /* 716 * We start out with the 2114x ISV media switch. 717 * When we search for quirks, we may change to 718 * a different switch. 719 */ 720 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 721 } 722 723 /* 724 * Deal with any quirks this board might have. 725 */ 726 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21142_quirks); 727 728 /* 729 * Bail out now if we can't deal with this board. 730 */ 731 if (sc->sc_mediasw == NULL) 732 goto cant_cope; 733 break; 734 735 case TULIP_CHIP_82C168: 736 case TULIP_CHIP_82C169: 737 /* 738 * Lite-On PNIC's Ethernet address is the first 6 739 * bytes of its EEPROM. 740 */ 741 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 742 743 /* 744 * Lite-On PNICs always use the same mediasw; we 745 * select MII vs. internal NWAY automatically. 746 */ 747 sc->sc_mediasw = &tlp_pnic_mediasw; 748 break; 749 750 case TULIP_CHIP_MX98713: 751 /* 752 * The Macronix MX98713 has an MII and GPIO, but no 753 * internal Nway block. This chip is basically a 754 * perfect 21140A clone, with the exception of the 755 * a magic register frobbing in order to make the 756 * interface function. 757 */ 758 if (tlp_isv_srom_enaddr(sc, enaddr)) { 759 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 760 break; 761 } 762 /* FALLTHROUGH */ 763 764 case TULIP_CHIP_82C115: 765 /* 766 * Yippee! The Lite-On 82C115 is a clone of 767 * the MX98725 (the data sheet even says `MXIC' 768 * on it)! Imagine that, a clone of a clone. 769 * 770 * The differences are really minimal: 771 * 772 * - Wake-On-LAN support 773 * - 128-bit multicast hash table, rather than 774 * the standard 512-bit hash table 775 */ 776 /* FALLTHROUGH */ 777 778 case TULIP_CHIP_MX98713A: 779 case TULIP_CHIP_MX98715A: 780 case TULIP_CHIP_MX98725: 781 /* 782 * The MX98713A has an MII as well as an internal Nway block, 783 * but no GPIO. The MX98715 and MX98725 have an internal 784 * Nway block only. 785 * 786 * The internal Nway block, unlike the Lite-On PNIC's, does 787 * just that - performs Nway. Once autonegotiation completes, 788 * we must program the GPR media information into the chip. 789 * 790 * The byte offset of the Ethernet address is stored at 791 * offset 0x70. 792 */ 793 memcpy(enaddr, &sc->sc_srom[sc->sc_srom[0x70]], ETHER_ADDR_LEN); 794 sc->sc_mediasw = &tlp_pmac_mediasw; 795 break; 796 797 case TULIP_CHIP_WB89C840F: 798 /* 799 * Winbond 89C840F's Ethernet address is the first 800 * 6 bytes of its EEPROM. 801 */ 802 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 803 804 /* 805 * Winbond 89C840F has an MII attached to the SIO. 806 */ 807 sc->sc_mediasw = &tlp_sio_mii_mediasw; 808 break; 809 810 case TULIP_CHIP_AL981: 811 /* 812 * The ADMtek AL981's Ethernet address is located 813 * at offset 8 of its EEPROM. 814 */ 815 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 816 817 /* 818 * ADMtek AL981 has a built-in PHY accessed through 819 * special registers. 820 */ 821 sc->sc_mediasw = &tlp_al981_mediasw; 822 break; 823 824 case TULIP_CHIP_DM9102: 825 case TULIP_CHIP_DM9102A: 826 /* 827 * Some boards with the Davicom chip have an ISV 828 * SROM (mostly DM9102A boards -- trying to describe 829 * the HomePNA PHY, probably) although the data in 830 * them is generally wrong. Check for ISV format 831 * and grab the Ethernet address that way, and if 832 * that fails, fall back on grabbing it from an 833 * observed offset of 20 (which is where it would 834 * be in an ISV SROM anyhow, tho ISV can cope with 835 * multi-port boards). 836 */ 837 if (tlp_isv_srom_enaddr(sc, enaddr)) 838 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN); 839 840 /* 841 * Davicom chips all have an internal MII interface 842 * and a built-in PHY. DM9102A also has a an external 843 * MII interface, usually with a HomePNA PHY attached 844 * to it. 845 */ 846 sc->sc_mediasw = &tlp_dm9102_mediasw; 847 break; 848 849 default: 850 cant_cope: 851 printf("%s: sorry, unable to handle your board\n", 852 sc->sc_dev.dv_xname); 853 return; 854 } 855 856 /* 857 * Handle shared interrupts. 858 */ 859 if (psc->sc_flags & TULIP_PCI_SHAREDINTR) { 860 if (psc->sc_master) 861 psc->sc_flags |= TULIP_PCI_SLAVEINTR; 862 else { 863 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDINTR, 864 TULIP_PCI_SLAVEINTR); 865 if (psc->sc_master == NULL) 866 psc->sc_master = psc; 867 } 868 LIST_INSERT_HEAD(&psc->sc_master->sc_intrslaves, 869 psc, sc_intrq); 870 } 871 872 if (psc->sc_flags & TULIP_PCI_SLAVEINTR) { 873 printf("%s: sharing interrupt with %s\n", 874 sc->sc_dev.dv_xname, 875 psc->sc_master->sc_tulip.sc_dev.dv_xname); 876 } else { 877 /* 878 * Map and establish our interrupt. 879 */ 880 if (pci_intr_map(pc, pa->pa_intrtag, pa->pa_intrpin, 881 pa->pa_intrline, &ih)) { 882 printf("%s: unable to map interrupt\n", 883 sc->sc_dev.dv_xname); 884 return; 885 } 886 intrstr = pci_intr_string(pc, ih); 887 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, 888 (psc->sc_flags & TULIP_PCI_SHAREDINTR) ? 889 tlp_pci_shared_intr : tlp_intr, sc); 890 if (psc->sc_ih == NULL) { 891 printf("%s: unable to establish interrupt", 892 sc->sc_dev.dv_xname); 893 if (intrstr != NULL) 894 printf(" at %s", intrstr); 895 printf("\n"); 896 return; 897 } 898 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, 899 intrstr); 900 } 901 902 /* 903 * Finish off the attach. 904 */ 905 tlp_attach(sc, enaddr); 906 } 907 908 int 909 tlp_pci_shared_intr(arg) 910 void *arg; 911 { 912 struct tulip_pci_softc *master = arg, *slave; 913 int rv = 0; 914 915 for (slave = LIST_FIRST(&master->sc_intrslaves); 916 slave != NULL; 917 slave = LIST_NEXT(slave, sc_intrq)) 918 rv |= tlp_intr(&slave->sc_tulip); 919 920 return (rv); 921 } 922 923 void 924 tlp_pci_dec_quirks(psc, enaddr) 925 struct tulip_pci_softc *psc; 926 const u_int8_t *enaddr; 927 { 928 struct tulip_softc *sc = &psc->sc_tulip; 929 930 /* 931 * This isn't really a quirk-gathering device, really. We 932 * just want to get the spiffy DEC board name from the SROM. 933 */ 934 strcpy(sc->sc_name, "DEC "); 935 936 if (memcmp(&sc->sc_srom[29], "DE500", 5) == 0 || 937 memcmp(&sc->sc_srom[29], "DE450", 5) == 0) 938 memcpy(&sc->sc_name[4], &sc->sc_srom[29], 8); 939 } 940 941 void 942 tlp_pci_znyx_21040_quirks(psc, enaddr) 943 struct tulip_pci_softc *psc; 944 const u_int8_t *enaddr; 945 { 946 struct tulip_softc *sc = &psc->sc_tulip; 947 u_int16_t id = 0; 948 949 /* 950 * If we have a slaved ROM, just copy the bits from the master. 951 * This is in case we fail the ROM ID check (older boards) and 952 * need to fall back on Ethernet address model checking; that 953 * will fail for slave chips. 954 */ 955 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 956 strcpy(sc->sc_name, psc->sc_master->sc_tulip.sc_name); 957 sc->sc_mediasw = psc->sc_master->sc_tulip.sc_mediasw; 958 psc->sc_flags |= 959 psc->sc_master->sc_flags & TULIP_PCI_SHAREDINTR; 960 return; 961 } 962 963 if (sc->sc_srom[32] == 0x4a && sc->sc_srom[33] == 0x52) { 964 id = sc->sc_srom[37] | (sc->sc_srom[36] << 8); 965 switch (id) { 966 zx312: 967 case 0x0602: /* ZX312 */ 968 strcpy(sc->sc_name, "ZNYX ZX312"); 969 return; 970 971 case 0x0622: /* ZX312T */ 972 strcpy(sc->sc_name, "ZNYX ZX312T"); 973 sc->sc_mediasw = &tlp_21040_tp_mediasw; 974 return; 975 976 zx314_inta: 977 case 0x0701: /* ZX314 INTA */ 978 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 979 /* FALLTHROUGH */ 980 case 0x0711: /* ZX314 */ 981 strcpy(sc->sc_name, "ZNYX ZX314"); 982 psc->sc_flags |= TULIP_PCI_SHAREDROM; 983 sc->sc_mediasw = &tlp_21040_tp_mediasw; 984 return; 985 986 zx315_inta: 987 case 0x0801: /* ZX315 INTA */ 988 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 989 /* FALLTHROUGH */ 990 case 0x0811: /* ZX315 */ 991 strcpy(sc->sc_name, "ZNYX ZX315"); 992 psc->sc_flags |= TULIP_PCI_SHAREDROM; 993 return; 994 995 default: 996 id = 0; 997 } 998 } 999 1000 /* 1001 * Deal with boards that have broken ROMs. 1002 */ 1003 if (id == 0) { 1004 if ((enaddr[3] & ~3) == 0xf0 && (enaddr[5] & 3) == 0x00) 1005 goto zx314_inta; 1006 if ((enaddr[3] & ~3) == 0xf4 && (enaddr[5] & 1) == 0x00) 1007 goto zx315_inta; 1008 if ((enaddr[3] & ~3) == 0xec) 1009 goto zx312; 1010 } 1011 1012 strcpy(sc->sc_name, "ZNYX ZX31x"); 1013 } 1014 1015 void 1016 tlp_pci_smc_21040_quirks(psc, enaddr) 1017 struct tulip_pci_softc *psc; 1018 const u_int8_t *enaddr; 1019 { 1020 struct tulip_softc *sc = &psc->sc_tulip; 1021 u_int16_t id1, id2, ei; 1022 int auibnc = 0, utp = 0; 1023 char *cp; 1024 1025 id1 = sc->sc_srom[0x60] | (sc->sc_srom[0x61] << 8); 1026 id2 = sc->sc_srom[0x62] | (sc->sc_srom[0x63] << 8); 1027 ei = sc->sc_srom[0x66] | (sc->sc_srom[0x67] << 8); 1028 1029 strcpy(sc->sc_name, "SMC 8432"); 1030 cp = &sc->sc_name[8]; 1031 1032 if ((id1 & 1) == 0) { 1033 *cp++ = 'B'; 1034 auibnc = 1; 1035 } 1036 if ((id1 & 0xff) > 0x32) { 1037 *cp++ = 'T'; 1038 utp = 1; 1039 } 1040 if ((id1 & 0x4000) == 0) { 1041 *cp++ = 'A'; 1042 auibnc = 1; 1043 } 1044 if (id2 == 0x15) { 1045 sc->sc_name[7] = '4'; 1046 *cp++ = '-'; 1047 *cp++ = 'C'; 1048 *cp++ = 'H'; 1049 *cp++ = ei ? '2' : '1'; 1050 } 1051 *cp = '\0'; 1052 1053 if (utp != 0 && auibnc == 0) 1054 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1055 else if (utp == 0 && auibnc != 0) 1056 sc->sc_mediasw = &tlp_21040_auibnc_mediasw; 1057 } 1058 1059 void 1060 tlp_pci_cogent_21040_quirks(psc, enaddr) 1061 struct tulip_pci_softc *psc; 1062 const u_int8_t *enaddr; 1063 { 1064 1065 strcpy(psc->sc_tulip.sc_name, "Cogent multi-port"); 1066 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1067 } 1068 1069 void 1070 tlp_pci_accton_21040_quirks(psc, enaddr) 1071 struct tulip_pci_softc *psc; 1072 const u_int8_t *enaddr; 1073 { 1074 1075 strcpy(psc->sc_tulip.sc_name, "ACCTON EN1203"); 1076 } 1077 1078 void tlp_pci_asante_21140_reset __P((struct tulip_softc *)); 1079 1080 void 1081 tlp_pci_asante_21140_quirks(psc, enaddr) 1082 struct tulip_pci_softc *psc; 1083 const u_int8_t *enaddr; 1084 { 1085 struct tulip_softc *sc = &psc->sc_tulip; 1086 1087 /* 1088 * Some Asante boards don't use the ISV SROM format. For 1089 * those that don't, we initialize the GPIO direction bits, 1090 * and provide our own reset hook, which resets the MII. 1091 * 1092 * All of these boards use SIO-attached-MII media. 1093 */ 1094 if (sc->sc_mediasw == &tlp_2114x_isv_mediasw) 1095 return; 1096 1097 strcpy(sc->sc_name, "Asante"); 1098 1099 sc->sc_gp_dir = 0xbf; 1100 sc->sc_reset = tlp_pci_asante_21140_reset; 1101 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1102 } 1103 1104 void 1105 tlp_pci_asante_21140_reset(sc) 1106 struct tulip_softc *sc; 1107 { 1108 1109 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1110 TULIP_WRITE(sc, CSR_GPP, 0x8); 1111 delay(100); 1112 TULIP_WRITE(sc, CSR_GPP, 0); 1113 } 1114 1115 void tlp_pci_cobalt_21142_reset __P((struct tulip_softc *)); 1116 1117 void 1118 tlp_pci_cobalt_21142_quirks(psc, enaddr) 1119 struct tulip_pci_softc *psc; 1120 const u_int8_t *enaddr; 1121 { 1122 struct tulip_softc *sc = &psc->sc_tulip; 1123 1124 /* 1125 * Cobalt Networks interfaces are just MII-on-SIO. 1126 */ 1127 sc->sc_reset = tlp_pci_cobalt_21142_reset; 1128 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1129 1130 /* 1131 * The Cobalt systems tend to fall back to store-and-forward 1132 * pretty quickly, so we select that from the beginning to 1133 * avoid initial timeouts. 1134 */ 1135 sc->sc_txthresh = TXTH_SF; 1136 } 1137 1138 void 1139 tlp_pci_cobalt_21142_reset(sc) 1140 struct tulip_softc *sc; 1141 { 1142 /* 1143 * Reset PHY. 1144 */ 1145 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE | (1 << 16)); 1146 delay(10); 1147 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE); 1148 delay(10); 1149 } 1150