1 /* $NetBSD: if_tlp_pci.c,v 1.39 2000/05/27 19:42:06 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * PCI bus front-end for the Digital Semiconductor ``Tulip'' (21x4x) 42 * Ethernet controller family driver. 43 */ 44 45 #include "opt_inet.h" 46 #include "opt_ns.h" 47 #include "bpfilter.h" 48 49 #include <sys/param.h> 50 #include <sys/systm.h> 51 #include <sys/mbuf.h> 52 #include <sys/malloc.h> 53 #include <sys/kernel.h> 54 #include <sys/socket.h> 55 #include <sys/ioctl.h> 56 #include <sys/errno.h> 57 #include <sys/device.h> 58 59 #include <machine/endian.h> 60 61 #include <net/if.h> 62 #include <net/if_dl.h> 63 #include <net/if_media.h> 64 #include <net/if_ether.h> 65 66 #if NBPFILTER > 0 67 #include <net/bpf.h> 68 #endif 69 70 #ifdef INET 71 #include <netinet/in.h> 72 #include <netinet/if_inarp.h> 73 #endif 74 75 #ifdef NS 76 #include <netns/ns.h> 77 #include <netns/ns_if.h> 78 #endif 79 80 #include <machine/bus.h> 81 #include <machine/intr.h> 82 83 #include <dev/mii/miivar.h> 84 #include <dev/mii/mii_bitbang.h> 85 86 #include <dev/ic/tulipreg.h> 87 #include <dev/ic/tulipvar.h> 88 89 #include <dev/pci/pcivar.h> 90 #include <dev/pci/pcireg.h> 91 #include <dev/pci/pcidevs.h> 92 93 /* 94 * PCI configuration space registers used by the Tulip. 95 */ 96 #define TULIP_PCI_IOBA 0x10 /* i/o mapped base */ 97 #define TULIP_PCI_MMBA 0x14 /* memory mapped base */ 98 #define TULIP_PCI_CFDA 0x40 /* configuration driver area */ 99 100 #define CFDA_SLEEP 0x80000000 /* sleep mode */ 101 #define CFDA_SNOOZE 0x40000000 /* snooze mode */ 102 103 struct tulip_pci_softc { 104 struct tulip_softc sc_tulip; /* real Tulip softc */ 105 106 /* PCI-specific goo. */ 107 void *sc_ih; /* interrupt handle */ 108 109 pci_chipset_tag_t sc_pc; /* our PCI chipset */ 110 pcitag_t sc_pcitag; /* our PCI tag */ 111 112 int sc_flags; /* flags; see below */ 113 114 LIST_HEAD(, tulip_pci_softc) sc_intrslaves; 115 LIST_ENTRY(tulip_pci_softc) sc_intrq; 116 117 /* Our {ROM,interrupt} master. */ 118 struct tulip_pci_softc *sc_master; 119 }; 120 121 /* sc_flags */ 122 #define TULIP_PCI_SHAREDINTR 0x01 /* interrupt is shared */ 123 #define TULIP_PCI_SLAVEINTR 0x02 /* interrupt is slave */ 124 #define TULIP_PCI_SHAREDROM 0x04 /* ROM is shared */ 125 #define TULIP_PCI_SLAVEROM 0x08 /* slave of shared ROM */ 126 127 int tlp_pci_match __P((struct device *, struct cfdata *, void *)); 128 void tlp_pci_attach __P((struct device *, struct device *, void *)); 129 130 struct cfattach tlp_pci_ca = { 131 sizeof(struct tulip_pci_softc), tlp_pci_match, tlp_pci_attach, 132 }; 133 134 const struct tulip_pci_product { 135 u_int32_t tpp_vendor; /* PCI vendor ID */ 136 u_int32_t tpp_product; /* PCI product ID */ 137 tulip_chip_t tpp_chip; /* base Tulip chip type */ 138 } tlp_pci_products[] = { 139 #ifdef TLP_MATCH_21040 140 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21040, 141 TULIP_CHIP_21040 }, 142 #endif 143 #ifdef TLP_MATCH_21041 144 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21041, 145 TULIP_CHIP_21041 }, 146 #endif 147 #ifdef TLP_MATCH_21140 148 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21140, 149 TULIP_CHIP_21140 }, 150 #endif 151 #ifdef TLP_MATCH_21142 152 { PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142, 153 TULIP_CHIP_21142 }, 154 #endif 155 156 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C168, 157 TULIP_CHIP_82C168 }, 158 159 /* 160 * Note: This is like a MX98725 with Wake-On-LAN and a 161 * 128-bit multicast hash table. 162 */ 163 { PCI_VENDOR_LITEON, PCI_PRODUCT_LITEON_82C115, 164 TULIP_CHIP_82C115 }, 165 166 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX98713, 167 TULIP_CHIP_MX98713 }, 168 { PCI_VENDOR_MACRONIX, PCI_PRODUCT_MACRONIX_MX987x5, 169 TULIP_CHIP_MX98715 }, 170 171 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100TX, 172 TULIP_CHIP_MX98713 }, 173 174 { PCI_VENDOR_WINBOND, PCI_PRODUCT_WINBOND_W89C840F, 175 TULIP_CHIP_WB89C840F }, 176 { PCI_VENDOR_COMPEX, PCI_PRODUCT_COMPEX_RL100ATX, 177 TULIP_CHIP_WB89C840F }, 178 179 { PCI_VENDOR_DAVICOM, PCI_PRODUCT_DAVICOM_DM9102, 180 TULIP_CHIP_DM9102 }, 181 182 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_AL981, 183 TULIP_CHIP_AL981 }, 184 185 #if 0 186 { PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX88140A, 187 TULIP_CHIP_AX88140 }, 188 #endif 189 190 { 0, 0, 191 TULIP_CHIP_INVALID }, 192 }; 193 194 struct tlp_pci_quirks { 195 void (*tpq_func) __P((struct tulip_pci_softc *, 196 const u_int8_t *)); 197 u_int8_t tpq_oui[3]; 198 }; 199 200 void tlp_pci_dec_quirks __P((struct tulip_pci_softc *, 201 const u_int8_t *)); 202 203 void tlp_pci_znyx_21040_quirks __P((struct tulip_pci_softc *, 204 const u_int8_t *)); 205 void tlp_pci_smc_21040_quirks __P((struct tulip_pci_softc *, 206 const u_int8_t *)); 207 void tlp_pci_cogent_21040_quirks __P((struct tulip_pci_softc *, 208 const u_int8_t *)); 209 void tlp_pci_accton_21040_quirks __P((struct tulip_pci_softc *, 210 const u_int8_t *)); 211 212 void tlp_pci_cobalt_21142_quirks __P((struct tulip_pci_softc *, 213 const u_int8_t *)); 214 215 const struct tlp_pci_quirks tlp_pci_21040_quirks[] = { 216 { tlp_pci_znyx_21040_quirks, { 0x00, 0xc0, 0x95 } }, 217 { tlp_pci_smc_21040_quirks, { 0x00, 0x00, 0xc0 } }, 218 { tlp_pci_cogent_21040_quirks, { 0x00, 0x00, 0x92 } }, 219 { tlp_pci_accton_21040_quirks, { 0x00, 0x00, 0xe8 } }, 220 { NULL, { 0, 0, 0 } } 221 }; 222 223 const struct tlp_pci_quirks tlp_pci_21041_quirks[] = { 224 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 225 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 226 { NULL, { 0, 0, 0 } } 227 }; 228 229 void tlp_pci_asante_21140_quirks __P((struct tulip_pci_softc *, 230 const u_int8_t *)); 231 232 const struct tlp_pci_quirks tlp_pci_21140_quirks[] = { 233 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 234 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 235 { tlp_pci_asante_21140_quirks, { 0x00, 0x00, 0x94 } }, 236 { NULL, { 0, 0, 0 } } 237 }; 238 239 const struct tlp_pci_quirks tlp_pci_21142_quirks[] = { 240 { tlp_pci_dec_quirks, { 0x08, 0x00, 0x2b } }, 241 { tlp_pci_dec_quirks, { 0x00, 0x00, 0xf8 } }, 242 { tlp_pci_cobalt_21142_quirks, { 0x00, 0x10, 0xe0 } }, 243 { NULL, { 0, 0, 0 } } 244 }; 245 246 int tlp_pci_shared_intr __P((void *)); 247 248 const struct tulip_pci_product *tlp_pci_lookup 249 __P((const struct pci_attach_args *)); 250 void tlp_pci_get_quirks __P((struct tulip_pci_softc *, const u_int8_t *, 251 const struct tlp_pci_quirks *)); 252 void tlp_pci_check_slaved __P((struct tulip_pci_softc *, int, int)); 253 254 const struct tulip_pci_product * 255 tlp_pci_lookup(pa) 256 const struct pci_attach_args *pa; 257 { 258 const struct tulip_pci_product *tpp; 259 260 for (tpp = tlp_pci_products; 261 tlp_chip_names[tpp->tpp_chip] != NULL; 262 tpp++) { 263 if (PCI_VENDOR(pa->pa_id) == tpp->tpp_vendor && 264 PCI_PRODUCT(pa->pa_id) == tpp->tpp_product) 265 return (tpp); 266 } 267 return (NULL); 268 } 269 270 void 271 tlp_pci_get_quirks(psc, enaddr, tpq) 272 struct tulip_pci_softc *psc; 273 const u_int8_t *enaddr; 274 const struct tlp_pci_quirks *tpq; 275 { 276 277 for (; tpq->tpq_func != NULL; tpq++) { 278 if (tpq->tpq_oui[0] == enaddr[0] && 279 tpq->tpq_oui[1] == enaddr[1] && 280 tpq->tpq_oui[2] == enaddr[2]) { 281 (*tpq->tpq_func)(psc, enaddr); 282 return; 283 } 284 } 285 } 286 287 void 288 tlp_pci_check_slaved(psc, shared, slaved) 289 struct tulip_pci_softc *psc; 290 int shared, slaved; 291 { 292 extern struct cfdriver tlp_cd; 293 struct tulip_pci_softc *cur, *best = NULL; 294 struct tulip_softc *sc = &psc->sc_tulip; 295 int i; 296 297 /* 298 * First of all, find the lowest pcidev numbered device on our 299 * bus marked as shared. That should be our master. 300 */ 301 for (i = 0; i < tlp_cd.cd_ndevs; i++) { 302 if ((cur = tlp_cd.cd_devs[i]) == NULL) 303 continue; 304 if (cur->sc_tulip.sc_dev.dv_parent != sc->sc_dev.dv_parent) 305 continue; 306 if ((cur->sc_flags & shared) == 0) 307 continue; 308 if (cur == psc) 309 continue; 310 if (best == NULL || 311 best->sc_tulip.sc_devno > cur->sc_tulip.sc_devno) 312 best = cur; 313 } 314 315 if (best != NULL) { 316 psc->sc_master = best; 317 psc->sc_flags |= (shared | slaved); 318 } 319 } 320 321 int 322 tlp_pci_match(parent, match, aux) 323 struct device *parent; 324 struct cfdata *match; 325 void *aux; 326 { 327 struct pci_attach_args *pa = aux; 328 329 if (tlp_pci_lookup(pa) != NULL) 330 return (10); /* beat if_de.c */ 331 332 return (0); 333 } 334 335 void 336 tlp_pci_attach(parent, self, aux) 337 struct device *parent, *self; 338 void *aux; 339 { 340 struct tulip_pci_softc *psc = (void *) self; 341 struct tulip_softc *sc = &psc->sc_tulip; 342 struct pci_attach_args *pa = aux; 343 pci_chipset_tag_t pc = pa->pa_pc; 344 pci_intr_handle_t ih; 345 const char *intrstr = NULL; 346 bus_space_tag_t iot, memt; 347 bus_space_handle_t ioh, memh; 348 int ioh_valid, memh_valid, i, j; 349 const struct tulip_pci_product *tpp; 350 u_int8_t enaddr[ETHER_ADDR_LEN]; 351 u_int32_t val; 352 pcireg_t reg; 353 int pmreg; 354 355 sc->sc_devno = pa->pa_device; 356 psc->sc_pc = pa->pa_pc; 357 psc->sc_pcitag = pa->pa_tag; 358 359 LIST_INIT(&psc->sc_intrslaves); 360 361 tpp = tlp_pci_lookup(pa); 362 if (tpp == NULL) { 363 printf("\n"); 364 panic("tlp_pci_attach: impossible"); 365 } 366 sc->sc_chip = tpp->tpp_chip; 367 368 /* 369 * By default, Tulip registers are 8 bytes long (4 bytes 370 * followed by a 4 byte pad). 371 */ 372 sc->sc_regshift = 3; 373 374 /* 375 * No power management hooks. 376 * XXX Maybe we should add some! 377 */ 378 sc->sc_flags |= TULIPF_ENABLED; 379 380 /* 381 * Get revision info, and set some chip-specific variables. 382 */ 383 sc->sc_rev = PCI_REVISION(pa->pa_class); 384 switch (sc->sc_chip) { 385 case TULIP_CHIP_21140: 386 if (sc->sc_rev >= 0x20) 387 sc->sc_chip = TULIP_CHIP_21140A; 388 break; 389 390 case TULIP_CHIP_21142: 391 if (sc->sc_rev >= 0x20) 392 sc->sc_chip = TULIP_CHIP_21143; 393 break; 394 395 case TULIP_CHIP_82C168: 396 if (sc->sc_rev >= 0x20) 397 sc->sc_chip = TULIP_CHIP_82C169; 398 break; 399 400 case TULIP_CHIP_MX98713: 401 if (sc->sc_rev >= 0x10) 402 sc->sc_chip = TULIP_CHIP_MX98713A; 403 break; 404 405 case TULIP_CHIP_MX98715: 406 if (sc->sc_rev >= 0x20) 407 sc->sc_chip = TULIP_CHIP_MX98715A; 408 if (sc->sc_rev >= 0x30) 409 sc->sc_chip = TULIP_CHIP_MX98725; 410 break; 411 412 case TULIP_CHIP_WB89C840F: 413 sc->sc_regshift = 2; 414 break; 415 416 case TULIP_CHIP_AX88140: 417 if (sc->sc_rev >= 0x10) 418 sc->sc_chip = TULIP_CHIP_AX88141; 419 break; 420 421 case TULIP_CHIP_DM9102: 422 if (sc->sc_rev >= 0x30) 423 sc->sc_chip = TULIP_CHIP_DM9102A; 424 break; 425 426 default: 427 /* Nothing. */ 428 } 429 430 printf(": %s Ethernet, pass %d.%d\n", 431 tlp_chip_names[sc->sc_chip], 432 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf); 433 434 switch (sc->sc_chip) { 435 case TULIP_CHIP_21040: 436 if (sc->sc_rev < 0x20) { 437 printf("%s: 21040 must be at least pass 2.0\n", 438 sc->sc_dev.dv_xname); 439 return; 440 } 441 break; 442 443 case TULIP_CHIP_21140: 444 if (sc->sc_rev < 0x11) { 445 printf("%s: 21140 must be at least pass 1.1\n", 446 sc->sc_dev.dv_xname); 447 return; 448 } 449 break; 450 451 default: 452 /* Nothing. */ 453 } 454 455 /* 456 * Check to see if the device is in power-save mode, and 457 * being it out if necessary. 458 */ 459 switch (sc->sc_chip) { 460 case TULIP_CHIP_21140: 461 case TULIP_CHIP_21140A: 462 case TULIP_CHIP_21142: 463 case TULIP_CHIP_21143: 464 case TULIP_CHIP_MX98713A: 465 case TULIP_CHIP_MX98715: 466 case TULIP_CHIP_MX98715A: 467 case TULIP_CHIP_MX98725: 468 case TULIP_CHIP_DM9102: 469 case TULIP_CHIP_DM9102A: 470 /* 471 * Clear the "sleep mode" bit in the CFDA register. 472 */ 473 reg = pci_conf_read(pc, pa->pa_tag, TULIP_PCI_CFDA); 474 if (reg & (CFDA_SLEEP|CFDA_SNOOZE)) 475 pci_conf_write(pc, pa->pa_tag, TULIP_PCI_CFDA, 476 reg & ~(CFDA_SLEEP|CFDA_SNOOZE)); 477 break; 478 479 default: 480 /* Nothing. */ 481 } 482 483 if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PWRMGMT, &pmreg, 0)) { 484 reg = pci_conf_read(pc, pa->pa_tag, pmreg + 4) & 0x3; 485 if (reg == 3) { 486 /* 487 * The card has lost all configuration data in 488 * this state, so punt. 489 */ 490 printf("%s: unable to wake up from power state D3\n", 491 sc->sc_dev.dv_xname); 492 return; 493 } 494 if (reg != 0) { 495 printf("%s: waking up from power state D%d\n", 496 sc->sc_dev.dv_xname, reg); 497 pci_conf_write(pc, pa->pa_tag, pmreg + 4, 0); 498 } 499 } 500 501 /* 502 * Map the device. 503 */ 504 ioh_valid = (pci_mapreg_map(pa, TULIP_PCI_IOBA, 505 PCI_MAPREG_TYPE_IO, 0, 506 &iot, &ioh, NULL, NULL) == 0); 507 memh_valid = (pci_mapreg_map(pa, TULIP_PCI_MMBA, 508 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 509 &memt, &memh, NULL, NULL) == 0); 510 511 if (memh_valid) { 512 sc->sc_st = memt; 513 sc->sc_sh = memh; 514 } else if (ioh_valid) { 515 sc->sc_st = iot; 516 sc->sc_sh = ioh; 517 } else { 518 printf(": unable to map device registers\n"); 519 return; 520 } 521 522 sc->sc_dmat = pa->pa_dmat; 523 524 /* 525 * Make sure bus mastering is enabled. 526 */ 527 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 528 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 529 PCI_COMMAND_MASTER_ENABLE); 530 531 /* 532 * Get the cacheline size. 533 */ 534 sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag, 535 PCI_BHLC_REG)); 536 537 /* 538 * Get PCI data moving command info. 539 */ 540 if (pa->pa_flags & PCI_FLAGS_MRL_OKAY) 541 sc->sc_flags |= TULIPF_MRL; 542 if (pa->pa_flags & PCI_FLAGS_MRM_OKAY) 543 sc->sc_flags |= TULIPF_MRM; 544 if (pa->pa_flags & PCI_FLAGS_MWI_OKAY) 545 sc->sc_flags |= TULIPF_MWI; 546 547 /* 548 * Read the contents of the Ethernet Address ROM/SROM. 549 */ 550 switch (sc->sc_chip) { 551 case TULIP_CHIP_21040: 552 sc->sc_srom_addrbits = 6; 553 sc->sc_srom = malloc(TULIP_ROM_SIZE(6), M_DEVBUF, M_NOWAIT); 554 TULIP_WRITE(sc, CSR_MIIROM, MIIROM_SROMCS); 555 for (i = 0; i < TULIP_ROM_SIZE(6); i++) { 556 for (j = 0; j < 10000; j++) { 557 val = TULIP_READ(sc, CSR_MIIROM); 558 if ((val & MIIROM_DN) == 0) 559 break; 560 } 561 sc->sc_srom[i] = val & MIIROM_DATA; 562 } 563 break; 564 565 case TULIP_CHIP_82C168: 566 case TULIP_CHIP_82C169: 567 { 568 sc->sc_srom_addrbits = 2; 569 sc->sc_srom = malloc(TULIP_ROM_SIZE(2), M_DEVBUF, M_NOWAIT); 570 571 /* 572 * The Lite-On PNIC stores the Ethernet address in 573 * the first 3 words of the EEPROM. EEPROM access 574 * is not like the other Tulip chips. 575 */ 576 for (i = 0; i < 6; i += 2) { 577 TULIP_WRITE(sc, CSR_PNIC_SROMCTL, 578 PNIC_SROMCTL_READ | (i >> 1)); 579 for (j = 0; j < 500; j++) { 580 delay(2); 581 val = TULIP_READ(sc, CSR_MIIROM); 582 if ((val & PNIC_MIIROM_BUSY) == 0) 583 break; 584 } 585 if (val & PNIC_MIIROM_BUSY) { 586 printf("%s: EEPROM timed out\n", 587 sc->sc_dev.dv_xname); 588 return; 589 } 590 val &= PNIC_MIIROM_DATA; 591 sc->sc_srom[i] = val >> 8; 592 sc->sc_srom[i + 1] = val & 0xff; 593 } 594 break; 595 } 596 597 default: 598 if (tlp_read_srom(sc) == 0) 599 goto cant_cope; 600 break; 601 } 602 603 /* 604 * Deal with chip/board quirks. This includes setting up 605 * the mediasw, and extracting the Ethernet address from 606 * the rombuf. 607 */ 608 switch (sc->sc_chip) { 609 case TULIP_CHIP_21040: 610 /* Check for a slaved ROM on a multi-port board. */ 611 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDROM, 612 TULIP_PCI_SLAVEROM); 613 if (psc->sc_flags & TULIP_PCI_SLAVEROM) 614 memcpy(sc->sc_srom, psc->sc_master->sc_tulip.sc_srom, 615 sizeof(sc->sc_srom)); 616 617 /* 618 * Parse the Ethernet Address ROM. 619 */ 620 if (tlp_parse_old_srom(sc, enaddr) == 0) 621 goto cant_cope; 622 623 /* 624 * If we have a slaved ROM, adjust the Ethernet address. 625 */ 626 if (psc->sc_flags & TULIP_PCI_SLAVEROM) 627 enaddr[5] += 628 sc->sc_devno - psc->sc_master->sc_tulip.sc_devno; 629 630 /* 631 * All 21040 boards start out with the same 632 * media switch. 633 */ 634 sc->sc_mediasw = &tlp_21040_mediasw; 635 636 /* 637 * Deal with any quirks this board might have. 638 */ 639 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21040_quirks); 640 break; 641 642 case TULIP_CHIP_21041: 643 /* Check for a slaved ROM on a multi-port board. */ 644 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDROM, 645 TULIP_PCI_SLAVEROM); 646 if (psc->sc_flags & TULIP_PCI_SLAVEROM) 647 memcpy(sc->sc_srom, psc->sc_master->sc_tulip.sc_srom, 648 sizeof(sc->sc_srom)); 649 650 /* Check for new format SROM. */ 651 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 652 /* 653 * Not an ISV SROM; try the old DEC Ethernet Address 654 * ROM format. 655 */ 656 if (tlp_parse_old_srom(sc, enaddr) == 0) 657 goto cant_cope; 658 } 659 660 /* 661 * All 21041 boards use the same media switch; they all 662 * work basically the same! Yippee! 663 */ 664 sc->sc_mediasw = &tlp_21041_mediasw; 665 666 /* 667 * Deal with any quirks this board might have. 668 */ 669 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21041_quirks); 670 break; 671 672 case TULIP_CHIP_21140: 673 case TULIP_CHIP_21140A: 674 /* Check for new format SROM. */ 675 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 676 /* 677 * Not an ISV SROM; try the old DEC Ethernet Address 678 * ROM format. 679 */ 680 if (tlp_parse_old_srom(sc, enaddr) == 0) 681 goto cant_cope; 682 } else { 683 /* 684 * We start out with the 2114x ISV media switch. 685 * When we search for quirks, we may change to 686 * a different switch. 687 */ 688 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 689 } 690 691 /* 692 * Deal with any quirks this board might have. 693 */ 694 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21140_quirks); 695 696 /* 697 * Bail out now if we can't deal with this board. 698 */ 699 if (sc->sc_mediasw == NULL) 700 goto cant_cope; 701 break; 702 703 case TULIP_CHIP_21142: 704 case TULIP_CHIP_21143: 705 /* Check for new format SROM. */ 706 if (tlp_isv_srom_enaddr(sc, enaddr) == 0) { 707 /* 708 * Not an ISV SROM; try the old DEC Ethernet Address 709 * ROM format. 710 */ 711 if (tlp_parse_old_srom(sc, enaddr) == 0) 712 goto cant_cope; 713 } else { 714 /* 715 * We start out with the 2114x ISV media switch. 716 * When we search for quirks, we may change to 717 * a different switch. 718 */ 719 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 720 } 721 722 /* 723 * Deal with any quirks this board might have. 724 */ 725 tlp_pci_get_quirks(psc, enaddr, tlp_pci_21142_quirks); 726 727 /* 728 * Bail out now if we can't deal with this board. 729 */ 730 if (sc->sc_mediasw == NULL) 731 goto cant_cope; 732 break; 733 734 case TULIP_CHIP_82C168: 735 case TULIP_CHIP_82C169: 736 /* 737 * Lite-On PNIC's Ethernet address is the first 6 738 * bytes of its EEPROM. 739 */ 740 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 741 742 /* 743 * Lite-On PNICs always use the same mediasw; we 744 * select MII vs. internal NWAY automatically. 745 */ 746 sc->sc_mediasw = &tlp_pnic_mediasw; 747 break; 748 749 case TULIP_CHIP_MX98713: 750 /* 751 * The Macronix MX98713 has an MII and GPIO, but no 752 * internal Nway block. This chip is basically a 753 * perfect 21140A clone, with the exception of the 754 * a magic register frobbing in order to make the 755 * interface function. 756 */ 757 if (tlp_isv_srom_enaddr(sc, enaddr)) { 758 sc->sc_mediasw = &tlp_2114x_isv_mediasw; 759 break; 760 } 761 /* FALLTHROUGH */ 762 763 case TULIP_CHIP_82C115: 764 /* 765 * Yippee! The Lite-On 82C115 is a clone of 766 * the MX98725 (the data sheet even says `MXIC' 767 * on it)! Imagine that, a clone of a clone. 768 * 769 * The differences are really minimal: 770 * 771 * - Wake-On-LAN support 772 * - 128-bit multicast hash table, rather than 773 * the standard 512-bit hash table 774 */ 775 /* FALLTHROUGH */ 776 777 case TULIP_CHIP_MX98713A: 778 case TULIP_CHIP_MX98715A: 779 case TULIP_CHIP_MX98725: 780 /* 781 * The MX98713A has an MII as well as an internal Nway block, 782 * but no GPIO. The MX98715 and MX98725 have an internal 783 * Nway block only. 784 * 785 * The internal Nway block, unlike the Lite-On PNIC's, does 786 * just that - performs Nway. Once autonegotiation completes, 787 * we must program the GPR media information into the chip. 788 * 789 * The byte offset of the Ethernet address is stored at 790 * offset 0x70. 791 */ 792 memcpy(enaddr, &sc->sc_srom[sc->sc_srom[0x70]], ETHER_ADDR_LEN); 793 sc->sc_mediasw = &tlp_pmac_mediasw; 794 break; 795 796 case TULIP_CHIP_WB89C840F: 797 /* 798 * Winbond 89C840F's Ethernet address is the first 799 * 6 bytes of its EEPROM. 800 */ 801 memcpy(enaddr, sc->sc_srom, ETHER_ADDR_LEN); 802 803 /* 804 * Winbond 89C840F has an MII attached to the SIO. 805 */ 806 sc->sc_mediasw = &tlp_sio_mii_mediasw; 807 break; 808 809 case TULIP_CHIP_AL981: 810 /* 811 * The ADMtek AL981's Ethernet address is located 812 * at offset 8 of its EEPROM. 813 */ 814 memcpy(enaddr, &sc->sc_srom[8], ETHER_ADDR_LEN); 815 816 /* 817 * ADMtek AL981 has a built-in PHY accessed through 818 * special registers. 819 */ 820 sc->sc_mediasw = &tlp_al981_mediasw; 821 break; 822 823 case TULIP_CHIP_DM9102: 824 case TULIP_CHIP_DM9102A: 825 /* 826 * Some boards with the Davicom chip have an ISV 827 * SROM (mostly DM9102A boards -- trying to describe 828 * the HomePNA PHY, probably) although the data in 829 * them is generally wrong. Check for ISV format 830 * and grab the Ethernet address that way, and if 831 * that fails, fall back on grabbing it from an 832 * observed offset of 20 (which is where it would 833 * be in an ISV SROM anyhow, tho ISV can cope with 834 * multi-port boards). 835 */ 836 if (tlp_isv_srom_enaddr(sc, enaddr)) 837 memcpy(enaddr, &sc->sc_srom[20], ETHER_ADDR_LEN); 838 839 /* 840 * Davicom chips all have an internal MII interface 841 * and a built-in PHY. DM9102A also has a an external 842 * MII interface, usually with a HomePNA PHY attached 843 * to it. 844 */ 845 sc->sc_mediasw = &tlp_dm9102_mediasw; 846 break; 847 848 default: 849 cant_cope: 850 printf("%s: sorry, unable to handle your board\n", 851 sc->sc_dev.dv_xname); 852 return; 853 } 854 855 /* 856 * Handle shared interrupts. 857 */ 858 if (psc->sc_flags & TULIP_PCI_SHAREDINTR) { 859 if (psc->sc_master) 860 psc->sc_flags |= TULIP_PCI_SLAVEINTR; 861 else { 862 tlp_pci_check_slaved(psc, TULIP_PCI_SHAREDINTR, 863 TULIP_PCI_SLAVEINTR); 864 if (psc->sc_master == NULL) 865 psc->sc_master = psc; 866 } 867 LIST_INSERT_HEAD(&psc->sc_master->sc_intrslaves, 868 psc, sc_intrq); 869 } 870 871 if (psc->sc_flags & TULIP_PCI_SLAVEINTR) { 872 printf("%s: sharing interrupt with %s\n", 873 sc->sc_dev.dv_xname, 874 psc->sc_master->sc_tulip.sc_dev.dv_xname); 875 } else { 876 /* 877 * Map and establish our interrupt. 878 */ 879 if (pci_intr_map(pc, pa->pa_intrtag, pa->pa_intrpin, 880 pa->pa_intrline, &ih)) { 881 printf("%s: unable to map interrupt\n", 882 sc->sc_dev.dv_xname); 883 return; 884 } 885 intrstr = pci_intr_string(pc, ih); 886 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, 887 (psc->sc_flags & TULIP_PCI_SHAREDINTR) ? 888 tlp_pci_shared_intr : tlp_intr, sc); 889 if (psc->sc_ih == NULL) { 890 printf("%s: unable to establish interrupt", 891 sc->sc_dev.dv_xname); 892 if (intrstr != NULL) 893 printf(" at %s", intrstr); 894 printf("\n"); 895 return; 896 } 897 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, 898 intrstr); 899 } 900 901 /* 902 * Finish off the attach. 903 */ 904 tlp_attach(sc, enaddr); 905 } 906 907 int 908 tlp_pci_shared_intr(arg) 909 void *arg; 910 { 911 struct tulip_pci_softc *master = arg, *slave; 912 int rv = 0; 913 914 for (slave = LIST_FIRST(&master->sc_intrslaves); 915 slave != NULL; 916 slave = LIST_NEXT(slave, sc_intrq)) 917 rv |= tlp_intr(&slave->sc_tulip); 918 919 return (rv); 920 } 921 922 void 923 tlp_pci_dec_quirks(psc, enaddr) 924 struct tulip_pci_softc *psc; 925 const u_int8_t *enaddr; 926 { 927 struct tulip_softc *sc = &psc->sc_tulip; 928 929 /* 930 * This isn't really a quirk-gathering device, really. We 931 * just want to get the spiffy DEC board name from the SROM. 932 */ 933 strcpy(sc->sc_name, "DEC "); 934 935 if (memcmp(&sc->sc_srom[29], "DE500", 5) == 0 || 936 memcmp(&sc->sc_srom[29], "DE450", 5) == 0) 937 memcpy(&sc->sc_name[4], &sc->sc_srom[29], 8); 938 } 939 940 void 941 tlp_pci_znyx_21040_quirks(psc, enaddr) 942 struct tulip_pci_softc *psc; 943 const u_int8_t *enaddr; 944 { 945 struct tulip_softc *sc = &psc->sc_tulip; 946 u_int16_t id = 0; 947 948 /* 949 * If we have a slaved ROM, just copy the bits from the master. 950 * This is in case we fail the ROM ID check (older boards) and 951 * need to fall back on Ethernet address model checking; that 952 * will fail for slave chips. 953 */ 954 if (psc->sc_flags & TULIP_PCI_SLAVEROM) { 955 strcpy(sc->sc_name, psc->sc_master->sc_tulip.sc_name); 956 sc->sc_mediasw = psc->sc_master->sc_tulip.sc_mediasw; 957 psc->sc_flags |= 958 psc->sc_master->sc_flags & TULIP_PCI_SHAREDINTR; 959 return; 960 } 961 962 if (sc->sc_srom[32] == 0x4a && sc->sc_srom[33] == 0x52) { 963 id = sc->sc_srom[37] | (sc->sc_srom[36] << 8); 964 switch (id) { 965 zx312: 966 case 0x0602: /* ZX312 */ 967 strcpy(sc->sc_name, "ZNYX ZX312"); 968 return; 969 970 case 0x0622: /* ZX312T */ 971 strcpy(sc->sc_name, "ZNYX ZX312T"); 972 sc->sc_mediasw = &tlp_21040_tp_mediasw; 973 return; 974 975 zx314_inta: 976 case 0x0701: /* ZX314 INTA */ 977 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 978 /* FALLTHROUGH */ 979 case 0x0711: /* ZX314 */ 980 strcpy(sc->sc_name, "ZNYX ZX314"); 981 psc->sc_flags |= TULIP_PCI_SHAREDROM; 982 sc->sc_mediasw = &tlp_21040_tp_mediasw; 983 return; 984 985 zx315_inta: 986 case 0x0801: /* ZX315 INTA */ 987 psc->sc_flags |= TULIP_PCI_SHAREDINTR; 988 /* FALLTHROUGH */ 989 case 0x0811: /* ZX315 */ 990 strcpy(sc->sc_name, "ZNYX ZX315"); 991 psc->sc_flags |= TULIP_PCI_SHAREDROM; 992 return; 993 994 default: 995 id = 0; 996 } 997 } 998 999 /* 1000 * Deal with boards that have broken ROMs. 1001 */ 1002 if (id == 0) { 1003 if ((enaddr[3] & ~3) == 0xf0 && (enaddr[5] & 3) == 0x00) 1004 goto zx314_inta; 1005 if ((enaddr[3] & ~3) == 0xf4 && (enaddr[5] & 1) == 0x00) 1006 goto zx315_inta; 1007 if ((enaddr[3] & ~3) == 0xec) 1008 goto zx312; 1009 } 1010 1011 strcpy(sc->sc_name, "ZNYX ZX31x"); 1012 } 1013 1014 void 1015 tlp_pci_smc_21040_quirks(psc, enaddr) 1016 struct tulip_pci_softc *psc; 1017 const u_int8_t *enaddr; 1018 { 1019 struct tulip_softc *sc = &psc->sc_tulip; 1020 u_int16_t id1, id2, ei; 1021 int auibnc = 0, utp = 0; 1022 char *cp; 1023 1024 id1 = sc->sc_srom[0x60] | (sc->sc_srom[0x61] << 8); 1025 id2 = sc->sc_srom[0x62] | (sc->sc_srom[0x63] << 8); 1026 ei = sc->sc_srom[0x66] | (sc->sc_srom[0x67] << 8); 1027 1028 strcpy(sc->sc_name, "SMC 8432"); 1029 cp = &sc->sc_name[8]; 1030 1031 if ((id1 & 1) == 0) { 1032 *cp++ = 'B'; 1033 auibnc = 1; 1034 } 1035 if ((id1 & 0xff) > 0x32) { 1036 *cp++ = 'T'; 1037 utp = 1; 1038 } 1039 if ((id1 & 0x4000) == 0) { 1040 *cp++ = 'A'; 1041 auibnc = 1; 1042 } 1043 if (id2 == 0x15) { 1044 sc->sc_name[7] = '4'; 1045 *cp++ = '-'; 1046 *cp++ = 'C'; 1047 *cp++ = 'H'; 1048 *cp++ = ei ? '2' : '1'; 1049 } 1050 *cp = '\0'; 1051 1052 if (utp != 0 && auibnc == 0) 1053 sc->sc_mediasw = &tlp_21040_tp_mediasw; 1054 else if (utp == 0 && auibnc != 0) 1055 sc->sc_mediasw = &tlp_21040_auibnc_mediasw; 1056 } 1057 1058 void 1059 tlp_pci_cogent_21040_quirks(psc, enaddr) 1060 struct tulip_pci_softc *psc; 1061 const u_int8_t *enaddr; 1062 { 1063 1064 strcpy(psc->sc_tulip.sc_name, "Cogent multi-port"); 1065 psc->sc_flags |= TULIP_PCI_SHAREDINTR|TULIP_PCI_SHAREDROM; 1066 } 1067 1068 void 1069 tlp_pci_accton_21040_quirks(psc, enaddr) 1070 struct tulip_pci_softc *psc; 1071 const u_int8_t *enaddr; 1072 { 1073 1074 strcpy(psc->sc_tulip.sc_name, "ACCTON EN1203"); 1075 } 1076 1077 void tlp_pci_asante_21140_reset __P((struct tulip_softc *)); 1078 1079 void 1080 tlp_pci_asante_21140_quirks(psc, enaddr) 1081 struct tulip_pci_softc *psc; 1082 const u_int8_t *enaddr; 1083 { 1084 struct tulip_softc *sc = &psc->sc_tulip; 1085 1086 /* 1087 * Some Asante boards don't use the ISV SROM format. For 1088 * those that don't, we initialize the GPIO direction bits, 1089 * and provide our own reset hook, which resets the MII. 1090 * 1091 * All of these boards use SIO-attached-MII media. 1092 */ 1093 if (sc->sc_mediasw == &tlp_2114x_isv_mediasw) 1094 return; 1095 1096 strcpy(sc->sc_name, "Asante"); 1097 1098 sc->sc_gp_dir = 0xbf; 1099 sc->sc_reset = tlp_pci_asante_21140_reset; 1100 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1101 } 1102 1103 void 1104 tlp_pci_asante_21140_reset(sc) 1105 struct tulip_softc *sc; 1106 { 1107 1108 TULIP_WRITE(sc, CSR_GPP, GPP_GPC | sc->sc_gp_dir); 1109 TULIP_WRITE(sc, CSR_GPP, 0x8); 1110 delay(100); 1111 TULIP_WRITE(sc, CSR_GPP, 0); 1112 } 1113 1114 void tlp_pci_cobalt_21142_reset __P((struct tulip_softc *)); 1115 1116 void 1117 tlp_pci_cobalt_21142_quirks(psc, enaddr) 1118 struct tulip_pci_softc *psc; 1119 const u_int8_t *enaddr; 1120 { 1121 struct tulip_softc *sc = &psc->sc_tulip; 1122 1123 /* 1124 * Cobalt Networks interfaces are just MII-on-SIO. 1125 */ 1126 sc->sc_reset = tlp_pci_cobalt_21142_reset; 1127 sc->sc_mediasw = &tlp_sio_mii_mediasw; 1128 1129 /* 1130 * The Cobalt systems tend to fall back to store-and-forward 1131 * pretty quickly, so we select that from the beginning to 1132 * avoid initial timeouts. 1133 */ 1134 sc->sc_txthresh = TXTH_SF; 1135 } 1136 1137 void 1138 tlp_pci_cobalt_21142_reset(sc) 1139 struct tulip_softc *sc; 1140 { 1141 /* 1142 * Reset PHY. 1143 */ 1144 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE | (1 << 16)); 1145 delay(10); 1146 TULIP_WRITE(sc, CSR_SIAGEN, SIAGEN_CWE); 1147 delay(10); 1148 } 1149