1 /* $NetBSD: if_rtw_pci.c,v 1.11 2008/03/21 07:47:43 dyoung Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center; Charles M. Hannum; and David Young. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * PCI bus front-end for the Realtek RTL8180 802.11 MAC/BBP chip. 42 * 43 * Derived from the ADMtek ADM8211 PCI bus front-end. 44 * 45 * Derived from the ``Tulip'' PCI bus front-end. 46 */ 47 48 #include <sys/cdefs.h> 49 __KERNEL_RCSID(0, "$NetBSD: if_rtw_pci.c,v 1.11 2008/03/21 07:47:43 dyoung Exp $"); 50 51 #include <sys/param.h> 52 #include <sys/systm.h> 53 #include <sys/mbuf.h> 54 #include <sys/malloc.h> 55 #include <sys/kernel.h> 56 #include <sys/socket.h> 57 #include <sys/ioctl.h> 58 #include <sys/errno.h> 59 #include <sys/device.h> 60 61 #include <machine/endian.h> 62 63 #include <net/if.h> 64 #include <net/if_dl.h> 65 #include <net/if_media.h> 66 #include <net/if_ether.h> 67 68 #include <net80211/ieee80211_netbsd.h> 69 #include <net80211/ieee80211_radiotap.h> 70 #include <net80211/ieee80211_var.h> 71 72 #include <sys/bus.h> 73 #include <sys/intr.h> 74 75 #include <dev/ic/rtwreg.h> 76 #include <dev/ic/sa2400reg.h> 77 #include <dev/ic/rtwvar.h> 78 79 #include <dev/pci/pcivar.h> 80 #include <dev/pci/pcireg.h> 81 #include <dev/pci/pcidevs.h> 82 83 /* 84 * PCI configuration space registers used by the ADM8211. 85 */ 86 #define RTW_PCI_IOBA 0x10 /* i/o mapped base */ 87 #define RTW_PCI_MMBA 0x14 /* memory mapped base */ 88 89 struct rtw_pci_softc { 90 struct rtw_softc psc_rtw; /* real ADM8211 softc */ 91 92 pci_intr_handle_t psc_ih; /* interrupt handle */ 93 void *psc_intrcookie; 94 95 pci_chipset_tag_t psc_pc; /* our PCI chipset */ 96 pcitag_t psc_pcitag; /* our PCI tag */ 97 }; 98 99 static int rtw_pci_match(device_t, struct cfdata *, void *); 100 static void rtw_pci_attach(device_t, device_t, void *); 101 static int rtw_pci_detach(device_t, int); 102 103 CFATTACH_DECL_NEW(rtw_pci, sizeof(struct rtw_pci_softc), 104 rtw_pci_match, rtw_pci_attach, rtw_pci_detach, NULL); 105 106 static const struct rtw_pci_product { 107 u_int32_t app_vendor; /* PCI vendor ID */ 108 u_int32_t app_product; /* PCI product ID */ 109 const char *app_product_name; 110 } rtw_pci_products[] = { 111 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8180, 112 "Realtek RTL8180 802.11 MAC/BBP" }, 113 { PCI_VENDOR_BELKIN, PCI_PRODUCT_BELKIN_F5D6001, 114 "Belkin F5D6001" }, 115 116 { 0, 0, NULL }, 117 }; 118 119 static const struct rtw_pci_product * 120 rtw_pci_lookup(const struct pci_attach_args *pa) 121 { 122 const struct rtw_pci_product *app; 123 124 for (app = rtw_pci_products; 125 app->app_product_name != NULL; 126 app++) { 127 if (PCI_VENDOR(pa->pa_id) == app->app_vendor && 128 PCI_PRODUCT(pa->pa_id) == app->app_product) 129 return (app); 130 } 131 return (NULL); 132 } 133 134 static int 135 rtw_pci_match(device_t parent, struct cfdata *match, void *aux) 136 { 137 struct pci_attach_args *pa = aux; 138 139 if (rtw_pci_lookup(pa) != NULL) 140 return (1); 141 142 return (0); 143 } 144 145 static bool 146 rtw_pci_resume(device_t self PMF_FN_ARGS) 147 { 148 struct rtw_pci_softc *psc = device_private(self); 149 struct rtw_softc *sc = &psc->psc_rtw; 150 151 /* Establish the interrupt. */ 152 psc->psc_intrcookie = pci_intr_establish(psc->psc_pc, psc->psc_ih, 153 IPL_NET, rtw_intr, sc); 154 if (psc->psc_intrcookie == NULL) { 155 aprint_error_dev(sc->sc_dev, "unable to establish interrupt\n"); 156 return false; 157 } 158 159 return rtw_resume(self, flags); 160 } 161 162 static bool 163 rtw_pci_suspend(device_t self PMF_FN_ARGS) 164 { 165 struct rtw_pci_softc *psc = device_private(self); 166 167 if (!rtw_suspend(self, flags)) 168 return false; 169 170 /* Unhook the interrupt handler. */ 171 pci_intr_disestablish(psc->psc_pc, psc->psc_intrcookie); 172 psc->psc_intrcookie = NULL; 173 return true; 174 } 175 176 static void 177 rtw_pci_attach(device_t parent, device_t self, void *aux) 178 { 179 struct rtw_pci_softc *psc = device_private(self); 180 struct rtw_softc *sc = &psc->psc_rtw; 181 struct rtw_regs *regs = &sc->sc_regs; 182 struct pci_attach_args *pa = aux; 183 pci_chipset_tag_t pc = pa->pa_pc; 184 const char *intrstr = NULL; 185 const struct rtw_pci_product *app; 186 int error; 187 188 sc->sc_dev = self; 189 psc->psc_pc = pa->pa_pc; 190 psc->psc_pcitag = pa->pa_tag; 191 192 app = rtw_pci_lookup(pa); 193 if (app == NULL) { 194 printf("\n"); 195 panic("rtw_pci_attach: impossible"); 196 } 197 198 /* 199 * Get revision info, and set some chip-specific variables. 200 */ 201 sc->sc_rev = PCI_REVISION(pa->pa_class); 202 aprint_normal(": %s, revision %d.%d\n", app->app_product_name, 203 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf); 204 205 /* power up chip */ 206 if ((error = pci_activate(pa->pa_pc, pa->pa_tag, self, NULL)) != 0 && 207 error != EOPNOTSUPP) { 208 aprint_error_dev(self, "cannot activate %d\n", error); 209 return; 210 } 211 212 /* 213 * Map the device. 214 */ 215 if (pci_mapreg_map(pa, RTW_PCI_MMBA, 216 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 217 ®s->r_bt, ®s->r_bh, NULL, ®s->r_sz) == 0) 218 ; 219 else if (pci_mapreg_map(pa, RTW_PCI_IOBA, PCI_MAPREG_TYPE_IO, 0, 220 ®s->r_bt, ®s->r_bh, NULL, ®s->r_sz) == 0) 221 ; 222 else { 223 aprint_error_dev(self, "unable to map device registers\n"); 224 return; 225 } 226 227 sc->sc_dmat = pa->pa_dmat; 228 229 /* 230 * Make sure bus mastering is enabled. 231 */ 232 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 233 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 234 PCI_COMMAND_MASTER_ENABLE); 235 236 /* 237 * Map and establish our interrupt. 238 */ 239 if (pci_intr_map(pa, &psc->psc_ih)) { 240 aprint_error_dev(self, "unable to map interrupt\n"); 241 return; 242 } 243 intrstr = pci_intr_string(pc, psc->psc_ih); 244 psc->psc_intrcookie = pci_intr_establish(pc, psc->psc_ih, IPL_NET, 245 rtw_intr, sc); 246 if (psc->psc_intrcookie == NULL) { 247 aprint_error_dev(self, "unable to establish interrupt"); 248 if (intrstr != NULL) 249 aprint_error(" at %s", intrstr); 250 aprint_error("\n"); 251 return; 252 } 253 254 aprint_normal_dev(self, "interrupting at %s\n", intrstr); 255 256 /* 257 * Finish off the attach. 258 */ 259 rtw_attach(sc); 260 261 if (!pmf_device_register(sc->sc_dev, rtw_pci_suspend, 262 rtw_pci_resume)) { 263 aprint_error_dev(sc->sc_dev, 264 "couldn't establish power handler\n"); 265 } else { 266 pmf_class_network_register(self, &sc->sc_if); 267 /* 268 * Power down the socket. 269 */ 270 pmf_device_suspend_self(self); 271 } 272 } 273 274 static int 275 rtw_pci_detach(device_t self, int flags) 276 { 277 struct rtw_pci_softc *psc = device_private(self); 278 struct rtw_softc *sc = &psc->psc_rtw; 279 struct rtw_regs *regs = &sc->sc_regs; 280 int rc; 281 282 if ((rc = rtw_detach(sc)) != 0) 283 return rc; 284 if (psc->psc_intrcookie != NULL) 285 pci_intr_disestablish(psc->psc_pc, psc->psc_intrcookie); 286 bus_space_unmap(regs->r_bt, regs->r_bh, regs->r_sz); 287 288 return 0; 289 } 290