1 /* $NetBSD: if_rtw_pci.c,v 1.9 2007/12/21 18:22:44 dyoung Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center; Charles M. Hannum; and David Young. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * PCI bus front-end for the Realtek RTL8180 802.11 MAC/BBP chip. 42 * 43 * Derived from the ADMtek ADM8211 PCI bus front-end. 44 * 45 * Derived from the ``Tulip'' PCI bus front-end. 46 */ 47 48 #include <sys/cdefs.h> 49 __KERNEL_RCSID(0, "$NetBSD: if_rtw_pci.c,v 1.9 2007/12/21 18:22:44 dyoung Exp $"); 50 51 #include <sys/param.h> 52 #include <sys/systm.h> 53 #include <sys/mbuf.h> 54 #include <sys/malloc.h> 55 #include <sys/kernel.h> 56 #include <sys/socket.h> 57 #include <sys/ioctl.h> 58 #include <sys/errno.h> 59 #include <sys/device.h> 60 61 #include <machine/endian.h> 62 63 #include <net/if.h> 64 #include <net/if_dl.h> 65 #include <net/if_media.h> 66 #include <net/if_ether.h> 67 68 #include <net80211/ieee80211_netbsd.h> 69 #include <net80211/ieee80211_radiotap.h> 70 #include <net80211/ieee80211_var.h> 71 72 #include <sys/bus.h> 73 #include <sys/intr.h> 74 75 #include <dev/ic/rtwreg.h> 76 #include <dev/ic/sa2400reg.h> 77 #include <dev/ic/rtwvar.h> 78 79 #include <dev/pci/pcivar.h> 80 #include <dev/pci/pcireg.h> 81 #include <dev/pci/pcidevs.h> 82 83 /* 84 * PCI configuration space registers used by the ADM8211. 85 */ 86 #define RTW_PCI_IOBA 0x10 /* i/o mapped base */ 87 #define RTW_PCI_MMBA 0x14 /* memory mapped base */ 88 89 struct rtw_pci_softc { 90 struct rtw_softc psc_rtw; /* real ADM8211 softc */ 91 92 pci_intr_handle_t psc_ih; /* interrupt handle */ 93 void *psc_intrcookie; 94 95 pci_chipset_tag_t psc_pc; /* our PCI chipset */ 96 pcitag_t psc_pcitag; /* our PCI tag */ 97 }; 98 99 static int rtw_pci_match(device_t, struct cfdata *, void *); 100 static void rtw_pci_attach(device_t, device_t, void *); 101 102 CFATTACH_DECL_NEW(rtw_pci, sizeof(struct rtw_pci_softc), 103 rtw_pci_match, rtw_pci_attach, NULL, NULL); 104 105 static const struct rtw_pci_product { 106 u_int32_t app_vendor; /* PCI vendor ID */ 107 u_int32_t app_product; /* PCI product ID */ 108 const char *app_product_name; 109 } rtw_pci_products[] = { 110 { PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8180, 111 "Realtek RTL8180 802.11 MAC/BBP" }, 112 { PCI_VENDOR_BELKIN, PCI_PRODUCT_BELKIN_F5D6001, 113 "Belkin F5D6001" }, 114 115 { 0, 0, NULL }, 116 }; 117 118 static const struct rtw_pci_product * 119 rtw_pci_lookup(const struct pci_attach_args *pa) 120 { 121 const struct rtw_pci_product *app; 122 123 for (app = rtw_pci_products; 124 app->app_product_name != NULL; 125 app++) { 126 if (PCI_VENDOR(pa->pa_id) == app->app_vendor && 127 PCI_PRODUCT(pa->pa_id) == app->app_product) 128 return (app); 129 } 130 return (NULL); 131 } 132 133 static int 134 rtw_pci_match(device_t parent, struct cfdata *match, void *aux) 135 { 136 struct pci_attach_args *pa = aux; 137 138 if (rtw_pci_lookup(pa) != NULL) 139 return (1); 140 141 return (0); 142 } 143 144 static int 145 rtw_pci_enable(struct rtw_softc *sc) 146 { 147 struct rtw_pci_softc *psc = (void *)sc; 148 149 /* Establish the interrupt. */ 150 psc->psc_intrcookie = pci_intr_establish(psc->psc_pc, psc->psc_ih, 151 IPL_NET, rtw_intr, sc); 152 if (psc->psc_intrcookie == NULL) { 153 aprint_error_dev(sc->sc_dev, "unable to establish interrupt\n"); 154 return (1); 155 } 156 157 return (0); 158 } 159 160 static void 161 rtw_pci_disable(struct rtw_softc *sc) 162 { 163 struct rtw_pci_softc *psc = (void *)sc; 164 165 /* Unhook the interrupt handler. */ 166 pci_intr_disestablish(psc->psc_pc, psc->psc_intrcookie); 167 psc->psc_intrcookie = NULL; 168 } 169 170 static void 171 rtw_pci_attach(device_t parent, device_t self, void *aux) 172 { 173 struct rtw_pci_softc *psc = device_private(self); 174 struct rtw_softc *sc = &psc->psc_rtw; 175 struct rtw_regs *regs = &sc->sc_regs; 176 struct pci_attach_args *pa = aux; 177 pci_chipset_tag_t pc = pa->pa_pc; 178 const char *intrstr = NULL; 179 bus_space_tag_t iot, memt; 180 bus_space_handle_t ioh, memh; 181 int ioh_valid, memh_valid; 182 const struct rtw_pci_product *app; 183 int error; 184 185 sc->sc_dev = self; 186 psc->psc_pc = pa->pa_pc; 187 psc->psc_pcitag = pa->pa_tag; 188 189 app = rtw_pci_lookup(pa); 190 if (app == NULL) { 191 printf("\n"); 192 panic("rtw_pci_attach: impossible"); 193 } 194 195 /* 196 * No power management hooks. 197 * XXX Maybe we should add some! 198 */ 199 sc->sc_flags |= RTW_F_ENABLED; 200 201 /* 202 * Get revision info, and set some chip-specific variables. 203 */ 204 sc->sc_rev = PCI_REVISION(pa->pa_class); 205 aprint_normal(": %s, revision %d.%d\n", app->app_product_name, 206 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf); 207 208 /* power up chip */ 209 if ((error = pci_activate(pa->pa_pc, pa->pa_tag, sc, 210 NULL)) && error != EOPNOTSUPP) { 211 aprint_error_dev(self, "cannot activate %d\n", error); 212 return; 213 } 214 215 /* 216 * Map the device. 217 */ 218 ioh_valid = (pci_mapreg_map(pa, RTW_PCI_IOBA, 219 PCI_MAPREG_TYPE_IO, 0, 220 &iot, &ioh, NULL, NULL) == 0); 221 memh_valid = (pci_mapreg_map(pa, RTW_PCI_MMBA, 222 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 223 &memt, &memh, NULL, NULL) == 0); 224 225 if (memh_valid) { 226 regs->r_bt = memt; 227 regs->r_bh = memh; 228 } else if (ioh_valid) { 229 regs->r_bt = iot; 230 regs->r_bh = ioh; 231 } else { 232 aprint_error(": unable to map device registers\n"); 233 return; 234 } 235 236 sc->sc_dmat = pa->pa_dmat; 237 238 /* 239 * Make sure bus mastering is enabled. 240 */ 241 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 242 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 243 PCI_COMMAND_MASTER_ENABLE); 244 245 /* 246 * Map and establish our interrupt. 247 */ 248 if (pci_intr_map(pa, &psc->psc_ih)) { 249 aprint_error_dev(self, "unable to map interrupt\n"); 250 return; 251 } 252 intrstr = pci_intr_string(pc, psc->psc_ih); 253 psc->psc_intrcookie = pci_intr_establish(pc, psc->psc_ih, IPL_NET, 254 rtw_intr, sc); 255 if (psc->psc_intrcookie == NULL) { 256 aprint_error_dev(self, "unable to establish interrupt"); 257 if (intrstr != NULL) 258 aprint_error(" at %s", intrstr); 259 aprint_error("\n"); 260 return; 261 } 262 263 aprint_normal_dev(self, "interrupting at %s\n", intrstr); 264 265 sc->sc_enable = rtw_pci_enable; 266 sc->sc_disable = rtw_pci_disable; 267 268 /* 269 * Finish off the attach. 270 */ 271 rtw_attach(sc); 272 } 273