xref: /netbsd-src/sys/dev/pci/if_re_pci.c (revision e5548b402ae4c44fb816de42c7bba9581ce23ef5)
1 /*	$NetBSD: if_re_pci.c,v 1.11 2005/11/23 18:56:22 riz Exp $	*/
2 
3 /*
4  * Copyright (c) 1997, 1998-2003
5  *	Bill Paul <wpaul@windriver.com>.  All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. All advertising materials mentioning features or use of this software
16  *    must display the following acknowledgement:
17  *	This product includes software developed by Bill Paul.
18  * 4. Neither the name of the author nor the names of any co-contributors
19  *    may be used to endorse or promote products derived from this software
20  *    without specific prior written permission.
21  *
22  * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
23  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25  * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
26  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
29  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
30  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
31  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
32  * THE POSSIBILITY OF SUCH DAMAGE.
33  */
34 
35 /* $FreeBSD: /repoman/r/ncvs/src/sys/dev/re/if_re.c,v 1.20 2004/04/11 20:34:08 ru Exp $ */
36 
37 /*
38  * RealTek 8139C+/8169/8169S/8110S PCI NIC driver
39  *
40  * Written by Bill Paul <wpaul@windriver.com>
41  * Senior Networking Software Engineer
42  * Wind River Systems
43  *
44  * NetBSD bus-specific frontends for written by
45  * Jonathan Stone <jonathan@netbsd.org>
46  */
47 
48 #include "bpfilter.h"
49 #include "vlan.h"
50 
51 #include <sys/types.h>
52 
53 #include <sys/param.h>
54 #include <sys/endian.h>
55 #include <sys/systm.h>
56 #include <sys/sockio.h>
57 #include <sys/mbuf.h>
58 #include <sys/malloc.h>
59 #include <sys/kernel.h>
60 #include <sys/socket.h>
61 #include <sys/device.h>
62 
63 #include <net/if.h>
64 #include <net/if_arp.h>
65 #include <net/if_dl.h>
66 #include <net/if_ether.h>
67 #include <net/if_media.h>
68 #include <net/if_vlanvar.h>
69 
70 #include <machine/bus.h>
71 
72 #include <dev/mii/mii.h>
73 #include <dev/mii/miivar.h>
74 
75 #include <dev/pci/pcireg.h>
76 #include <dev/pci/pcivar.h>
77 #include <dev/pci/pcidevs.h>
78 
79 /*
80  * Default to using PIO access for this driver.
81  */
82 #define RE_USEIOSPACE
83 
84 #include <dev/ic/rtl81x9reg.h>
85 #include <dev/ic/rtl81x9var.h>
86 #include <dev/ic/rtl8169var.h>
87 
88 struct re_pci_softc {
89 	struct rtk_softc sc_rtk;
90 
91 	void *sc_ih;
92 	pci_chipset_tag_t sc_pc;
93 	pcitag_t sc_pcitag;
94 };
95 
96 static int	re_pci_probe(struct device *, struct cfdata *, void *);
97 static void	re_pci_attach(struct device *, struct device *, void *);
98 
99 /*
100  * Various supported device vendors/types and their names.
101  */
102 static const struct rtk_type re_devs[] = {
103 	{ PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8139, RTK_HWREV_8139CPLUS,
104 		"RealTek 8139C+ 10/100BaseTX" },
105 	{ PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8169, RTK_HWREV_8169,
106 		"RealTek 8169 Gigabit Ethernet" },
107 	{ PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8169, RTK_HWREV_8169S,
108 		"RealTek 8169S Single-chip Gigabit Ethernet" },
109 	{ PCI_VENDOR_COREGA, PCI_PRODUCT_COREGA_LAPCIGT, RTK_HWREV_8169S,
110 		"Corega CG-LAPCIGT Gigabit Ethernet" },
111 	{ PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8169, RTK_HWREV_8110S,
112 		"RealTek 8110S Single-chip Gigabit Ethernet" },
113 	{ PCI_VENDOR_DLINK, PCI_PRODUCT_DLINK_DGE528T, RTK_HWREV_8169S,
114 		"D-Link DGE-528T Gigabit Ethernet" },
115 	{ PCI_VENDOR_USR2, PCI_PRODUCT_USR2_USR997902, RTK_HWREV_8169S,
116 		"US Robotics (3Com) USR997902 Gigabit Ethernet" },
117 	{ PCI_VENDOR_LINKSYS, PCI_PRODUCT_LINKSYS_EG1032, RTK_HWREV_8169S,
118 		"Linksys EG1032 rev. 3 Gigabit Ethernet" },
119 	{ 0, 0, 0, NULL }
120 };
121 
122 static const struct rtk_hwrev re_hwrevs[] = {
123 	{ RTK_HWREV_8139, RTK_8139,  "" },
124 	{ RTK_HWREV_8139A, RTK_8139, "A" },
125 	{ RTK_HWREV_8139AG, RTK_8139, "A-G" },
126 	{ RTK_HWREV_8139B, RTK_8139, "B" },
127 	{ RTK_HWREV_8130, RTK_8139, "8130" },
128 	{ RTK_HWREV_8139C, RTK_8139, "C" },
129 	{ RTK_HWREV_8139D, RTK_8139, "8139D/8100B/8100C" },
130 	{ RTK_HWREV_8139CPLUS, RTK_8139CPLUS, "C+"},
131 	{ RTK_HWREV_8169, RTK_8169, "8169"},
132 	{ RTK_HWREV_8169S, RTK_8169, "8169S"},
133 	{ RTK_HWREV_8110S, RTK_8169, "8110S"},
134 	{ RTK_HWREV_8100, RTK_8139, "8100"},
135 	{ RTK_HWREV_8101, RTK_8139, "8101"},
136 	{ 0, 0, NULL }
137 };
138 
139 #define RE_LINKSYS_EG1032_SUBID	0x00241737
140 
141 CFATTACH_DECL(re_pci, sizeof(struct re_pci_softc), re_pci_probe, re_pci_attach,
142 	      NULL, NULL);
143 
144 /*
145  * Probe for a RealTek 8139C+/8169/8110 chip. Check the PCI vendor and device
146  * IDs against our list and return a device name if we find a match.
147  */
148 static int
149 re_pci_probe(struct device *parent, struct cfdata *match, void *aux)
150 {
151 	const struct rtk_type		*t;
152 	struct pci_attach_args	*pa = aux;
153 	bus_space_tag_t		rtk_btag;
154 	bus_space_handle_t	rtk_bhandle;
155 	bus_size_t		bsize;
156 	u_int32_t		hwrev;
157 	pcireg_t subid;
158 
159 	subid = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
160 
161 	/* special-case Linksys EG1032, since rev 2 uses sk(4) */
162 	if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_LINKSYS &&
163 	    PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_LINKSYS_EG1032 &&
164 	    subid == RE_LINKSYS_EG1032_SUBID)
165 		return 1;
166 
167 	t = re_devs;
168 
169 	while (t->rtk_name != NULL) {
170 		if ((PCI_VENDOR(pa->pa_id) == t->rtk_vid) &&
171 		    (PCI_PRODUCT(pa->pa_id) == t->rtk_did)) {
172 
173 			/*
174 			 * Temporarily map the I/O space
175 			 * so we can read the chip ID register.
176 			 */
177 #ifdef RE_USEIOSPACE
178 			if (pci_mapreg_map(pa, RTK_PCI_LOIO,
179 			    PCI_MAPREG_TYPE_IO, 0, &rtk_btag,
180 			    &rtk_bhandle, NULL, &bsize)) {
181 				aprint_error("can't map i/o space\n");
182 				return 0;
183 			}
184 #else
185 			if (pci_mapreg_map(pa, RTK_PCI_LOMEM,
186 			    PCI_MAPREG_TYPE_MEM, 0, &rtk_btag,
187 			    &rtk_bhandle, NULL, &bsize)) {
188 				aprint_error("can't map mem space\n");
189 				return 0;
190 			}
191 #endif
192 			hwrev = bus_space_read_4(rtk_btag, rtk_bhandle,
193 			    RTK_TXCFG) & RTK_TXCFG_HWREV;
194 			bus_space_unmap(rtk_btag, rtk_bhandle, bsize);
195 			if (t->rtk_basetype == hwrev)
196 				return 2;	/* defeat rtk(4) */
197 		}
198 		t++;
199 	}
200 
201 	return 0;
202 }
203 
204 static void
205 re_pci_attach(struct device *parent, struct device *self, void *aux)
206 {
207 	struct re_pci_softc	*psc = (void *)self;
208 	struct rtk_softc	*sc = &psc->sc_rtk;
209 	struct pci_attach_args 	*pa = aux;
210 	pci_chipset_tag_t pc = pa->pa_pc;
211 	pci_intr_handle_t ih;
212 	const char *intrstr = NULL;
213 	const struct rtk_type	*t;
214 	const struct rtk_hwrev	*hw_rev;
215 	int			hwrev;
216 	int			error = 0;
217 	int			pmreg;
218 	pcireg_t		command;
219 	bus_size_t		bsize;
220 
221 
222 	/*
223 	 * Handle power management nonsense.
224 	 */
225 	if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PWRMGMT, &pmreg, 0)) {
226 		command = pci_conf_read(pc, pa->pa_tag, pmreg + PCI_PMCSR);
227 		if (command & RTK_PSTATE_MASK) {
228 			u_int32_t		iobase, membase, irq;
229 
230 			/* Save important PCI config data. */
231 			iobase = pci_conf_read(pc, pa->pa_tag, RTK_PCI_LOIO);
232 			membase = pci_conf_read(pc, pa->pa_tag, RTK_PCI_LOMEM);
233 			irq = pci_conf_read(pc, pa->pa_tag, PCI_INTERRUPT_REG);
234 
235 			/* Reset the power state. */
236 			aprint_normal("%s: chip is is in D%d power mode "
237 		    	    "-- setting to D0\n", sc->sc_dev.dv_xname,
238 		    	    command & RTK_PSTATE_MASK);
239 
240 			command &= ~RTK_PSTATE_MASK;
241 			pci_conf_write(pc, pa->pa_tag,
242 			    pmreg + PCI_PMCSR, command);
243 
244 			/* Restore PCI config data. */
245 			pci_conf_write(pc, pa->pa_tag, RTK_PCI_LOIO, iobase);
246 			pci_conf_write(pc, pa->pa_tag, RTK_PCI_LOMEM, membase);
247 			pci_conf_write(pc, pa->pa_tag, PCI_INTERRUPT_REG, irq);
248 		}
249 	}
250 
251 	/*
252 	 * Map control/status registers.
253 	 */
254 	command = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
255 	command |= PCI_COMMAND_MASTER_ENABLE;
256 	pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, command);
257 
258 #ifdef RE_USEIOSPACE
259 	if (pci_mapreg_map(pa, RTK_PCI_LOIO, PCI_MAPREG_TYPE_IO, 0,
260 	    &sc->rtk_btag, &sc->rtk_bhandle, NULL, &bsize)) {
261 		aprint_error("%s: can't map i/o space\n", sc->sc_dev.dv_xname);
262 		return;
263 	}
264 #else
265 	if (pci_mapreg_map(pa, RTK_PCI_LOMEM, PCI_MAPREG_TYPE_MEM, 0,
266 	    &sc->rtk_btag, &sc->rtk_bhandle, NULL, &bsize)) {
267 		aprint_error("%s: can't map mem space\n", sc->sc_dev.dv_xname);
268 		return;
269 	}
270 #endif
271 	t = re_devs;
272 	hwrev = CSR_READ_4(sc, RTK_TXCFG) & RTK_TXCFG_HWREV;
273 
274 	while (t->rtk_name != NULL) {
275 		if ((PCI_VENDOR(pa->pa_id) == t->rtk_vid) &&
276 		    (PCI_PRODUCT(pa->pa_id) == t->rtk_did)) {
277 
278 			if (t->rtk_basetype == hwrev)
279 				break;
280 		}
281 		t++;
282 	}
283 	aprint_normal(": %s\n", t->rtk_name);
284 
285 	hw_rev = re_hwrevs;
286 	hwrev = CSR_READ_4(sc, RTK_TXCFG) & RTK_TXCFG_HWREV;
287 	while (hw_rev->rtk_desc != NULL) {
288 		if (hw_rev->rtk_rev == hwrev) {
289 			sc->rtk_type = hw_rev->rtk_type;
290 			break;
291 		}
292 		hw_rev++;
293 	}
294 
295 	sc->sc_dmat = pa->pa_dmat;
296 
297 	/*
298 	 * No power/enable/disable machinery for PCI attac;
299 	 * mark the card enabled now.
300 	 */
301 	sc->sc_flags |= RTK_ENABLED;
302 
303 	/* Hook interrupt last to avoid having to lock softc */
304 	/* Allocate interrupt */
305 	if (pci_intr_map(pa, &ih)) {
306 		aprint_error("%s: couldn't map interrupt\n",
307 		    sc->sc_dev.dv_xname);
308 		return;
309 	}
310 	intrstr = pci_intr_string(pc, ih);
311 	psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, re_intr, sc);
312 	if (psc->sc_ih == NULL) {
313 		aprint_error("%s: couldn't establish interrupt",
314 		    sc->sc_dev.dv_xname);
315 		if (intrstr != NULL)
316 			aprint_error(" at %s", intrstr);
317 		aprint_error("\n");
318 		return;
319 	}
320 	aprint_normal("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr);
321 
322 	re_attach(sc);
323 
324 	/*
325 	 * Perform hardware diagnostic.
326 	 * XXX: this diagnostic only makes sense for attachemnts with 64-bit
327 	 * busses: PCI, but not CardBus.
328 	 */
329 	error = re_diag(sc);
330 	if (error) {
331 		aprint_error(
332 		    "%s: attach aborted due to hardware diag failure\n",
333 		    sc->sc_dev.dv_xname);
334 
335 		re_detach(sc);
336 
337 		if (psc->sc_ih != NULL) {
338 			pci_intr_disestablish(pc, psc->sc_ih);
339 			psc->sc_ih = NULL;
340 		}
341 
342 		if (bsize)
343 			bus_space_unmap(sc->rtk_btag, sc->rtk_bhandle, bsize);
344 	}
345 }
346