xref: /netbsd-src/sys/dev/pci/if_ral_pci.c (revision e89934bbf778a6d6d6894877c4da59d0c7835b0f)
1 /*	$NetBSD: if_ral_pci.c,v 1.23 2016/07/06 14:28:51 christos Exp $	*/
2 /*	$OpenBSD: if_ral_pci.c,v 1.24 2015/11/24 17:11:39 mpi Exp $  */
3 
4 /*-
5  * Copyright (c) 2005-2010 Damien Bergamini <damien.bergamini@free.fr>
6  *
7  * Permission to use, copy, modify, and distribute this software for any
8  * purpose with or without fee is hereby granted, provided that the above
9  * copyright notice and this permission notice appear in all copies.
10  *
11  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18  */
19 
20 /*
21  * PCI front-end for the Ralink RT2560/RT2561/RT2860/RT3090 driver.
22  */
23 #include <sys/cdefs.h>
24 __KERNEL_RCSID(0, "$NetBSD: if_ral_pci.c,v 1.23 2016/07/06 14:28:51 christos Exp $");
25 
26 
27 #include <sys/param.h>
28 #include <sys/sockio.h>
29 #include <sys/mbuf.h>
30 #include <sys/kernel.h>
31 #include <sys/socket.h>
32 #include <sys/systm.h>
33 #include <sys/malloc.h>
34 #include <sys/device.h>
35 
36 #include <sys/bus.h>
37 #include <sys/intr.h>
38 
39 #include <net/if.h>
40 #include <net/if_dl.h>
41 #include <net/if_media.h>
42 #include <net/if_ether.h>
43 
44 #include <netinet/in.h>
45 
46 #include <net80211/ieee80211_var.h>
47 #include <net80211/ieee80211_amrr.h>
48 #include <net80211/ieee80211_rssadapt.h>
49 #include <net80211/ieee80211_radiotap.h>
50 
51 #include <dev/ic/rt2560var.h>
52 #include <dev/ic/rt2661var.h>
53 #include <dev/ic/rt2860var.h>
54 
55 #include <dev/pci/pcireg.h>
56 #include <dev/pci/pcivar.h>
57 #include <dev/pci/pcidevs.h>
58 
59 #define RAL_POWER_MANAGEMENT 0	/* Disabled for now */
60 
61 static struct ral_opns {
62 	int	(*attach)(void *, int);
63 	int	(*detach)(void *);
64 #if RAL_POWER_MANAGEMENT
65 	void	(*suspend)(void *);
66 	void	(*wakeup)(void *);
67 #endif
68 	int	(*intr)(void *);
69 
70 }  ral_rt2560_opns = {
71 	rt2560_attach,
72 	rt2560_detach,
73 #if RAL_POWER_MANAGEMENT
74 	rt2560_suspend,
75 	rt2560_wakeup,
76 #endif
77 	rt2560_intr
78 
79 }, ral_rt2661_opns = {
80 	rt2661_attach,
81 	rt2661_detach,
82 #if RAL_POWER_MANAGEMENT
83 	rt2661_suspend,
84 	rt2661_wakeup,
85 #endif
86 	rt2661_intr
87 
88 }, ral_rt2860_opns = {
89 	rt2860_attach,
90 	rt2860_detach,
91 #if RAL_POWER_MANAGEMENT
92 	rt2860_suspend,
93 	rt2860_wakeup,
94 #endif
95 	rt2860_intr
96 };
97 
98 struct ral_pci_softc {
99 	union {
100 		struct rt2560_softc	sc_rt2560;
101 		struct rt2661_softc	sc_rt2661;
102 		struct rt2860_softc	sc_rt2860;
103 	} u;
104 #define sc_sc	u.sc_rt2560
105 
106 	/* PCI specific goo */
107 	struct ral_opns		*sc_opns;
108 	pci_chipset_tag_t	sc_pc;
109 	void			*sc_ih;
110 	bus_size_t		sc_mapsize;
111 };
112 
113 /* Base Address Register */
114 #define RAL_PCI_BAR0 PCI_BAR(0)
115 
116 int	ral_pci_match(device_t, cfdata_t, void *);
117 void	ral_pci_attach(device_t, device_t, void *);
118 int	ral_pci_detach(device_t, int);
119 #if RAL_POWER_MANAGEMENT
120 int	ral_pci_activate(struct device *, devact_t);
121 void	ral_pci_wakeup(struct ral_pci_softc *);
122 #else
123 #define ral_pci_activate NULL
124 #endif
125 
126 CFATTACH_DECL_NEW(ral_pci, sizeof (struct ral_pci_softc),
127 	ral_pci_match, ral_pci_attach, ral_pci_detach, ral_pci_activate);
128 
129 static const struct ral_pci_matchid {
130 	pci_vendor_id_t         ral_vendor;
131 	pci_product_id_t        ral_product;
132 } ral_pci_devices[] = {
133 	{ PCI_VENDOR_AWT,    PCI_PRODUCT_AWT_RT2890 },
134 	{ PCI_VENDOR_EDIMAX, PCI_PRODUCT_EDIMAX_RT2860_1 },
135 	{ PCI_VENDOR_EDIMAX, PCI_PRODUCT_EDIMAX_RT2860_2 },
136 	{ PCI_VENDOR_EDIMAX, PCI_PRODUCT_EDIMAX_RT2860_3 },
137 	{ PCI_VENDOR_EDIMAX, PCI_PRODUCT_EDIMAX_RT2860_4 },
138 	{ PCI_VENDOR_EDIMAX, PCI_PRODUCT_EDIMAX_RT2860_5 },
139 	{ PCI_VENDOR_EDIMAX, PCI_PRODUCT_EDIMAX_RT2860_6 },
140 	{ PCI_VENDOR_EDIMAX, PCI_PRODUCT_EDIMAX_RT2860_7 },
141 	{ PCI_VENDOR_EDIMAX, PCI_PRODUCT_EDIMAX_RT3591_1 },
142 	{ PCI_VENDOR_EDIMAX, PCI_PRODUCT_EDIMAX_RT3591_2 },
143 	{ PCI_VENDOR_MSI,    PCI_PRODUCT_AWT_RT2890 },
144 	{ PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2560 },
145 	{ PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2561 },
146 	{ PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2561S },
147 	{ PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2661 },
148 	{ PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2760 },
149 	{ PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2790 },
150 	{ PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2860 },
151 	{ PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT2890 },
152 	{ PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT3060 },
153 	{ PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT3062 },
154 	{ PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT3090 },
155 	{ PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT3091 },
156 	{ PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT3092 },
157 	{ PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT3562 },
158 	{ PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT3592 },
159 	{ PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT3593 },
160 	{ PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT5360 },
161 	{ PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT5362 },
162 	{ PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT5390_1 },
163 	{ PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT5390_2 },
164 	{ PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT5390_3 },
165 	{ PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT5390_4 },
166 	{ PCI_VENDOR_RALINK, PCI_PRODUCT_RALINK_RT5390_5 },
167 };
168 
169 int
170 ral_pci_match(device_t parent, cfdata_t cfdata,
171     void *aux)
172 {
173 	struct pci_attach_args *pa = aux;
174 
175 	for (size_t i = 0; i < __arraycount(ral_pci_devices); i++) {
176 		const struct ral_pci_matchid *ral = &ral_pci_devices[i];
177 		if (PCI_VENDOR(pa->pa_id) == ral->ral_vendor &&
178 		    PCI_PRODUCT(pa->pa_id) == ral->ral_product)
179 			return 1;
180 	}
181 
182 	return 0;
183 }
184 
185 void
186 ral_pci_attach(device_t parent, device_t self, void *aux)
187 {
188 	struct ral_pci_softc *psc = device_private(self);
189 	struct rt2560_softc *sc = &psc->sc_sc;
190 	const struct pci_attach_args *pa = aux;
191 	const char *intrstr;
192 	bus_addr_t base;
193 	pci_intr_handle_t ih;
194 	pcireg_t memtype, reg;
195 	int error;
196 	char intrbuf[PCI_INTRSTR_LEN];
197 
198 	pci_aprint_devinfo(pa, NULL);
199 
200 	if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_RALINK) {
201 		switch (PCI_PRODUCT(pa->pa_id)) {
202 		case PCI_PRODUCT_RALINK_RT2560:
203 			psc->sc_opns = &ral_rt2560_opns;
204 			break;
205 		case PCI_PRODUCT_RALINK_RT2561:
206 		case PCI_PRODUCT_RALINK_RT2561S:
207 		case PCI_PRODUCT_RALINK_RT2661:
208 			psc->sc_opns = &ral_rt2661_opns;
209 			break;
210 		default:
211 			psc->sc_opns = &ral_rt2860_opns;
212 			break;
213 		}
214 	} else {
215 		/* all other vendors are RT2860 only */
216 		psc->sc_opns = &ral_rt2860_opns;
217 	}
218 
219 	sc->sc_dev = self;
220 	sc->sc_dmat = pa->pa_dmat;
221 	psc->sc_pc = pa->pa_pc;
222 
223 	/* enable the appropriate bits in the PCI CSR */
224 	reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
225 	reg |= PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_MEM_ENABLE;
226 	pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, reg);
227 
228 	/* map control/status registers */
229 	memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, RAL_PCI_BAR0);
230 	error = pci_mapreg_map(pa, RAL_PCI_BAR0, memtype, 0, &sc->sc_st,
231 	    &sc->sc_sh, &base, &psc->sc_mapsize);
232 
233 	if (error != 0) {
234 		aprint_error(": could not map memory space\n");
235 		return;
236 	}
237 
238 	if (pci_intr_map(pa, &ih) != 0) {
239 		aprint_error(": could not map interrupt\n");
240 		return;
241 	}
242 
243 	intrstr = pci_intr_string(psc->sc_pc, ih, intrbuf, sizeof(intrbuf));
244 	psc->sc_ih = pci_intr_establish(psc->sc_pc, ih, IPL_NET,
245 	    psc->sc_opns->intr, sc);
246 
247 	if (psc->sc_ih == NULL) {
248 		aprint_error(": could not establish interrupt");
249 		if (intrstr != NULL)
250 			aprint_error(" at %s", intrstr);
251 		aprint_error("\n");
252 		return;
253 	}
254 	aprint_normal_dev(sc->sc_dev, "interrupting at %s\n", intrstr);
255 
256 	(*psc->sc_opns->attach)(sc, PCI_PRODUCT(pa->pa_id));
257 }
258 
259 int
260 ral_pci_detach(device_t self, int flags)
261 {
262 	struct ral_pci_softc *psc = device_private(self);
263 	struct rt2560_softc *sc = &psc->sc_sc;
264 	int error;
265 
266 	if (psc->sc_ih != NULL) {
267 		pci_intr_disestablish(psc->sc_pc, psc->sc_ih);
268 
269 		error = (*psc->sc_opns->detach)(sc);
270 		if (error != 0)
271 			return error;
272 	}
273 
274 	if (psc->sc_mapsize > 0)
275 		bus_space_unmap(sc->sc_st, sc->sc_sh, psc->sc_mapsize);
276 
277 	return 0;
278 }
279 
280 #if RAL_POWER_MANAGEMENT
281 int
282 ral_pci_activate(struct device *self, devact_t act)
283 {
284 	struct ral_pci_softc *psc = (struct ral_pci_softc *)self;
285 	struct rt2560_softc *sc = &psc->sc_sc;
286 
287 	switch (act) {
288 	case DVACT_SUSPEND:
289 		(*psc->sc_opns->suspend)(sc);
290 		break;
291 	case DVACT_WAKEUP:
292 		ral_pci_wakeup(psc);
293 		break;
294 	}
295 	return 0;
296 }
297 
298 void
299 ral_pci_wakeup(struct ral_pci_softc *psc)
300 {
301 	struct rt2560_softc *sc = &psc->sc_sc;
302 	int s;
303 
304 	s = splnet();
305 	(*psc->sc_opns->wakeup)(sc);
306 	splx(s);
307 }
308 #endif
309