1 /* $NetBSD: if_malo_pci.c,v 1.8 2021/05/08 00:27:02 thorpej Exp $ */ 2 /* $OpenBSD: if_malo_pci.c,v 1.6 2010/08/28 23:19:29 deraadt Exp $ */ 3 4 /* 5 * Copyright (c) 2006 Marcus Glocker <mglocker@openbsd.org> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 /* 21 * PCI front-end for the Marvell Libertas 22 */ 23 24 #include <sys/cdefs.h> 25 __KERNEL_RCSID(0, "$NetBSD: if_malo_pci.c,v 1.8 2021/05/08 00:27:02 thorpej Exp $"); 26 27 #include <sys/param.h> 28 #include <sys/sockio.h> 29 #include <sys/mbuf.h> 30 #include <sys/kernel.h> 31 #include <sys/socket.h> 32 #include <sys/systm.h> 33 #include <sys/malloc.h> 34 #include <sys/device.h> 35 #include <sys/bus.h> 36 37 #include <machine/intr.h> 38 39 #include <net/if.h> 40 #include <net/if_dl.h> 41 #include <net/if_media.h> 42 #include <net/if_ether.h> 43 44 #include <netinet/in.h> 45 46 #include <net80211/ieee80211_var.h> 47 #include <net80211/ieee80211_radiotap.h> 48 49 #include <dev/ic/malovar.h> 50 51 #include <dev/pci/pcireg.h> 52 #include <dev/pci/pcivar.h> 53 #include <dev/pci/pcidevs.h> 54 55 /* Base Address Register */ 56 #define MALO_PCI_BAR1 0x10 57 #define MALO_PCI_BAR2 0x14 58 59 static int malo_pci_match(device_t parent, cfdata_t match, void *aux); 60 static void malo_pci_attach(device_t, device_t, void *); 61 static int malo_pci_detach(device_t, int); 62 static bool malo_pci_suspend(device_t, const pmf_qual_t *); 63 static bool malo_pci_resume(device_t, const pmf_qual_t *); 64 65 struct malo_pci_softc { 66 struct malo_softc sc_malo; 67 68 pci_chipset_tag_t sc_pc; 69 void *sc_ih; 70 71 bus_size_t sc_mapsize1; 72 bus_size_t sc_mapsize2; 73 }; 74 75 CFATTACH_DECL_NEW(malo_pci, sizeof(struct malo_pci_softc), 76 malo_pci_match, malo_pci_attach, malo_pci_detach, NULL); 77 78 static const struct device_compatible_entry compat_data[] = { 79 { .id = PCI_ID_CODE(PCI_VENDOR_MARVELL, 80 PCI_PRODUCT_MARVELL_88W8310) }, 81 { .id = PCI_ID_CODE(PCI_VENDOR_MARVELL, 82 PCI_PRODUCT_MARVELL_88W8335_1) }, 83 { .id = PCI_ID_CODE(PCI_VENDOR_MARVELL, 84 PCI_PRODUCT_MARVELL_88W8335_2) }, 85 86 PCI_COMPAT_EOL 87 }; 88 89 static int 90 malo_pci_match(device_t parent, cfdata_t match, void *aux) 91 { 92 struct pci_attach_args *pa = aux; 93 94 return pci_compatible_match(pa, compat_data); 95 } 96 97 static void 98 malo_pci_attach(device_t parent, device_t self, void *aux) 99 { 100 struct malo_pci_softc *psc = device_private(self); 101 struct pci_attach_args *pa = aux; 102 struct malo_softc *sc = &psc->sc_malo; 103 const char *intrstr = NULL; 104 pci_intr_handle_t ih; 105 pcireg_t memtype1, memtype2; 106 int error; 107 char intrbuf[PCI_INTRSTR_LEN]; 108 109 sc->sc_dev = self; 110 sc->sc_dmat = pa->pa_dmat; 111 psc->sc_pc = pa->pa_pc; 112 113 aprint_normal("\n"); 114 aprint_normal_dev(self,"Marvell Libertas Wireless\n"); 115 116 /* map control / status registers */ 117 memtype1 = pci_mapreg_type(pa->pa_pc, pa->pa_tag, MALO_PCI_BAR1); 118 switch (memtype1) { 119 case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT: 120 case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_64BIT: 121 break; 122 default: 123 aprint_error_dev(self, "invalid base address register\n"); 124 return; 125 } 126 127 error = pci_mapreg_map(pa, MALO_PCI_BAR1, 128 memtype1, 0, &sc->sc_mem1_bt, &sc->sc_mem1_bh, 129 NULL, &psc->sc_mapsize1); 130 if (error != 0) { 131 aprint_error_dev(self, "can't map 1st mem space\n"); 132 return; 133 } 134 135 /* map control / status registers */ 136 memtype2 = pci_mapreg_type(pa->pa_pc, pa->pa_tag, MALO_PCI_BAR1); 137 switch (memtype2) { 138 case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT: 139 case PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_64BIT: 140 break; 141 default: 142 aprint_error_dev(self, "invalid base address register\n"); 143 goto unmap1; 144 } 145 146 error = pci_mapreg_map(pa, MALO_PCI_BAR2, 147 memtype2, 0, &sc->sc_mem2_bt, &sc->sc_mem2_bh, 148 NULL, &psc->sc_mapsize2); 149 if (error != 0) { 150 aprint_error_dev(self, "can't map 2nd mem space\n"); 151 goto unmap1; 152 } 153 154 sc->sc_soft_ih = softint_establish(SOFTINT_NET, malo_softintr, sc); 155 if (sc->sc_soft_ih == NULL) { 156 aprint_error_dev(self, "could not establish softint\n"); 157 goto unmap2; 158 } 159 160 /* map interrupt */ 161 if (pci_intr_map(pa, &ih) != 0) { 162 aprint_error_dev(self, "can't map interrupt\n"); 163 goto failsi; 164 } 165 166 /* establish interrupt */ 167 intrstr = pci_intr_string(psc->sc_pc, ih, intrbuf, sizeof(intrbuf)); 168 psc->sc_ih = pci_intr_establish_xname(psc->sc_pc, ih, IPL_NET, 169 malo_intr, sc, device_xname(self)); 170 if (psc->sc_ih == NULL) { 171 aprint_error_dev(self, "could not establish interrupt"); 172 if (intrstr != NULL) 173 aprint_error(" at %s", intrstr); 174 aprint_error("\n"); 175 goto failsi; 176 } 177 aprint_normal_dev(self, "interrupting at %s\n", intrstr); 178 179 if (malo_attach(sc)) 180 goto failih; 181 182 if (pmf_device_register(self, malo_pci_suspend, malo_pci_resume)) 183 pmf_class_network_register(self, &sc->sc_if); 184 else 185 aprint_error_dev(self, "couldn't establish power handler\n"); 186 return; 187 188 failih: pci_intr_disestablish(psc->sc_pc, psc->sc_ih); 189 psc->sc_ih = NULL; 190 failsi: softint_disestablish(sc->sc_soft_ih); 191 sc->sc_soft_ih = NULL; 192 unmap2: bus_space_unmap(sc->sc_mem2_bt, sc->sc_mem2_bh, psc->sc_mapsize2); 193 unmap1: bus_space_unmap(sc->sc_mem1_bt, sc->sc_mem1_bh, psc->sc_mapsize1); 194 } 195 196 int 197 malo_pci_detach(device_t self, int flags) 198 { 199 struct malo_pci_softc *psc = device_private(self); 200 struct malo_softc *sc = &psc->sc_malo; 201 202 malo_detach(sc); 203 if (psc->sc_ih != NULL) { 204 pci_intr_disestablish(psc->sc_pc, psc->sc_ih); 205 psc->sc_ih = NULL; 206 } 207 if (sc->sc_soft_ih != NULL) { 208 softint_disestablish(sc->sc_soft_ih); 209 sc->sc_soft_ih = NULL; 210 } 211 bus_space_unmap(sc->sc_mem2_bt, sc->sc_mem2_bh, psc->sc_mapsize2); 212 bus_space_unmap(sc->sc_mem1_bt, sc->sc_mem1_bh, psc->sc_mapsize1); 213 214 return (0); 215 } 216 217 static bool 218 malo_pci_suspend(device_t self, const pmf_qual_t *qual) 219 { 220 struct malo_pci_softc *psc = device_private(self); 221 struct malo_softc *sc = &psc->sc_malo; 222 struct ifnet *ifp = &sc->sc_if; 223 224 malo_stop(ifp, 1); 225 226 return true; 227 } 228 229 static bool 230 malo_pci_resume(device_t self, const pmf_qual_t *qual) 231 { 232 struct malo_pci_softc *psc = device_private(self); 233 struct malo_softc *sc = &psc->sc_malo; 234 struct ifnet *ifp = &sc->sc_if; 235 236 if (ifp->if_flags & IFF_UP) 237 malo_init(ifp); 238 239 return true; 240 } 241