xref: /netbsd-src/sys/dev/pci/if_hme_pci.c (revision 62a8debe1dc62962e18a1c918def78666141273b)
1 /*	$NetBSD: if_hme_pci.c,v 1.31 2010/01/20 22:58:37 martin Exp $	*/
2 
3 /*
4  * Copyright (c) 2000 Matthew R. Green
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  */
28 
29 /*
30  * PCI front-end device driver for the HME ethernet device.
31  */
32 
33 #include <sys/cdefs.h>
34 __KERNEL_RCSID(0, "$NetBSD: if_hme_pci.c,v 1.31 2010/01/20 22:58:37 martin Exp $");
35 
36 #include <sys/param.h>
37 #include <sys/systm.h>
38 #include <sys/syslog.h>
39 #include <sys/device.h>
40 #include <sys/malloc.h>
41 #include <sys/socket.h>
42 
43 #include <net/if.h>
44 #include <net/if_dl.h>
45 #include <net/if_ether.h>
46 #include <net/if_media.h>
47 
48 #include <dev/mii/mii.h>
49 #include <dev/mii/miivar.h>
50 
51 #include <sys/intr.h>
52 
53 #include <dev/pci/pcivar.h>
54 #include <dev/pci/pcireg.h>
55 #include <dev/pci/pcidevs.h>
56 
57 #include <dev/ic/hmevar.h>
58 
59 struct hme_pci_softc {
60 	struct	hme_softc	hsc_hme;	/* HME device */
61 	bus_space_tag_t		hsc_memt;
62 	bus_space_handle_t	hsc_memh;
63 	void			*hsc_ih;
64 };
65 
66 int	hmematch_pci(device_t, cfdata_t, void *);
67 void	hmeattach_pci(device_t, device_t, void *);
68 
69 CFATTACH_DECL_NEW(hme_pci, sizeof(struct hme_pci_softc),
70     hmematch_pci, hmeattach_pci, NULL, NULL);
71 
72 int
73 hmematch_pci(device_t parent, cfdata_t cf, void *aux)
74 {
75 	struct pci_attach_args *pa = aux;
76 
77 	if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SUN &&
78 	    PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_SUN_HMENETWORK)
79 		return (1);
80 
81 	return (0);
82 }
83 
84 static inline int
85 hmepromvalid(uint8_t* buf)
86 {
87 	return buf[0] == 0x18 && buf[1] == 0x00 &&	/* structure length */
88 	    buf[2] == 0x00 &&				/* revision */
89 	    (buf[3] == 0x00 ||				/* hme */
90 	     buf[3] == 0x80) &&				/* qfe */
91 	    buf[4] == PCI_SUBCLASS_NETWORK_ETHERNET &&	/* subclass code */
92 	    buf[5] == PCI_CLASS_NETWORK;		/* class code */
93 }
94 
95 static inline int
96 hmevpdoff(bus_space_tag_t romt, bus_space_handle_t romh, int vpdoff, int dev)
97 {
98 #define VPDLEN (3 + sizeof(struct pci_vpd) + ETHER_ADDR_LEN)
99 	if (bus_space_read_1(romt, romh, vpdoff + VPDLEN) != 0x79 &&
100 	    bus_space_read_1(romt, romh, vpdoff + 4 * VPDLEN) == 0x79) {
101 		/*
102 		 * Use the Nth NA for the Nth HME on
103 		 * this SUNW,qfe.
104 		 */
105 		vpdoff += dev * VPDLEN;
106 	}
107 	return vpdoff;
108 }
109 
110 void
111 hmeattach_pci(device_t parent, device_t self, void *aux)
112 {
113 	struct pci_attach_args *pa = aux;
114 	struct hme_pci_softc *hsc = device_private(self);
115 	struct hme_softc *sc = &hsc->hsc_hme;
116 	pci_intr_handle_t ih;
117 	pcireg_t csr;
118 	const char *intrstr;
119 	int type;
120 	struct pci_attach_args	ebus_pa;
121 	prop_data_t		eaddrprop;
122 	pcireg_t		ebus_cl, ebus_id;
123 	uint8_t			*enaddr;
124 	bus_space_tag_t		romt;
125 	bus_space_handle_t	romh;
126 	bus_size_t		romsize;
127 	uint8_t			buf[64];
128 	int			dataoff, vpdoff;
129 	struct pci_vpd		*vpd;
130 	static const uint8_t promhdr[] = { 0x55, 0xaa };
131 #define PROMHDR_PTR_DATA	0x18
132 	static const uint8_t promdat[] = {
133 		0x50, 0x43, 0x49, 0x52,		/* "PCIR" */
134 		PCI_VENDOR_SUN & 0xff, PCI_VENDOR_SUN >> 8,
135 		PCI_PRODUCT_SUN_HMENETWORK & 0xff,
136 		PCI_PRODUCT_SUN_HMENETWORK >> 8
137 	};
138 #define PROMDATA_PTR_VPD	0x08
139 #define PROMDATA_DATA2		0x0a
140 
141 	sc->sc_dev = self;
142 
143 	aprint_normal(": Sun Happy Meal Ethernet, rev. %d\n",
144 	    PCI_REVISION(pa->pa_class));
145 
146 	/*
147 	 * enable io/memory-space accesses.  this is kinda of gross; but
148 	 # the hme comes up with neither IO space enabled, or memory space.
149 	 */
150 	if (pa->pa_memt)
151 		pa->pa_flags |= PCI_FLAGS_MEM_ENABLED;
152 	if (pa->pa_iot)
153 		pa->pa_flags |= PCI_FLAGS_IO_ENABLED;
154 	csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
155 	if (pa->pa_memt) {
156 		type = PCI_MAPREG_TYPE_MEM;
157 		csr |= PCI_COMMAND_MEM_ENABLE;
158 		sc->sc_bustag = pa->pa_memt;
159 	} else {
160 		type = PCI_MAPREG_TYPE_IO;
161 		csr |= PCI_COMMAND_IO_ENABLE;
162 		sc->sc_bustag = pa->pa_iot;
163 	}
164 	pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
165 	    csr | PCI_COMMAND_MEM_ENABLE);
166 
167 	sc->sc_dmatag = pa->pa_dmat;
168 
169 	sc->sc_pci = 1; /* XXXXX should all be done in bus_dma. */
170 	/*
171 	 * Map five register banks:
172 	 *
173 	 *	bank 0: HME SEB registers:	+0x0000
174 	 *	bank 1: HME ETX registers:	+0x2000
175 	 *	bank 2: HME ERX registers:	+0x4000
176 	 *	bank 3: HME MAC registers:	+0x6000
177 	 *	bank 4: HME MIF registers:	+0x7000
178 	 *
179 	 */
180 
181 #define PCI_HME_BASEADDR	0x10
182 	if (pci_mapreg_map(pa, PCI_HME_BASEADDR, type, 0,
183 	    &hsc->hsc_memt, &hsc->hsc_memh, NULL, NULL) != 0) {
184 		aprint_error_dev(self, "unable to map device registers\n");
185 		return;
186 	}
187 	sc->sc_seb = hsc->hsc_memh;
188 	if (bus_space_subregion(hsc->hsc_memt, hsc->hsc_memh, 0x2000,
189 	    0x1000, &sc->sc_etx)) {
190 		aprint_error_dev(self, "unable to subregion ETX registers\n");
191 		return;
192 	}
193 	if (bus_space_subregion(hsc->hsc_memt, hsc->hsc_memh, 0x4000,
194 	    0x1000, &sc->sc_erx)) {
195 		aprint_error_dev(self, "unable to subregion ERX registers\n");
196 		return;
197 	}
198 	if (bus_space_subregion(hsc->hsc_memt, hsc->hsc_memh, 0x6000,
199 	    0x1000, &sc->sc_mac)) {
200 		aprint_error_dev(self, "unable to subregion MAC registers\n");
201 		return;
202 	}
203 	if (bus_space_subregion(hsc->hsc_memt, hsc->hsc_memh, 0x7000,
204 	    0x1000, &sc->sc_mif)) {
205 		aprint_error_dev(self, "unable to subregion MIF registers\n");
206 		return;
207 	}
208 
209 
210 	/*
211 	 * Check if we got a mac-address property passed
212 	 */
213 	eaddrprop = prop_dictionary_get(device_properties(self), "mac-address");
214 
215 	if (eaddrprop != NULL && prop_data_size(eaddrprop) == ETHER_ADDR_LEN) {
216 		memcpy(&sc->sc_enaddr, prop_data_data_nocopy(eaddrprop),
217 			    ETHER_ADDR_LEN);
218 		goto got_eaddr;
219 	}
220 
221 	/*
222 	 * Dig out VPD (vital product data) and acquire Ethernet address.
223 	 * The VPD of hme resides in the Boot PROM (PCI FCode) attached
224 	 * to the EBus interface.
225 	 */
226 	/*
227 	 * ``Writing FCode 3.x Programs'' (newer ones, dated 1997 and later)
228 	 * chapter 2 describes the data structure.
229 	 */
230 
231 	enaddr = NULL;
232 
233 	/* get a PCI tag for the EBus bridge (function 0 of the same device) */
234 	ebus_pa = *pa;
235 	ebus_pa.pa_tag = pci_make_tag(pa->pa_pc, pa->pa_bus, pa->pa_device, 0);
236 
237 	ebus_cl = pci_conf_read(ebus_pa.pa_pc, ebus_pa.pa_tag, PCI_CLASS_REG);
238 	ebus_id = pci_conf_read(ebus_pa.pa_pc, ebus_pa.pa_tag, PCI_ID_REG);
239 
240 #define PCI_EBUS2_BOOTROM	0x10
241 	if (PCI_CLASS(ebus_cl) == PCI_CLASS_BRIDGE &&
242 	    PCI_PRODUCT(ebus_id) == PCI_PRODUCT_SUN_EBUS &&
243 	    pci_mapreg_map(&ebus_pa, PCI_EBUS2_BOOTROM, PCI_MAPREG_TYPE_MEM,
244 		BUS_SPACE_MAP_CACHEABLE | BUS_SPACE_MAP_PREFETCHABLE,
245 		&romt, &romh, 0, &romsize) == 0) {
246 
247 		/* read PCI Expansion PROM Header */
248 		bus_space_read_region_1(romt, romh, 0, buf, sizeof buf);
249 		if (memcmp(buf, promhdr, sizeof promhdr) == 0 &&
250 		    (dataoff = (buf[PROMHDR_PTR_DATA] |
251 			(buf[PROMHDR_PTR_DATA + 1] << 8))) >= 0x1c) {
252 
253 			/* read PCI Expansion PROM Data */
254 			bus_space_read_region_1(romt, romh, dataoff,
255 			    buf, sizeof buf);
256 			if (memcmp(buf, promdat, sizeof promdat) == 0 &&
257 			    hmepromvalid(buf + PROMDATA_DATA2) &&
258 			    (vpdoff = (buf[PROMDATA_PTR_VPD] |
259 				(buf[PROMDATA_PTR_VPD + 1] << 8))) >= 0x1c) {
260 
261 				/*
262 				 * The VPD of hme is not in PCI 2.2 standard
263 				 * format.  The length in the resource header
264 				 * is in big endian, and resources are not
265 				 * properly terminated (only one resource
266 				 * and no end tag).
267 				 */
268 				vpdoff = hmevpdoff(romt, romh, vpdoff,
269 				    pa->pa_device);
270 				/* read PCI VPD */
271 				bus_space_read_region_1(romt, romh,
272 				    vpdoff, buf, sizeof buf);
273 				vpd = (void *)(buf + 3);
274 				if (PCI_VPDRES_ISLARGE(buf[0]) &&
275 				    PCI_VPDRES_LARGE_NAME(buf[0])
276 					== PCI_VPDRES_TYPE_VPD &&
277 				    /* buf[1] == 0 && buf[2] == 9 && */ /*len*/
278 				    vpd->vpd_key0 == 0x4e /* N */ &&
279 				    vpd->vpd_key1 == 0x41 /* A */ &&
280 				    vpd->vpd_len == ETHER_ADDR_LEN) {
281 					/*
282 					 * Ethernet address found
283 					 */
284 					enaddr = buf + 6;
285 				}
286 			}
287 		}
288 		bus_space_unmap(romt, romh, romsize);
289 	}
290 
291 	if (enaddr) {
292 		memcpy(sc->sc_enaddr, enaddr, ETHER_ADDR_LEN);
293 		goto got_eaddr;
294 	}
295 
296 	aprint_error_dev(self, "no Ethernet address found\n");
297 got_eaddr:
298 
299 	/*
300 	 * Map and establish our interrupt.
301 	 */
302 	if (pci_intr_map(pa, &ih) != 0) {
303 		aprint_error_dev(self, "unable to map interrupt\n");
304 		return;
305 	}
306 	intrstr = pci_intr_string(pa->pa_pc, ih);
307 	hsc->hsc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_NET, hme_intr, sc);
308 	if (hsc->hsc_ih == NULL) {
309 		aprint_error_dev(self, "unable to establish interrupt");
310 		if (intrstr != NULL)
311 			aprint_error(" at %s", intrstr);
312 		aprint_error("\n");
313 		return;
314 	}
315 	aprint_normal_dev(self, "interrupting at %s\n", intrstr);
316 
317 	sc->sc_burst = 16;	/* XXX */
318 
319 	/* Finish off the attach. */
320 	hme_config(sc);
321 }
322