1 /* $NetBSD: if_fxp_pci.c,v 1.12 2000/12/28 22:59:13 sommerfeld Exp $ */ 2 3 /*- 4 * Copyright (c) 1997, 1998, 1999, 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * PCI bus front-end for the Intel i82557 fast Ethernet controller 42 * driver. Works with Intel Etherexpress Pro 10+, 100B, 100+ cards. 43 */ 44 45 #include "opt_inet.h" 46 #include "opt_ns.h" 47 #include "bpfilter.h" 48 #include "rnd.h" 49 50 #include <sys/param.h> 51 #include <sys/systm.h> 52 #include <sys/mbuf.h> 53 #include <sys/malloc.h> 54 #include <sys/kernel.h> 55 #include <sys/socket.h> 56 #include <sys/ioctl.h> 57 #include <sys/errno.h> 58 #include <sys/device.h> 59 60 #if NRND > 0 61 #include <sys/rnd.h> 62 #endif 63 64 #include <machine/endian.h> 65 66 #include <net/if.h> 67 #include <net/if_dl.h> 68 #include <net/if_media.h> 69 #include <net/if_ether.h> 70 71 #if NBPFILTER > 0 72 #include <net/bpf.h> 73 #endif 74 75 #ifdef INET 76 #include <netinet/in.h> 77 #include <netinet/if_inarp.h> 78 #endif 79 80 #ifdef NS 81 #include <netns/ns.h> 82 #include <netns/ns_if.h> 83 #endif 84 85 #include <machine/bus.h> 86 #include <machine/intr.h> 87 88 #include <dev/mii/miivar.h> 89 90 #include <dev/ic/i82557reg.h> 91 #include <dev/ic/i82557var.h> 92 93 #include <dev/pci/pcivar.h> 94 #include <dev/pci/pcireg.h> 95 #include <dev/pci/pcidevs.h> 96 97 struct fxp_pci_softc { 98 struct fxp_softc psc_fxp; 99 100 pci_chipset_tag_t psc_pc; /* pci chipset tag */ 101 pcireg_t psc_regs[0x20>>2]; /* saved PCI config regs (sparse) */ 102 pcitag_t psc_tag; /* pci register tag */ 103 void *psc_powerhook; /* power hook */ 104 }; 105 106 int fxp_pci_match __P((struct device *, struct cfdata *, void *)); 107 void fxp_pci_attach __P((struct device *, struct device *, void *)); 108 109 static void fxp_pci_confreg_restore __P((struct fxp_pci_softc *psc)); 110 static void fxp_pci_power __P((int why, void *arg)); 111 112 struct cfattach fxp_pci_ca = { 113 sizeof(struct fxp_pci_softc), fxp_pci_match, fxp_pci_attach 114 }; 115 116 const struct fxp_pci_product { 117 u_int32_t fpp_prodid; /* PCI product ID */ 118 const char *fpp_name; /* device name */ 119 } fxp_pci_products[] = { 120 { PCI_PRODUCT_INTEL_82557, 121 "Intel i82557 Ethernet" }, 122 { PCI_PRODUCT_INTEL_82559ER, 123 "Intel i82559ER Ethernet" }, 124 { PCI_PRODUCT_INTEL_IN_BUSINESS, 125 "Intel InBusiness Ethernet" }, 126 { PCI_PRODUCT_INTEL_82801BA_LAN, 127 "Intel i82562 Ethernet" }, 128 { 0, 129 NULL }, 130 }; 131 132 const struct fxp_pci_product *fxp_pci_lookup 133 __P((const struct pci_attach_args *)); 134 135 const struct fxp_pci_product * 136 fxp_pci_lookup(pa) 137 const struct pci_attach_args *pa; 138 { 139 const struct fxp_pci_product *fpp; 140 141 if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_INTEL) 142 return (NULL); 143 144 for (fpp = fxp_pci_products; fpp->fpp_name != NULL; fpp++) 145 if (PCI_PRODUCT(pa->pa_id) == fpp->fpp_prodid) 146 return (fpp); 147 148 return (NULL); 149 } 150 151 int 152 fxp_pci_match(parent, match, aux) 153 struct device *parent; 154 struct cfdata *match; 155 void *aux; 156 { 157 struct pci_attach_args *pa = aux; 158 159 if (fxp_pci_lookup(pa) != NULL) 160 return (1); 161 162 return (0); 163 } 164 165 /* 166 * Restore PCI configuration registers that may have been clobbered. 167 * This is necessary due to bugs on the Sony VAIO Z505-series on-board 168 * ethernet, after an APM suspend/resume, as well as after an ACPI 169 * D3->D0 transition. We call this function from a power hook after 170 * APM resume events, as well as after the ACPI D3->D0 transition. 171 */ 172 static void 173 fxp_pci_confreg_restore(psc) 174 struct fxp_pci_softc *psc; 175 { 176 pcireg_t reg; 177 178 #if 0 179 /* 180 * Check to see if the command register is blank -- if so, then 181 * we'll assume that all the clobberable-registers have been 182 * clobbered. 183 */ 184 185 /* 186 * In general, the above metric is accurate. Unfortunately, 187 * it is inaccurate across a hibernation. Ideally APM/ACPI 188 * code should take note of hibernation events and execute 189 * a hibernation wakeup hook, but at present a hibernation wake 190 * is indistinguishable from a suspend wake. 191 */ 192 193 if (((reg = pci_conf_read(psc->psc_pc, psc->psc_tag, 194 PCI_COMMAND_STATUS_REG)) & 0xffff) != 0) 195 return; 196 #else 197 reg = pci_conf_read(psc->psc_pc, psc->psc_tag, PCI_COMMAND_STATUS_REG); 198 #endif 199 200 pci_conf_write(psc->psc_pc, psc->psc_tag, 201 PCI_COMMAND_STATUS_REG, 202 (reg & 0xffff0000) | 203 (psc->psc_regs[PCI_COMMAND_STATUS_REG>>2] & 0xffff)); 204 pci_conf_write(psc->psc_pc, psc->psc_tag, PCI_BHLC_REG, 205 psc->psc_regs[PCI_BHLC_REG>>2]); 206 pci_conf_write(psc->psc_pc, psc->psc_tag, PCI_MAPREG_START+0x0, 207 psc->psc_regs[(PCI_MAPREG_START+0x0)>>2]); 208 pci_conf_write(psc->psc_pc, psc->psc_tag, PCI_MAPREG_START+0x4, 209 psc->psc_regs[(PCI_MAPREG_START+0x4)>>2]); 210 pci_conf_write(psc->psc_pc, psc->psc_tag, PCI_MAPREG_START+0x8, 211 psc->psc_regs[(PCI_MAPREG_START+0x8)>>2]); 212 } 213 214 215 /* 216 * Power handler routine. Called when the system is transitioning into/out 217 * of power save modes. We restore the (bashed) PCI configuration registers 218 * on a resume. 219 */ 220 static void 221 fxp_pci_power(why, arg) 222 int why; 223 void *arg; 224 { 225 struct fxp_pci_softc *psc = arg; 226 227 if (why == PWR_RESUME) 228 fxp_pci_confreg_restore(psc); 229 230 } 231 232 233 void 234 fxp_pci_attach(parent, self, aux) 235 struct device *parent, *self; 236 void *aux; 237 { 238 struct fxp_pci_softc *psc = (struct fxp_pci_softc *)self; 239 struct fxp_softc *sc = (struct fxp_softc *)self; 240 struct pci_attach_args *pa = aux; 241 pci_chipset_tag_t pc = pa->pa_pc; 242 pci_intr_handle_t ih; 243 const struct fxp_pci_product *fpp; 244 const char *intrstr = NULL; 245 bus_space_tag_t iot, memt; 246 bus_space_handle_t ioh, memh; 247 int ioh_valid, memh_valid; 248 bus_addr_t addr; 249 bus_size_t size; 250 int flags; 251 int pci_pwrmgmt_cap_reg, pci_pwrmgmt_csr_reg; 252 253 sc->sc_enabled = 1; 254 sc->sc_enable = NULL; 255 sc->sc_disable = NULL; 256 257 /* 258 * Map control/status registers. 259 */ 260 ioh_valid = (pci_mapreg_map(pa, FXP_PCI_IOBA, 261 PCI_MAPREG_TYPE_IO, 0, 262 &iot, &ioh, NULL, NULL) == 0); 263 264 /* 265 * Version 2.1 of the PCI spec, page 196, "Address Maps": 266 * 267 * Prefetchable 268 * 269 * Set to one if there are no side effects on reads, the 270 * device returns all bytes regardless of the byte enables, 271 * and host bridges can merge processor writes into this 272 * range without causing errors. Bit must be set to zero 273 * otherwise. 274 * 275 * The 82557 incorrectly sets the "prefetchable" bit, resulting 276 * in errors on systems which will do merged reads and writes. 277 * These errors manifest themselves as all-bits-set when reading 278 * from the EEPROM or other < 4 byte registers. 279 * 280 * We must work around this problem by always forcing the mapping 281 * for memory space to be uncacheable. On systems which cannot 282 * create an uncacheable mapping (because the firmware mapped it 283 * into only cacheable/prefetchable space due to the "prefetchable" 284 * bit), we can fall back onto i/o mapped access. 285 */ 286 memh_valid = 0; 287 memt = pa->pa_memt; 288 if (((pa->pa_flags & PCI_FLAGS_MEM_ENABLED) != 0) && 289 pci_mapreg_info(pa->pa_pc, pa->pa_tag, FXP_PCI_MMBA, 290 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 291 &addr, &size, &flags) == 0) { 292 flags &= ~BUS_SPACE_MAP_PREFETCHABLE; 293 if (bus_space_map(memt, addr, size, flags, &memh) == 0) 294 memh_valid = 1; 295 } 296 297 if (memh_valid) { 298 sc->sc_st = memt; 299 sc->sc_sh = memh; 300 } else if (ioh_valid) { 301 sc->sc_st = iot; 302 sc->sc_sh = ioh; 303 } else { 304 printf(": unable to map device registers\n"); 305 return; 306 } 307 308 sc->sc_dmat = pa->pa_dmat; 309 310 fpp = fxp_pci_lookup(pa); 311 if (fpp == NULL) { 312 printf("\n"); 313 panic("fxp_pci_attach: impossible"); 314 } 315 316 /* 317 * XXX Perhaps report '557, '558, '559 based on revision? 318 */ 319 printf(": %s, rev %d\n", fpp->fpp_name, PCI_REVISION(pa->pa_class)); 320 321 /* Make sure bus-mastering is enabled. */ 322 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 323 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 324 PCI_COMMAND_MASTER_ENABLE); 325 326 /* 327 * Under some circumstances (such as APM suspend/resume 328 * cycles, and across ACPI power state changes), the 329 * i82257-family can lose the contents of critical PCI 330 * configuration registers, causing the card to be 331 * non-responsive and useless. This occurs on the Sony VAIO 332 * Z505-series, among others. Preserve them here so they can 333 * be later restored (by fxp_pci_confreg_restore()). 334 */ 335 psc->psc_pc = pc; 336 psc->psc_tag = pa->pa_tag; 337 psc->psc_regs[PCI_COMMAND_STATUS_REG>>2] = 338 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 339 psc->psc_regs[PCI_BHLC_REG>>2] = 340 pci_conf_read(pc, pa->pa_tag, PCI_BHLC_REG); 341 psc->psc_regs[(PCI_MAPREG_START+0x0)>>2] = 342 pci_conf_read(pc, pa->pa_tag, PCI_MAPREG_START+0x0); 343 psc->psc_regs[(PCI_MAPREG_START+0x4)>>2] = 344 pci_conf_read(pc, pa->pa_tag, PCI_MAPREG_START+0x4); 345 psc->psc_regs[(PCI_MAPREG_START+0x8)>>2] = 346 pci_conf_read(pc, pa->pa_tag, PCI_MAPREG_START+0x8); 347 348 /* 349 * Work around BIOS ACPI bugs where the chip is inadvertantly 350 * left in ACPI D3 (lowest power state). First confirm the device 351 * supports ACPI power management, then move it to the D0 (fully 352 * functional) state if it is not already there. 353 */ 354 if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PWRMGMT, 355 &pci_pwrmgmt_cap_reg, 0)) { 356 pcireg_t reg; 357 358 pci_pwrmgmt_csr_reg = pci_pwrmgmt_cap_reg + 4; 359 reg = pci_conf_read(pc, pa->pa_tag, pci_pwrmgmt_csr_reg); 360 if ((reg & PCI_PMCSR_STATE_MASK) != PCI_PMCSR_STATE_D0) { 361 pci_conf_write(pc, pa->pa_tag, pci_pwrmgmt_csr_reg, 362 (reg & ~PCI_PMCSR_STATE_MASK) | 363 PCI_PMCSR_STATE_D0); 364 } 365 } 366 /* Restore PCI configuration registers. */ 367 fxp_pci_confreg_restore(psc); 368 369 /* 370 * Map and establish our interrupt. 371 */ 372 if (pci_intr_map(pa, &ih)) { 373 printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname); 374 return; 375 } 376 intrstr = pci_intr_string(pc, ih); 377 sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, fxp_intr, sc); 378 if (sc->sc_ih == NULL) { 379 printf("%s: couldn't establish interrupt", 380 sc->sc_dev.dv_xname); 381 if (intrstr != NULL) 382 printf(" at %s", intrstr); 383 printf("\n"); 384 return; 385 } 386 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 387 388 /* Finish off the attach. */ 389 fxp_attach(sc); 390 391 /* Add a suspend hook to restore PCI config state */ 392 psc->psc_powerhook = powerhook_establish(fxp_pci_power, psc); 393 if (psc->psc_powerhook == NULL) 394 printf ("%s: WARNING: unable to establish pci power hook\n", 395 sc->sc_dev.dv_xname); 396 397 } 398