1 /* $NetBSD: if_fxp_pci.c,v 1.9 2000/07/09 00:46:26 mycroft Exp $ */ 2 3 /*- 4 * Copyright (c) 1997, 1998, 1999, 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * PCI bus front-end for the Intel i82557 fast Ethernet controller 42 * driver. Works with Intel Etherexpress Pro 10+, 100B, 100+ cards. 43 */ 44 45 #include "opt_inet.h" 46 #include "opt_ns.h" 47 #include "bpfilter.h" 48 #include "rnd.h" 49 50 #include <sys/param.h> 51 #include <sys/systm.h> 52 #include <sys/mbuf.h> 53 #include <sys/malloc.h> 54 #include <sys/kernel.h> 55 #include <sys/socket.h> 56 #include <sys/ioctl.h> 57 #include <sys/errno.h> 58 #include <sys/device.h> 59 60 #if NRND > 0 61 #include <sys/rnd.h> 62 #endif 63 64 #include <machine/endian.h> 65 66 #include <net/if.h> 67 #include <net/if_dl.h> 68 #include <net/if_media.h> 69 #include <net/if_ether.h> 70 71 #if NBPFILTER > 0 72 #include <net/bpf.h> 73 #endif 74 75 #ifdef INET 76 #include <netinet/in.h> 77 #include <netinet/if_inarp.h> 78 #endif 79 80 #ifdef NS 81 #include <netns/ns.h> 82 #include <netns/ns_if.h> 83 #endif 84 85 #include <machine/bus.h> 86 #include <machine/intr.h> 87 88 #include <dev/mii/miivar.h> 89 90 #include <dev/ic/i82557reg.h> 91 #include <dev/ic/i82557var.h> 92 93 #include <dev/pci/pcivar.h> 94 #include <dev/pci/pcireg.h> 95 #include <dev/pci/pcidevs.h> 96 97 struct fxp_pci_softc { 98 struct fxp_softc psc_fxp; 99 100 pci_chipset_tag_t psc_pc; /* pci chipset tag */ 101 pcireg_t psc_regs[0x20>>2]; /* saved PCI config regs (sparse) */ 102 pcitag_t psc_tag; /* pci register tag */ 103 void *psc_powerhook; /* power hook */ 104 }; 105 106 int fxp_pci_match __P((struct device *, struct cfdata *, void *)); 107 void fxp_pci_attach __P((struct device *, struct device *, void *)); 108 109 static void fxp_pci_confreg_restore __P((struct fxp_pci_softc *psc)); 110 static void fxp_pci_power __P((int why, void *arg)); 111 112 struct cfattach fxp_pci_ca = { 113 sizeof(struct fxp_pci_softc), fxp_pci_match, fxp_pci_attach 114 }; 115 116 const struct fxp_pci_product { 117 u_int32_t fpp_prodid; /* PCI product ID */ 118 const char *fpp_name; /* device name */ 119 } fxp_pci_products[] = { 120 { PCI_PRODUCT_INTEL_82557, 121 "Intel i82557 Ethernet" }, 122 { PCI_PRODUCT_INTEL_82559ER, 123 "Intel i82559ER Ethernet" }, 124 { PCI_PRODUCT_INTEL_IN_BUSINESS, 125 "Intel InBusiness Ethernet" }, 126 127 { 0, 128 NULL }, 129 }; 130 131 const struct fxp_pci_product *fxp_pci_lookup 132 __P((const struct pci_attach_args *)); 133 134 const struct fxp_pci_product * 135 fxp_pci_lookup(pa) 136 const struct pci_attach_args *pa; 137 { 138 const struct fxp_pci_product *fpp; 139 140 if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_INTEL) 141 return (NULL); 142 143 for (fpp = fxp_pci_products; fpp->fpp_name != NULL; fpp++) 144 if (PCI_PRODUCT(pa->pa_id) == fpp->fpp_prodid) 145 return (fpp); 146 147 return (NULL); 148 } 149 150 int 151 fxp_pci_match(parent, match, aux) 152 struct device *parent; 153 struct cfdata *match; 154 void *aux; 155 { 156 struct pci_attach_args *pa = aux; 157 158 if (fxp_pci_lookup(pa) != NULL) 159 return (1); 160 161 return (0); 162 } 163 164 /* 165 * Restore PCI configuration registers that may have been clobbered. 166 * This is necessary due to bugs on the Sony VAIO Z505-series on-board 167 * ethernet, after an APM suspend/resume, as well as after an ACPI 168 * D3->D0 transition. We call this function from a power hook after 169 * APM resume events, as well as after the ACPI D3->D0 transition. 170 */ 171 static void 172 fxp_pci_confreg_restore(psc) 173 struct fxp_pci_softc *psc; 174 { 175 pcireg_t reg; 176 177 #if 0 178 /* 179 * Check to see if the command register is blank -- if so, then 180 * we'll assume that all the clobberable-registers have been 181 * clobbered. 182 */ 183 184 /* 185 * In general, the above metric is accurate. Unfortunately, 186 * it is inaccurate across a hibernation. Ideally APM/ACPI 187 * code should take note of hibernation events and execute 188 * a hibernation wakeup hook, but at present a hibernation wake 189 * is indistinguishable from a suspend wake. 190 */ 191 192 if (((reg = pci_conf_read(psc->psc_pc, psc->psc_tag, 193 PCI_COMMAND_STATUS_REG)) & 0xffff) != 0) 194 return; 195 #endif 196 197 pci_conf_write(psc->psc_pc, psc->psc_tag, 198 PCI_COMMAND_STATUS_REG, 199 (reg & 0xffff0000) | 200 (psc->psc_regs[PCI_COMMAND_STATUS_REG>>2] & 0xffff)); 201 pci_conf_write(psc->psc_pc, psc->psc_tag, PCI_BHLC_REG, 202 psc->psc_regs[PCI_BHLC_REG>>2]); 203 pci_conf_write(psc->psc_pc, psc->psc_tag, PCI_MAPREG_START+0x0, 204 psc->psc_regs[(PCI_MAPREG_START+0x0)>>2]); 205 pci_conf_write(psc->psc_pc, psc->psc_tag, PCI_MAPREG_START+0x4, 206 psc->psc_regs[(PCI_MAPREG_START+0x4)>>2]); 207 pci_conf_write(psc->psc_pc, psc->psc_tag, PCI_MAPREG_START+0x8, 208 psc->psc_regs[(PCI_MAPREG_START+0x8)>>2]); 209 } 210 211 212 /* 213 * Power handler routine. Called when the system is transitioning into/out 214 * of power save modes. We restore the (bashed) PCI configuration registers 215 * on a resume. 216 */ 217 static void 218 fxp_pci_power(why, arg) 219 int why; 220 void *arg; 221 { 222 struct fxp_pci_softc *psc = arg; 223 224 if (why == PWR_RESUME) 225 fxp_pci_confreg_restore(psc); 226 227 } 228 229 230 void 231 fxp_pci_attach(parent, self, aux) 232 struct device *parent, *self; 233 void *aux; 234 { 235 struct fxp_pci_softc *psc = (struct fxp_pci_softc *)self; 236 struct fxp_softc *sc = (struct fxp_softc *)self; 237 struct pci_attach_args *pa = aux; 238 pci_chipset_tag_t pc = pa->pa_pc; 239 pci_intr_handle_t ih; 240 const struct fxp_pci_product *fpp; 241 const char *intrstr = NULL; 242 bus_space_tag_t iot, memt; 243 bus_space_handle_t ioh, memh; 244 int ioh_valid, memh_valid; 245 bus_addr_t addr; 246 bus_size_t size; 247 int flags; 248 int pci_pwrmgmt_cap_reg, pci_pwrmgmt_csr_reg; 249 250 sc->sc_enabled = 1; 251 sc->sc_enable = NULL; 252 sc->sc_disable = NULL; 253 254 /* 255 * Map control/status registers. 256 */ 257 ioh_valid = (pci_mapreg_map(pa, FXP_PCI_IOBA, 258 PCI_MAPREG_TYPE_IO, 0, 259 &iot, &ioh, NULL, NULL) == 0); 260 261 /* 262 * Version 2.1 of the PCI spec, page 196, "Address Maps": 263 * 264 * Prefetchable 265 * 266 * Set to one if there are no side effects on reads, the 267 * device returns all bytes regardless of the byte enables, 268 * and host bridges can merge processor writes into this 269 * range without causing errors. Bit must be set to zero 270 * otherwise. 271 * 272 * The 82557 incorrectly sets the "prefetchable" bit, resulting 273 * in errors on systems which will do merged reads and writes. 274 * These errors manifest themselves as all-bits-set when reading 275 * from the EEPROM or other < 4 byte registers. 276 * 277 * We must work around this problem by always forcing the mapping 278 * for memory space to be uncacheable. On systems which cannot 279 * create an uncacheable mapping (because the firmware mapped it 280 * into only cacheable/prefetchable space due to the "prefetchable" 281 * bit), we can fall back onto i/o mapped access. 282 */ 283 memh_valid = 0; 284 memt = pa->pa_memt; 285 if (((pa->pa_flags & PCI_FLAGS_MEM_ENABLED) != 0) && 286 pci_mapreg_info(pa->pa_pc, pa->pa_tag, FXP_PCI_MMBA, 287 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 288 &addr, &size, &flags) == 0) { 289 flags &= ~BUS_SPACE_MAP_PREFETCHABLE; 290 if (bus_space_map(memt, addr, size, flags, &memh) == 0) 291 memh_valid = 1; 292 } 293 294 if (memh_valid) { 295 sc->sc_st = memt; 296 sc->sc_sh = memh; 297 } else if (ioh_valid) { 298 sc->sc_st = iot; 299 sc->sc_sh = ioh; 300 } else { 301 printf(": unable to map device registers\n"); 302 return; 303 } 304 305 sc->sc_dmat = pa->pa_dmat; 306 307 fpp = fxp_pci_lookup(pa); 308 if (fpp == NULL) { 309 printf("\n"); 310 panic("fxp_pci_attach: impossible"); 311 } 312 313 /* 314 * XXX Perhaps report '557, '558, '559 based on revision? 315 */ 316 printf(": %s, rev %d\n", fpp->fpp_name, PCI_REVISION(pa->pa_class)); 317 318 /* Make sure bus-mastering is enabled. */ 319 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 320 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 321 PCI_COMMAND_MASTER_ENABLE); 322 323 /* 324 * Under some circumstances (such as APM suspend/resume 325 * cycles, and across ACPI power state changes), the 326 * i82257-family can lose the contents of critical PCI 327 * configuration registers, causing the card to be 328 * non-responsive and useless. This occurs on the Sony VAIO 329 * Z505-series, among others. Preserve them here so they can 330 * be later restored (by fxp_pci_confreg_restore()). 331 */ 332 psc->psc_pc = pc; 333 psc->psc_tag = pa->pa_tag; 334 psc->psc_regs[PCI_COMMAND_STATUS_REG>>2] = 335 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 336 psc->psc_regs[PCI_BHLC_REG>>2] = 337 pci_conf_read(pc, pa->pa_tag, PCI_BHLC_REG); 338 psc->psc_regs[(PCI_MAPREG_START+0x0)>>2] = 339 pci_conf_read(pc, pa->pa_tag, PCI_MAPREG_START+0x0); 340 psc->psc_regs[(PCI_MAPREG_START+0x4)>>2] = 341 pci_conf_read(pc, pa->pa_tag, PCI_MAPREG_START+0x4); 342 psc->psc_regs[(PCI_MAPREG_START+0x8)>>2] = 343 pci_conf_read(pc, pa->pa_tag, PCI_MAPREG_START+0x8); 344 345 /* 346 * Work around BIOS ACPI bugs where the chip is inadvertantly 347 * left in ACPI D3 (lowest power state). First confirm the device 348 * supports ACPI power management, then move it to the D0 (fully 349 * functional) state if it is not already there. 350 */ 351 if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PWRMGMT, 352 &pci_pwrmgmt_cap_reg, 0)) { 353 pcireg_t reg; 354 355 pci_pwrmgmt_csr_reg = pci_pwrmgmt_cap_reg + 4; 356 reg = pci_conf_read(pc, pa->pa_tag, pci_pwrmgmt_csr_reg); 357 if ((reg & PCI_PMCSR_STATE_MASK) != PCI_PMCSR_STATE_D0) { 358 pci_conf_write(pc, pa->pa_tag, pci_pwrmgmt_csr_reg, 359 (reg & ~PCI_PMCSR_STATE_MASK) | 360 PCI_PMCSR_STATE_D0); 361 } 362 } 363 /* Restore PCI configuration registers. */ 364 fxp_pci_confreg_restore(psc); 365 366 /* 367 * Map and establish our interrupt. 368 */ 369 if (pci_intr_map(pc, pa->pa_intrtag, pa->pa_intrpin, 370 pa->pa_intrline, &ih)) { 371 printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname); 372 return; 373 } 374 intrstr = pci_intr_string(pc, ih); 375 sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, fxp_intr, sc); 376 if (sc->sc_ih == NULL) { 377 printf("%s: couldn't establish interrupt", 378 sc->sc_dev.dv_xname); 379 if (intrstr != NULL) 380 printf(" at %s", intrstr); 381 printf("\n"); 382 return; 383 } 384 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 385 386 /* Finish off the attach. */ 387 fxp_attach(sc); 388 389 /* Add a suspend hook to restore PCI config state */ 390 psc->psc_powerhook = powerhook_establish(fxp_pci_power, psc); 391 if (psc->psc_powerhook == NULL) 392 printf ("%s: WARNING: unable to establish pci power hook\n", 393 sc->sc_dev.dv_xname); 394 395 } 396