1 /* $NetBSD: if_fxp_pci.c,v 1.8 2000/05/12 18:46:34 jhawk Exp $ */ 2 3 /*- 4 * Copyright (c) 1997, 1998, 1999, 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * PCI bus front-end for the Intel i82557 fast Ethernet controller 42 * driver. Works with Intel Etherexpress Pro 10+, 100B, 100+ cards. 43 */ 44 45 #include "opt_inet.h" 46 #include "opt_ns.h" 47 #include "bpfilter.h" 48 #include "rnd.h" 49 50 #include <sys/param.h> 51 #include <sys/systm.h> 52 #include <sys/mbuf.h> 53 #include <sys/malloc.h> 54 #include <sys/kernel.h> 55 #include <sys/socket.h> 56 #include <sys/ioctl.h> 57 #include <sys/errno.h> 58 #include <sys/device.h> 59 60 #if NRND > 0 61 #include <sys/rnd.h> 62 #endif 63 64 #include <machine/endian.h> 65 66 #include <net/if.h> 67 #include <net/if_dl.h> 68 #include <net/if_media.h> 69 #include <net/if_ether.h> 70 71 #if NBPFILTER > 0 72 #include <net/bpf.h> 73 #endif 74 75 #ifdef INET 76 #include <netinet/in.h> 77 #include <netinet/if_inarp.h> 78 #endif 79 80 #ifdef NS 81 #include <netns/ns.h> 82 #include <netns/ns_if.h> 83 #endif 84 85 #include <machine/bus.h> 86 #include <machine/intr.h> 87 88 #include <dev/mii/miivar.h> 89 90 #include <dev/ic/i82557reg.h> 91 #include <dev/ic/i82557var.h> 92 93 #include <dev/pci/pcivar.h> 94 #include <dev/pci/pcireg.h> 95 #include <dev/pci/pcidevs.h> 96 97 struct fxp_pci_softc { 98 struct fxp_softc psc_fxp; 99 100 pci_chipset_tag_t psc_pc; /* pci chipset tag */ 101 pcireg_t psc_regs[0x20>>2]; /* saved PCI config regs (sparse) */ 102 pcitag_t psc_tag; /* pci register tag */ 103 void *psc_powerhook; /* power hook */ 104 }; 105 106 int fxp_pci_match __P((struct device *, struct cfdata *, void *)); 107 void fxp_pci_attach __P((struct device *, struct device *, void *)); 108 109 static void fxp_pci_confreg_restore __P((struct fxp_pci_softc *psc)); 110 static void fxp_pci_power __P((int why, void *arg)); 111 112 struct cfattach fxp_pci_ca = { 113 sizeof(struct fxp_pci_softc), fxp_pci_match, fxp_pci_attach 114 }; 115 116 const struct fxp_pci_product { 117 u_int32_t fpp_prodid; /* PCI product ID */ 118 const char *fpp_name; /* device name */ 119 } fxp_pci_products[] = { 120 { PCI_PRODUCT_INTEL_82557, 121 "Intel i82557 Ethernet" }, 122 { PCI_PRODUCT_INTEL_IN_BUSINESS, 123 "Intel InBusiness Ethernet" }, 124 125 { 0, 126 NULL }, 127 }; 128 129 const struct fxp_pci_product *fxp_pci_lookup 130 __P((const struct pci_attach_args *)); 131 132 const struct fxp_pci_product * 133 fxp_pci_lookup(pa) 134 const struct pci_attach_args *pa; 135 { 136 const struct fxp_pci_product *fpp; 137 138 if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_INTEL) 139 return (NULL); 140 141 for (fpp = fxp_pci_products; fpp->fpp_name != NULL; fpp++) 142 if (PCI_PRODUCT(pa->pa_id) == fpp->fpp_prodid) 143 return (fpp); 144 145 return (NULL); 146 } 147 148 int 149 fxp_pci_match(parent, match, aux) 150 struct device *parent; 151 struct cfdata *match; 152 void *aux; 153 { 154 struct pci_attach_args *pa = aux; 155 156 if (fxp_pci_lookup(pa) != NULL) 157 return (1); 158 159 return (0); 160 } 161 162 /* 163 * Restore PCI configuration registers that may have been clobbered. 164 * This is necessary due to bugs on the Sony VAIO Z505-series on-board 165 * ethernet, after an APM suspend/resume, as well as after an ACPI 166 * D3->D0 transition. We call this function from a power hook after 167 * APM resume events, as well as after the ACPI D3->D0 transition. 168 */ 169 static void 170 fxp_pci_confreg_restore(psc) 171 struct fxp_pci_softc *psc; 172 { 173 pcireg_t reg; 174 175 #if 0 176 /* 177 * Check to see if the command register is blank -- if so, then 178 * we'll assume that all the clobberable-registers have been 179 * clobbered. 180 */ 181 182 /* 183 * In general, the above metric is accurate. Unfortunately, 184 * it is inaccurate across a hibernation. Ideally APM/ACPI 185 * code should take note of hibernation events and execute 186 * a hibernation wakeup hook, but at present a hibernation wake 187 * is indistinguishable from a suspend wake. 188 */ 189 190 if (((reg = pci_conf_read(psc->psc_pc, psc->psc_tag, 191 PCI_COMMAND_STATUS_REG)) & 0xffff) != 0) 192 return; 193 #endif 194 195 pci_conf_write(psc->psc_pc, psc->psc_tag, 196 PCI_COMMAND_STATUS_REG, 197 (reg & 0xffff0000) | 198 (psc->psc_regs[PCI_COMMAND_STATUS_REG>>2] & 0xffff)); 199 pci_conf_write(psc->psc_pc, psc->psc_tag, PCI_BHLC_REG, 200 psc->psc_regs[PCI_BHLC_REG>>2]); 201 pci_conf_write(psc->psc_pc, psc->psc_tag, PCI_MAPREG_START+0x0, 202 psc->psc_regs[(PCI_MAPREG_START+0x0)>>2]); 203 pci_conf_write(psc->psc_pc, psc->psc_tag, PCI_MAPREG_START+0x4, 204 psc->psc_regs[(PCI_MAPREG_START+0x4)>>2]); 205 pci_conf_write(psc->psc_pc, psc->psc_tag, PCI_MAPREG_START+0x8, 206 psc->psc_regs[(PCI_MAPREG_START+0x8)>>2]); 207 } 208 209 210 /* 211 * Power handler routine. Called when the system is transitioning into/out 212 * of power save modes. We restore the (bashed) PCI configuration registers 213 * on a resume. 214 */ 215 static void 216 fxp_pci_power(why, arg) 217 int why; 218 void *arg; 219 { 220 struct fxp_pci_softc *psc = arg; 221 222 if (why == PWR_RESUME) 223 fxp_pci_confreg_restore(psc); 224 225 } 226 227 228 void 229 fxp_pci_attach(parent, self, aux) 230 struct device *parent, *self; 231 void *aux; 232 { 233 struct fxp_pci_softc *psc = (struct fxp_pci_softc *)self; 234 struct fxp_softc *sc = (struct fxp_softc *)self; 235 struct pci_attach_args *pa = aux; 236 pci_chipset_tag_t pc = pa->pa_pc; 237 pci_intr_handle_t ih; 238 const struct fxp_pci_product *fpp; 239 const char *intrstr = NULL; 240 bus_space_tag_t iot, memt; 241 bus_space_handle_t ioh, memh; 242 int ioh_valid, memh_valid; 243 bus_addr_t addr; 244 bus_size_t size; 245 int flags; 246 int pci_pwrmgmt_cap_reg, pci_pwrmgmt_csr_reg; 247 248 sc->sc_enabled = 1; 249 sc->sc_enable = NULL; 250 sc->sc_disable = NULL; 251 252 /* 253 * Map control/status registers. 254 */ 255 ioh_valid = (pci_mapreg_map(pa, FXP_PCI_IOBA, 256 PCI_MAPREG_TYPE_IO, 0, 257 &iot, &ioh, NULL, NULL) == 0); 258 259 /* 260 * Version 2.1 of the PCI spec, page 196, "Address Maps": 261 * 262 * Prefetchable 263 * 264 * Set to one if there are no side effects on reads, the 265 * device returns all bytes regardless of the byte enables, 266 * and host bridges can merge processor writes into this 267 * range without causing errors. Bit must be set to zero 268 * otherwise. 269 * 270 * The 82557 incorrectly sets the "prefetchable" bit, resulting 271 * in errors on systems which will do merged reads and writes. 272 * These errors manifest themselves as all-bits-set when reading 273 * from the EEPROM or other < 4 byte registers. 274 * 275 * We must work around this problem by always forcing the mapping 276 * for memory space to be uncacheable. On systems which cannot 277 * create an uncacheable mapping (because the firmware mapped it 278 * into only cacheable/prefetchable space due to the "prefetchable" 279 * bit), we can fall back onto i/o mapped access. 280 */ 281 memh_valid = 0; 282 memt = pa->pa_memt; 283 if (((pa->pa_flags & PCI_FLAGS_MEM_ENABLED) != 0) && 284 pci_mapreg_info(pa->pa_pc, pa->pa_tag, FXP_PCI_MMBA, 285 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 286 &addr, &size, &flags) == 0) { 287 flags &= ~BUS_SPACE_MAP_PREFETCHABLE; 288 if (bus_space_map(memt, addr, size, flags, &memh) == 0) 289 memh_valid = 1; 290 } 291 292 if (memh_valid) { 293 sc->sc_st = memt; 294 sc->sc_sh = memh; 295 } else if (ioh_valid) { 296 sc->sc_st = iot; 297 sc->sc_sh = ioh; 298 } else { 299 printf(": unable to map device registers\n"); 300 return; 301 } 302 303 sc->sc_dmat = pa->pa_dmat; 304 305 fpp = fxp_pci_lookup(pa); 306 if (fpp == NULL) { 307 printf("\n"); 308 panic("fxp_pci_attach: impossible"); 309 } 310 311 /* 312 * XXX Perhaps report '557, '558, '559 based on revision? 313 */ 314 printf(": %s, rev %d\n", fpp->fpp_name, PCI_REVISION(pa->pa_class)); 315 316 /* Make sure bus-mastering is enabled. */ 317 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 318 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 319 PCI_COMMAND_MASTER_ENABLE); 320 321 /* 322 * Under some circumstances (such as APM suspend/resume 323 * cycles, and across ACPI power state changes), the 324 * i82257-family can lose the contents of critical PCI 325 * configuration registers, causing the card to be 326 * non-responsive and useless. This occurs on the Sony VAIO 327 * Z505-series, among others. Preserve them here so they can 328 * be later restored (by fxp_pci_confreg_restore()). 329 */ 330 psc->psc_pc = pc; 331 psc->psc_tag = pa->pa_tag; 332 psc->psc_regs[PCI_COMMAND_STATUS_REG>>2] = 333 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 334 psc->psc_regs[PCI_BHLC_REG>>2] = 335 pci_conf_read(pc, pa->pa_tag, PCI_BHLC_REG); 336 psc->psc_regs[(PCI_MAPREG_START+0x0)>>2] = 337 pci_conf_read(pc, pa->pa_tag, PCI_MAPREG_START+0x0); 338 psc->psc_regs[(PCI_MAPREG_START+0x4)>>2] = 339 pci_conf_read(pc, pa->pa_tag, PCI_MAPREG_START+0x4); 340 psc->psc_regs[(PCI_MAPREG_START+0x8)>>2] = 341 pci_conf_read(pc, pa->pa_tag, PCI_MAPREG_START+0x8); 342 343 /* 344 * Work around BIOS ACPI bugs where the chip is inadvertantly 345 * left in ACPI D3 (lowest power state). First confirm the device 346 * supports ACPI power management, then move it to the D0 (fully 347 * functional) state if it is not already there. 348 */ 349 if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PWRMGMT, 350 &pci_pwrmgmt_cap_reg, 0)) { 351 pcireg_t reg; 352 353 pci_pwrmgmt_csr_reg = pci_pwrmgmt_cap_reg + 4; 354 reg = pci_conf_read(pc, pa->pa_tag, pci_pwrmgmt_csr_reg); 355 if ((reg & PCI_PMCSR_STATE_MASK) != PCI_PMCSR_STATE_D0) { 356 pci_conf_write(pc, pa->pa_tag, pci_pwrmgmt_csr_reg, 357 (reg & ~PCI_PMCSR_STATE_MASK) | 358 PCI_PMCSR_STATE_D0); 359 } 360 } 361 /* Restore PCI configuration registers. */ 362 fxp_pci_confreg_restore(psc); 363 364 /* 365 * Map and establish our interrupt. 366 */ 367 if (pci_intr_map(pc, pa->pa_intrtag, pa->pa_intrpin, 368 pa->pa_intrline, &ih)) { 369 printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname); 370 return; 371 } 372 intrstr = pci_intr_string(pc, ih); 373 sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, fxp_intr, sc); 374 if (sc->sc_ih == NULL) { 375 printf("%s: couldn't establish interrupt", 376 sc->sc_dev.dv_xname); 377 if (intrstr != NULL) 378 printf(" at %s", intrstr); 379 printf("\n"); 380 return; 381 } 382 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 383 384 /* Finish off the attach. */ 385 fxp_attach(sc); 386 387 /* Add a suspend hook to restore PCI config state */ 388 psc->psc_powerhook = powerhook_establish(fxp_pci_power, psc); 389 if (psc->psc_powerhook == NULL) 390 printf ("%s: WARNING: unable to establish pci power hook\n", 391 sc->sc_dev.dv_xname); 392 393 } 394