xref: /netbsd-src/sys/dev/pci/if_epic_pci.c (revision 3b01aba77a7a698587faaae455bbfe740923c1f5)
1 /*	$NetBSD: if_epic_pci.c,v 1.18 2001/07/08 18:02:28 thorpej Exp $	*/
2 
3 /*-
4  * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9  * NASA Ames Research Center.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  * 3. All advertising materials mentioning features or use of this software
20  *    must display the following acknowledgement:
21  *	This product includes software developed by the NetBSD
22  *	Foundation, Inc. and its contributors.
23  * 4. Neither the name of The NetBSD Foundation nor the names of its
24  *    contributors may be used to endorse or promote products derived
25  *    from this software without specific prior written permission.
26  *
27  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37  * POSSIBILITY OF SUCH DAMAGE.
38  */
39 
40 /*
41  * PCI bus front-end for the Standard Microsystems Corp. 83C170
42  * Ethernet PCI Integrated Controller (EPIC/100) driver.
43  */
44 
45 #include <sys/param.h>
46 #include <sys/systm.h>
47 #include <sys/mbuf.h>
48 #include <sys/malloc.h>
49 #include <sys/kernel.h>
50 #include <sys/socket.h>
51 #include <sys/ioctl.h>
52 #include <sys/errno.h>
53 #include <sys/device.h>
54 
55 #include <net/if.h>
56 #include <net/if_dl.h>
57 #include <net/if_media.h>
58 #include <net/if_ether.h>
59 
60 #include <machine/bus.h>
61 #include <machine/intr.h>
62 
63 #include <dev/mii/miivar.h>
64 
65 #include <dev/ic/smc83c170reg.h>
66 #include <dev/ic/smc83c170var.h>
67 
68 #include <dev/pci/pcivar.h>
69 #include <dev/pci/pcireg.h>
70 #include <dev/pci/pcidevs.h>
71 
72 /*
73  * PCI configuration space registers used by the EPIC.
74  */
75 #define	EPIC_PCI_IOBA		0x10	/* i/o mapped base */
76 #define	EPIC_PCI_MMBA		0x14	/* memory mapped base */
77 
78 struct epic_pci_softc {
79 	struct epic_softc sc_epic;	/* real EPIC softc */
80 
81 	/* PCI-specific goo. */
82 	void	*sc_ih;			/* interrupt handle */
83 };
84 
85 int	epic_pci_match(struct device *, struct cfdata *, void *);
86 void	epic_pci_attach(struct device *, struct device *, void *);
87 
88 struct cfattach epic_pci_ca = {
89 	sizeof(struct epic_pci_softc), epic_pci_match, epic_pci_attach,
90 };
91 
92 const struct epic_pci_product {
93 	u_int32_t	epp_prodid;	/* PCI product ID */
94 	const char	*epp_name;	/* device name */
95 } epic_pci_products[] = {
96 	{ PCI_PRODUCT_SMC_83C170,	"SMC 83c170 Fast Ethernet" },
97 	{ PCI_PRODUCT_SMC_83C175,	"SMC 83c175 Fast Ethernet" },
98 	{ 0,				NULL },
99 };
100 
101 const struct epic_pci_product *epic_pci_lookup(const struct pci_attach_args *);
102 
103 const struct epic_pci_product *
104 epic_pci_lookup(pa)
105 	const struct pci_attach_args *pa;
106 {
107 	const struct epic_pci_product *epp;
108 
109 	if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_SMC)
110 		return (NULL);
111 
112 	for (epp = epic_pci_products; epp->epp_name != NULL; epp++)
113 		if (PCI_PRODUCT(pa->pa_id) == epp->epp_prodid)
114 			return (epp);
115 
116 	return (NULL);
117 }
118 
119 const struct epic_pci_subsys_info {
120 	pcireg_t subsysid;
121 	int flags;
122 } epic_pci_subsys_info[] = {
123 	{ PCI_ID_CODE(PCI_VENDOR_SMC, 0xa024), /* SMC9432BTX1 */
124 	  EPIC_HAS_BNC },
125 	{ PCI_ID_CODE(PCI_VENDOR_SMC, 0xa016), /* SMC9432FTX */
126 	  EPIC_HAS_MII_FIBER | EPIC_DUPLEXLED_ON_694 },
127 	{ 0xffffffff,
128 	  0 }
129 };
130 
131 const struct epic_pci_subsys_info *
132   epic_pci_subsys_lookup(const struct pci_attach_args *);
133 
134 const struct epic_pci_subsys_info *
135 epic_pci_subsys_lookup(pa)
136 	const struct pci_attach_args *pa;
137 {
138 	pci_chipset_tag_t pc = pa->pa_pc;
139 	pcireg_t reg;
140 	const struct epic_pci_subsys_info *esp;
141 
142 	reg = pci_conf_read(pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
143 
144 	for (esp = epic_pci_subsys_info; esp->subsysid != 0xffffffff; esp++)
145 		if (esp->subsysid == reg)
146 			return (esp);
147 
148 	return (NULL);
149 }
150 
151 int
152 epic_pci_match(parent, match, aux)
153 	struct device *parent;
154 	struct cfdata *match;
155 	void *aux;
156 {
157 	struct pci_attach_args *pa = aux;
158 
159 	if (epic_pci_lookup(pa) != NULL)
160 		return (1);
161 
162 	return (0);
163 }
164 
165 void
166 epic_pci_attach(parent, self, aux)
167 	struct device *parent, *self;
168 	void *aux;
169 {
170 	struct epic_pci_softc *psc = (struct epic_pci_softc *)self;
171 	struct epic_softc *sc = &psc->sc_epic;
172 	struct pci_attach_args *pa = aux;
173 	pci_chipset_tag_t pc = pa->pa_pc;
174 	pci_intr_handle_t ih;
175 	const char *intrstr = NULL;
176 	const struct epic_pci_product *epp;
177 	const struct epic_pci_subsys_info *esp;
178 	bus_space_tag_t iot, memt;
179 	bus_space_handle_t ioh, memh;
180 	pcireg_t reg;
181 	int pmreg, ioh_valid, memh_valid;
182 
183 	if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PWRMGMT, &pmreg, 0)) {
184 		reg = pci_conf_read(pc, pa->pa_tag, pmreg + 4);
185 		switch (reg & PCI_PMCSR_STATE_MASK) {
186 		case PCI_PMCSR_STATE_D1:
187 		case PCI_PMCSR_STATE_D2:
188 			printf(": waking up from power state D%d\n%s",
189 			    reg & PCI_PMCSR_STATE_MASK, sc->sc_dev.dv_xname);
190 			pci_conf_write(pc, pa->pa_tag, pmreg + 4,
191 			    (reg & ~PCI_PMCSR_STATE_MASK) |
192 			    PCI_PMCSR_STATE_D0);
193 			break;
194 		case PCI_PMCSR_STATE_D3:
195 			/*
196 			 * IO and MEM are disabled. We can't enable
197 			 * the card because the BARs might be invalid.
198 			 */
199 			printf(": unable to wake up from power state D3, "
200 			       "reboot required.\n");
201 			pci_conf_write(pc, pa->pa_tag, pmreg + 4,
202 			    (reg & ~PCI_PMCSR_STATE_MASK) |
203 			    PCI_PMCSR_STATE_D0);
204 			return;
205 		}
206 	}
207 
208 	/*
209 	 * Map the device.
210 	 */
211 	ioh_valid = (pci_mapreg_map(pa, EPIC_PCI_IOBA,
212 	    PCI_MAPREG_TYPE_IO, 0,
213 	    &iot, &ioh, NULL, NULL) == 0);
214 	memh_valid = (pci_mapreg_map(pa, EPIC_PCI_MMBA,
215 	    PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0,
216 	    &memt, &memh, NULL, NULL) == 0);
217 
218 	if (memh_valid) {
219 		sc->sc_st = memt;
220 		sc->sc_sh = memh;
221 	} else if (ioh_valid) {
222 		sc->sc_st = iot;
223 		sc->sc_sh = ioh;
224 	} else {
225 		printf(": unable to map device registers\n");
226 		return;
227 	}
228 
229 	sc->sc_dmat = pa->pa_dmat;
230 
231 	epp = epic_pci_lookup(pa);
232 	if (epp == NULL) {
233 		printf("\n");
234 		panic("epic_pci_attach: impossible");
235 	}
236 
237 	printf(": %s, rev. %d\n", epp->epp_name, PCI_REVISION(pa->pa_class));
238 
239 	/* Make sure bus mastering is enabled. */
240 	pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
241 	    pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) |
242 	    PCI_COMMAND_MASTER_ENABLE);
243 
244 	/*
245 	 * Map and establish our interrupt.
246 	 */
247 	if (pci_intr_map(pa, &ih)) {
248 		printf("%s: unable to map interrupt\n", sc->sc_dev.dv_xname);
249 		return;
250 	}
251 	intrstr = pci_intr_string(pc, ih);
252 	psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, epic_intr, sc);
253 	if (psc->sc_ih == NULL) {
254 		printf("%s: unable to establish interrupt",
255 		    sc->sc_dev.dv_xname);
256 		if (intrstr != NULL)
257 			printf(" at %s", intrstr);
258 		printf("\n");
259 		return;
260 	}
261 	printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr);
262 
263 	esp = epic_pci_subsys_lookup(pa);
264 	if (esp)
265 		sc->sc_hwflags = esp->flags;
266 
267 	/*
268 	 * Finish off the attach.
269 	 */
270 	epic_attach(sc);
271 }
272