1 /* $NetBSD: if_epic_pci.c,v 1.20 2002/07/15 17:23:06 drochner Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * PCI bus front-end for the Standard Microsystems Corp. 83C170 42 * Ethernet PCI Integrated Controller (EPIC/100) driver. 43 */ 44 45 #include <sys/cdefs.h> 46 __KERNEL_RCSID(0, "$NetBSD: if_epic_pci.c,v 1.20 2002/07/15 17:23:06 drochner Exp $"); 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/mbuf.h> 51 #include <sys/malloc.h> 52 #include <sys/kernel.h> 53 #include <sys/socket.h> 54 #include <sys/ioctl.h> 55 #include <sys/errno.h> 56 #include <sys/device.h> 57 58 #include <net/if.h> 59 #include <net/if_dl.h> 60 #include <net/if_media.h> 61 #include <net/if_ether.h> 62 63 #include <machine/bus.h> 64 #include <machine/intr.h> 65 66 #include <dev/mii/miivar.h> 67 68 #include <dev/ic/smc83c170reg.h> 69 #include <dev/ic/smc83c170var.h> 70 71 #include <dev/pci/pcivar.h> 72 #include <dev/pci/pcireg.h> 73 #include <dev/pci/pcidevs.h> 74 75 /* 76 * PCI configuration space registers used by the EPIC. 77 */ 78 #define EPIC_PCI_IOBA 0x10 /* i/o mapped base */ 79 #define EPIC_PCI_MMBA 0x14 /* memory mapped base */ 80 81 struct epic_pci_softc { 82 struct epic_softc sc_epic; /* real EPIC softc */ 83 84 /* PCI-specific goo. */ 85 void *sc_ih; /* interrupt handle */ 86 }; 87 88 int epic_pci_match(struct device *, struct cfdata *, void *); 89 void epic_pci_attach(struct device *, struct device *, void *); 90 91 struct cfattach epic_pci_ca = { 92 sizeof(struct epic_pci_softc), epic_pci_match, epic_pci_attach, 93 }; 94 95 const struct epic_pci_product { 96 u_int32_t epp_prodid; /* PCI product ID */ 97 const char *epp_name; /* device name */ 98 } epic_pci_products[] = { 99 { PCI_PRODUCT_SMC_83C170, "SMC 83c170 Fast Ethernet" }, 100 { PCI_PRODUCT_SMC_83C175, "SMC 83c175 Fast Ethernet" }, 101 { 0, NULL }, 102 }; 103 104 const struct epic_pci_product *epic_pci_lookup(const struct pci_attach_args *); 105 106 const struct epic_pci_product * 107 epic_pci_lookup(pa) 108 const struct pci_attach_args *pa; 109 { 110 const struct epic_pci_product *epp; 111 112 if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_SMC) 113 return (NULL); 114 115 for (epp = epic_pci_products; epp->epp_name != NULL; epp++) 116 if (PCI_PRODUCT(pa->pa_id) == epp->epp_prodid) 117 return (epp); 118 119 return (NULL); 120 } 121 122 const struct epic_pci_subsys_info { 123 pcireg_t subsysid; 124 int flags; 125 } epic_pci_subsys_info[] = { 126 { PCI_ID_CODE(PCI_VENDOR_SMC, 0xa015), /* SMC9432BTX */ 127 EPIC_HAS_BNC }, 128 { PCI_ID_CODE(PCI_VENDOR_SMC, 0xa024), /* SMC9432BTX1 */ 129 EPIC_HAS_BNC }, 130 { PCI_ID_CODE(PCI_VENDOR_SMC, 0xa016), /* SMC9432FTX */ 131 EPIC_HAS_MII_FIBER | EPIC_DUPLEXLED_ON_694 }, 132 { 0xffffffff, 133 0 } 134 }; 135 136 const struct epic_pci_subsys_info * 137 epic_pci_subsys_lookup(const struct pci_attach_args *); 138 139 const struct epic_pci_subsys_info * 140 epic_pci_subsys_lookup(pa) 141 const struct pci_attach_args *pa; 142 { 143 pci_chipset_tag_t pc = pa->pa_pc; 144 pcireg_t reg; 145 const struct epic_pci_subsys_info *esp; 146 147 reg = pci_conf_read(pc, pa->pa_tag, PCI_SUBSYS_ID_REG); 148 149 for (esp = epic_pci_subsys_info; esp->subsysid != 0xffffffff; esp++) 150 if (esp->subsysid == reg) 151 return (esp); 152 153 return (NULL); 154 } 155 156 int 157 epic_pci_match(parent, match, aux) 158 struct device *parent; 159 struct cfdata *match; 160 void *aux; 161 { 162 struct pci_attach_args *pa = aux; 163 164 if (epic_pci_lookup(pa) != NULL) 165 return (1); 166 167 return (0); 168 } 169 170 void 171 epic_pci_attach(parent, self, aux) 172 struct device *parent, *self; 173 void *aux; 174 { 175 struct epic_pci_softc *psc = (struct epic_pci_softc *)self; 176 struct epic_softc *sc = &psc->sc_epic; 177 struct pci_attach_args *pa = aux; 178 pci_chipset_tag_t pc = pa->pa_pc; 179 pci_intr_handle_t ih; 180 const char *intrstr = NULL; 181 const struct epic_pci_product *epp; 182 const struct epic_pci_subsys_info *esp; 183 bus_space_tag_t iot, memt; 184 bus_space_handle_t ioh, memh; 185 pcireg_t reg; 186 int pmreg, ioh_valid, memh_valid; 187 188 if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PWRMGMT, &pmreg, 0)) { 189 reg = pci_conf_read(pc, pa->pa_tag, pmreg + 4); 190 switch (reg & PCI_PMCSR_STATE_MASK) { 191 case PCI_PMCSR_STATE_D1: 192 case PCI_PMCSR_STATE_D2: 193 printf(": waking up from power state D%d\n%s", 194 reg & PCI_PMCSR_STATE_MASK, sc->sc_dev.dv_xname); 195 pci_conf_write(pc, pa->pa_tag, pmreg + 4, 196 (reg & ~PCI_PMCSR_STATE_MASK) | 197 PCI_PMCSR_STATE_D0); 198 break; 199 case PCI_PMCSR_STATE_D3: 200 /* 201 * IO and MEM are disabled. We can't enable 202 * the card because the BARs might be invalid. 203 */ 204 printf(": unable to wake up from power state D3, " 205 "reboot required.\n"); 206 pci_conf_write(pc, pa->pa_tag, pmreg + 4, 207 (reg & ~PCI_PMCSR_STATE_MASK) | 208 PCI_PMCSR_STATE_D0); 209 return; 210 } 211 } 212 213 /* 214 * Map the device. 215 */ 216 ioh_valid = (pci_mapreg_map(pa, EPIC_PCI_IOBA, 217 PCI_MAPREG_TYPE_IO, 0, 218 &iot, &ioh, NULL, NULL) == 0); 219 memh_valid = (pci_mapreg_map(pa, EPIC_PCI_MMBA, 220 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 221 &memt, &memh, NULL, NULL) == 0); 222 223 if (memh_valid) { 224 sc->sc_st = memt; 225 sc->sc_sh = memh; 226 } else if (ioh_valid) { 227 sc->sc_st = iot; 228 sc->sc_sh = ioh; 229 } else { 230 printf(": unable to map device registers\n"); 231 return; 232 } 233 234 sc->sc_dmat = pa->pa_dmat; 235 236 epp = epic_pci_lookup(pa); 237 if (epp == NULL) { 238 printf("\n"); 239 panic("epic_pci_attach: impossible"); 240 } 241 242 printf(": %s, rev. %d\n", epp->epp_name, PCI_REVISION(pa->pa_class)); 243 244 /* Make sure bus mastering is enabled. */ 245 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 246 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 247 PCI_COMMAND_MASTER_ENABLE); 248 249 /* 250 * Map and establish our interrupt. 251 */ 252 if (pci_intr_map(pa, &ih)) { 253 printf("%s: unable to map interrupt\n", sc->sc_dev.dv_xname); 254 return; 255 } 256 intrstr = pci_intr_string(pc, ih); 257 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, epic_intr, sc); 258 if (psc->sc_ih == NULL) { 259 printf("%s: unable to establish interrupt", 260 sc->sc_dev.dv_xname); 261 if (intrstr != NULL) 262 printf(" at %s", intrstr); 263 printf("\n"); 264 return; 265 } 266 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 267 268 esp = epic_pci_subsys_lookup(pa); 269 if (esp) 270 sc->sc_hwflags = esp->flags; 271 272 /* 273 * Finish off the attach. 274 */ 275 epic_attach(sc); 276 } 277