1 /* $NetBSD: if_atw_pci.c,v 1.18 2008/03/21 08:20:04 dyoung Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center; Charles M. Hannum; and David Young. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * PCI bus front-end for the ADMtek ADM8211 802.11 MAC/BBP chip. 42 * 43 * Derived from the ``Tulip'' PCI bus front-end. 44 */ 45 46 #include <sys/cdefs.h> 47 __KERNEL_RCSID(0, "$NetBSD: if_atw_pci.c,v 1.18 2008/03/21 08:20:04 dyoung Exp $"); 48 49 #include <sys/param.h> 50 #include <sys/systm.h> 51 #include <sys/mbuf.h> 52 #include <sys/malloc.h> 53 #include <sys/kernel.h> 54 #include <sys/socket.h> 55 #include <sys/ioctl.h> 56 #include <sys/errno.h> 57 #include <sys/device.h> 58 59 #include <machine/endian.h> 60 61 #include <net/if.h> 62 #include <net/if_dl.h> 63 #include <net/if_media.h> 64 #include <net/if_ether.h> 65 66 #include <net80211/ieee80211_netbsd.h> 67 #include <net80211/ieee80211_radiotap.h> 68 #include <net80211/ieee80211_var.h> 69 70 #include <sys/bus.h> 71 #include <sys/intr.h> 72 73 #include <dev/ic/atwreg.h> 74 #include <dev/ic/rf3000reg.h> 75 #include <dev/ic/si4136reg.h> 76 #include <dev/ic/atwvar.h> 77 78 #include <dev/pci/pcivar.h> 79 #include <dev/pci/pcireg.h> 80 #include <dev/pci/pcidevs.h> 81 82 /* 83 * PCI configuration space registers used by the ADM8211. 84 */ 85 #define ATW_PCI_IOBA 0x10 /* i/o mapped base */ 86 #define ATW_PCI_MMBA 0x14 /* memory mapped base */ 87 88 struct atw_pci_softc { 89 struct atw_softc psc_atw; /* real ADM8211 softc */ 90 91 pci_intr_handle_t psc_ih; /* interrupt handle */ 92 void *psc_intrcookie; 93 94 pci_chipset_tag_t psc_pc; /* our PCI chipset */ 95 pcitag_t psc_pcitag; /* our PCI tag */ 96 }; 97 98 static int atw_pci_match(device_t, struct cfdata *, void *); 99 static void atw_pci_attach(device_t, device_t, void *); 100 101 CFATTACH_DECL(atw_pci, sizeof(struct atw_pci_softc), 102 atw_pci_match, atw_pci_attach, NULL, NULL); 103 104 static const struct atw_pci_product { 105 u_int32_t app_vendor; /* PCI vendor ID */ 106 u_int32_t app_product; /* PCI product ID */ 107 const char *app_product_name; 108 } atw_pci_products[] = { 109 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_ADM8211, 110 "ADMtek ADM8211 802.11 MAC/BBP" }, 111 112 { 0, 0, NULL }, 113 }; 114 115 static const struct atw_pci_product * 116 atw_pci_lookup(const struct pci_attach_args *pa) 117 { 118 const struct atw_pci_product *app; 119 120 for (app = atw_pci_products; 121 app->app_product_name != NULL; 122 app++) { 123 if (PCI_VENDOR(pa->pa_id) == app->app_vendor && 124 PCI_PRODUCT(pa->pa_id) == app->app_product) 125 return (app); 126 } 127 return (NULL); 128 } 129 130 static int 131 atw_pci_match(device_t parent, struct cfdata *match, void *aux) 132 { 133 struct pci_attach_args *pa = aux; 134 135 if (atw_pci_lookup(pa) != NULL) 136 return (1); 137 138 return (0); 139 } 140 141 static int 142 atw_pci_enable(struct atw_softc *sc) 143 { 144 struct atw_pci_softc *psc = (void *)sc; 145 146 /* Establish the interrupt. */ 147 psc->psc_intrcookie = pci_intr_establish(psc->psc_pc, psc->psc_ih, 148 IPL_NET, atw_intr, sc); 149 if (psc->psc_intrcookie == NULL) { 150 aprint_error_dev(&sc->sc_dev, 151 "unable to establish interrupt\n"); 152 return (1); 153 } 154 155 return (0); 156 } 157 158 static void 159 atw_pci_disable(struct atw_softc *sc) 160 { 161 struct atw_pci_softc *psc = (void *)sc; 162 163 /* Unhook the interrupt handler. */ 164 pci_intr_disestablish(psc->psc_pc, psc->psc_intrcookie); 165 psc->psc_intrcookie = NULL; 166 } 167 168 static void 169 atw_pci_attach(device_t parent, device_t self, void *aux) 170 { 171 struct atw_pci_softc *psc = device_private(self); 172 struct atw_softc *sc = &psc->psc_atw; 173 struct pci_attach_args *pa = aux; 174 pci_chipset_tag_t pc = pa->pa_pc; 175 const char *intrstr = NULL; 176 bus_space_tag_t iot, memt; 177 bus_space_handle_t ioh, memh; 178 int ioh_valid, memh_valid; 179 const struct atw_pci_product *app; 180 int error; 181 182 psc->psc_pc = pa->pa_pc; 183 psc->psc_pcitag = pa->pa_tag; 184 185 app = atw_pci_lookup(pa); 186 if (app == NULL) { 187 printf("\n"); 188 panic("atw_pci_attach: impossible"); 189 } 190 191 /* 192 * No power management hooks. 193 * XXX Maybe we should add some! 194 */ 195 sc->sc_flags |= ATWF_ENABLED; 196 197 /* 198 * Get revision info, and set some chip-specific variables. 199 */ 200 sc->sc_rev = PCI_REVISION(pa->pa_class); 201 printf(": %s, revision %d.%d\n", app->app_product_name, 202 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf); 203 204 /* power up chip */ 205 if ((error = pci_activate(pa->pa_pc, pa->pa_tag, self, 206 NULL)) && error != EOPNOTSUPP) { 207 aprint_error_dev(&sc->sc_dev, "cannot activate %d\n", error); 208 return; 209 } 210 211 /* 212 * Map the device. 213 */ 214 ioh_valid = (pci_mapreg_map(pa, ATW_PCI_IOBA, 215 PCI_MAPREG_TYPE_IO, 0, 216 &iot, &ioh, NULL, NULL) == 0); 217 memh_valid = (pci_mapreg_map(pa, ATW_PCI_MMBA, 218 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 219 &memt, &memh, NULL, NULL) == 0); 220 221 if (memh_valid) { 222 sc->sc_st = memt; 223 sc->sc_sh = memh; 224 } else if (ioh_valid) { 225 sc->sc_st = iot; 226 sc->sc_sh = ioh; 227 } else { 228 printf(": unable to map device registers\n"); 229 return; 230 } 231 232 sc->sc_dmat = pa->pa_dmat; 233 234 /* 235 * Make sure bus mastering is enabled. 236 */ 237 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 238 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 239 PCI_COMMAND_MASTER_ENABLE); 240 241 /* 242 * Get the cacheline size. 243 */ 244 sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag, 245 PCI_BHLC_REG)); 246 247 /* 248 * Get PCI data moving command info. 249 */ 250 if (pa->pa_flags & PCI_FLAGS_MRL_OKAY) /* read line */ 251 sc->sc_flags |= ATWF_MRL; 252 if (pa->pa_flags & PCI_FLAGS_MRM_OKAY) /* read multiple */ 253 sc->sc_flags |= ATWF_MRM; 254 if (pa->pa_flags & PCI_FLAGS_MWI_OKAY) /* write invalidate */ 255 sc->sc_flags |= ATWF_MWI; 256 257 /* 258 * Map and establish our interrupt. 259 */ 260 if (pci_intr_map(pa, &psc->psc_ih)) { 261 aprint_error_dev(&sc->sc_dev, "unable to map interrupt\n"); 262 return; 263 } 264 intrstr = pci_intr_string(pc, psc->psc_ih); 265 psc->psc_intrcookie = pci_intr_establish(pc, psc->psc_ih, IPL_NET, 266 atw_intr, sc); 267 if (psc->psc_intrcookie == NULL) { 268 aprint_error_dev(&sc->sc_dev, "unable to establish interrupt"); 269 if (intrstr != NULL) 270 aprint_error(" at %s", intrstr); 271 aprint_error("\n"); 272 return; 273 } 274 275 aprint_normal_dev(&sc->sc_dev, "interrupting at %s\n", intrstr); 276 277 sc->sc_enable = atw_pci_enable; 278 sc->sc_disable = atw_pci_disable; 279 280 /* 281 * Finish off the attach. 282 */ 283 atw_attach(sc); 284 } 285