xref: /netbsd-src/sys/dev/pci/if_atw_pci.c (revision 001c68bd94f75ce9270b69227c4199fbf34ee396)
1 /*	$NetBSD: if_atw_pci.c,v 1.1 2003/07/06 22:58:10 dyoung Exp $	*/
2 
3 /*-
4  * Copyright (c) 1998, 1999, 2000, 2002 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9  * NASA Ames Research Center; Charles M. Hannum; and David Young.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  * 3. All advertising materials mentioning features or use of this software
20  *    must display the following acknowledgement:
21  *	This product includes software developed by the NetBSD
22  *	Foundation, Inc. and its contributors.
23  * 4. Neither the name of The NetBSD Foundation nor the names of its
24  *    contributors may be used to endorse or promote products derived
25  *    from this software without specific prior written permission.
26  *
27  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37  * POSSIBILITY OF SUCH DAMAGE.
38  */
39 
40 /*
41  * PCI bus front-end for the ADMtek ADM8211 802.11 MAC/BBP chip.
42  *
43  * Derived from the ``Tulip'' PCI bus front-end.
44  */
45 
46 #include <sys/cdefs.h>
47 __KERNEL_RCSID(0, "$NetBSD: if_atw_pci.c,v 1.1 2003/07/06 22:58:10 dyoung Exp $");
48 
49 #include <sys/param.h>
50 #include <sys/systm.h>
51 #include <sys/mbuf.h>
52 #include <sys/malloc.h>
53 #include <sys/kernel.h>
54 #include <sys/socket.h>
55 #include <sys/ioctl.h>
56 #include <sys/errno.h>
57 #include <sys/device.h>
58 
59 #include <machine/endian.h>
60 
61 #include <net/if.h>
62 #include <net/if_dl.h>
63 #include <net/if_media.h>
64 #include <net/if_ether.h>
65 #include <net/if_ieee80211.h>
66 
67 #include <machine/bus.h>
68 #include <machine/intr.h>
69 
70 #include <dev/ic/atwreg.h>
71 #include <dev/ic/atwvar.h>
72 
73 #include <dev/pci/pcivar.h>
74 #include <dev/pci/pcireg.h>
75 #include <dev/pci/pcidevs.h>
76 
77 /*
78  * PCI configuration space registers used by the ADM8211.
79  */
80 #define	ATW_PCI_IOBA		0x10	/* i/o mapped base */
81 #define	ATW_PCI_MMBA		0x14	/* memory mapped base */
82 
83 struct atw_pci_softc {
84 	struct atw_softc sc_atw;	/* real ADM8211 softc */
85 
86 	/* PCI-specific goo. */
87 	void	*sc_ih;			/* interrupt handle */
88 
89 	pci_chipset_tag_t sc_pc;	/* our PCI chipset */
90 	pcitag_t sc_pcitag;		/* our PCI tag */
91 };
92 
93 int	atw_pci_match __P((struct device *, struct cfdata *, void *));
94 void	atw_pci_attach __P((struct device *, struct device *, void *));
95 
96 CFATTACH_DECL(atw_pci, sizeof(struct atw_pci_softc),
97     atw_pci_match, atw_pci_attach, NULL, NULL);
98 
99 const struct atw_pci_product {
100 	u_int32_t	app_vendor;	/* PCI vendor ID */
101 	u_int32_t	app_product;	/* PCI product ID */
102 	const char	*app_product_name;
103 } atw_pci_products[] = {
104 	{ PCI_VENDOR_ADMTEK,		PCI_PRODUCT_ADMTEK_ADM8211,
105 	  "ADMtek ADM8211 802.11 MAC/BBP" },
106 
107 	{ 0,				0,				NULL },
108 };
109 
110 const struct atw_pci_product *atw_pci_lookup
111     __P((const struct pci_attach_args *));
112 
113 const struct atw_pci_product *
114 atw_pci_lookup(pa)
115 	const struct pci_attach_args *pa;
116 {
117 	const struct atw_pci_product *app;
118 
119 	for (app = atw_pci_products;
120 	     app->app_product_name != NULL;
121 	     app++) {
122 		if (PCI_VENDOR(pa->pa_id) == app->app_vendor &&
123 		    PCI_PRODUCT(pa->pa_id) == app->app_product)
124 			return (app);
125 	}
126 	return (NULL);
127 }
128 
129 int
130 atw_pci_match(parent, match, aux)
131 	struct device *parent;
132 	struct cfdata *match;
133 	void *aux;
134 {
135 	struct pci_attach_args *pa = aux;
136 
137 	if (atw_pci_lookup(pa) != NULL)
138 		return (1);	/* beat if_de.c */
139 
140 	return (0);
141 }
142 
143 void
144 atw_pci_attach(parent, self, aux)
145 	struct device *parent, *self;
146 	void *aux;
147 {
148 	struct atw_pci_softc *psc = (void *) self;
149 	struct atw_softc *sc = &psc->sc_atw;
150 	struct pci_attach_args *pa = aux;
151 	pci_chipset_tag_t pc = pa->pa_pc;
152 	pci_intr_handle_t ih;
153 	const char *intrstr = NULL;
154 	bus_space_tag_t iot, memt;
155 	bus_space_handle_t ioh, memh;
156 	int ioh_valid, memh_valid;
157 	const struct atw_pci_product *app;
158 	pcireg_t reg;
159 	int pmreg, rev;
160 
161 	psc->sc_pc = pa->pa_pc;
162 	psc->sc_pcitag = pa->pa_tag;
163 
164 	app = atw_pci_lookup(pa);
165 	if (app == NULL) {
166 		printf("\n");
167 		panic("atw_pci_attach: impossible");
168 	}
169 
170 	/*
171 	 * No power management hooks.
172 	 * XXX Maybe we should add some!
173 	 */
174 	sc->sc_flags |= ATWF_ENABLED;
175 
176 	/*
177 	 * Get revision info, and set some chip-specific variables.
178 	 */
179 	rev = PCI_REVISION(pa->pa_class);
180 	printf(": %s, pass %d.%d\n", app->app_product_name,
181 	    (rev >> 4) & 0xf, rev & 0xf);
182 
183 	/*
184 	 * Check to see if the device is in power-save mode, and
185 	 * being it out if necessary.
186 	 *
187 	 * XXX This code comes almost verbatim from if_tlp_pci.c. I do
188 	 * not understand it. Tulip clears the "sleep mode" bit in the
189 	 * CFDA register, first.  There is an equivalent (?) register at the
190 	 * same place in the ADM8211, but the docs do not assign its bits
191 	 * any meanings. -dcy
192 	 */
193 	if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PWRMGMT, &pmreg, 0)) {
194 		reg = pci_conf_read(pc, pa->pa_tag, pmreg + PCI_PMCSR);
195 		switch (reg & PCI_PMCSR_STATE_MASK) {
196 		case PCI_PMCSR_STATE_D1:
197 		case PCI_PMCSR_STATE_D2:
198 			printf(": waking up from power state D%d\n%s",
199 			    reg & PCI_PMCSR_STATE_MASK, sc->sc_dev.dv_xname);
200 			pci_conf_write(pc, pa->pa_tag, pmreg + PCI_PMCSR,
201 			    (reg & ~PCI_PMCSR_STATE_MASK) |
202 			    PCI_PMCSR_STATE_D0);
203 			break;
204 		case PCI_PMCSR_STATE_D3:
205 			/*
206 			 * The card has lost all configuration data in
207 			 * this state, so punt.
208 			 */
209 			printf(": unable to wake up from power state D3, "
210 			       "reboot required.\n");
211 			pci_conf_write(pc, pa->pa_tag, pmreg + PCI_PMCSR,
212 			    (reg & ~PCI_PMCSR_STATE_MASK) |
213 			    PCI_PMCSR_STATE_D0);
214 			return;
215 		}
216 	}
217 
218 	/*
219 	 * Map the device.
220 	 */
221 	ioh_valid = (pci_mapreg_map(pa, ATW_PCI_IOBA,
222 	    PCI_MAPREG_TYPE_IO, 0,
223 	    &iot, &ioh, NULL, NULL) == 0);
224 	memh_valid = (pci_mapreg_map(pa, ATW_PCI_MMBA,
225 	    PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0,
226 	    &memt, &memh, NULL, NULL) == 0);
227 
228 	if (memh_valid) {
229 		sc->sc_st = memt;
230 		sc->sc_sh = memh;
231 	} else if (ioh_valid) {
232 		sc->sc_st = iot;
233 		sc->sc_sh = ioh;
234 	} else {
235 		printf(": unable to map device registers\n");
236 		return;
237 	}
238 
239 	sc->sc_dmat = pa->pa_dmat;
240 
241 	/*
242 	 * Make sure bus mastering is enabled.
243 	 */
244 	pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
245 	    pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) |
246 	    PCI_COMMAND_MASTER_ENABLE);
247 
248 	/*
249 	 * Get the cacheline size.
250 	 */
251 	sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag,
252 	    PCI_BHLC_REG));
253 
254 	/*
255 	 * Get PCI data moving command info.
256 	 */
257 	if (pa->pa_flags & PCI_FLAGS_MRL_OKAY) /* read line */
258 		sc->sc_flags |= ATWF_MRL;
259 	if (pa->pa_flags & PCI_FLAGS_MRM_OKAY) /* read multiple */
260 		sc->sc_flags |= ATWF_MRM;
261 	if (pa->pa_flags & PCI_FLAGS_MWI_OKAY) /* write invalidate */
262 		sc->sc_flags |= ATWF_MWI;
263 
264 	/*
265 	 * Map and establish our interrupt.
266 	 */
267 	if (pci_intr_map(pa, &ih)) {
268 		printf("%s: unable to map interrupt\n",
269 		    sc->sc_dev.dv_xname);
270 		return;
271 	}
272 	intrstr = pci_intr_string(pc, ih);
273 	psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, atw_intr, sc);
274 	if (psc->sc_ih == NULL) {
275 		printf("%s: unable to establish interrupt",
276 		    sc->sc_dev.dv_xname);
277 		if (intrstr != NULL)
278 			printf(" at %s", intrstr);
279 		printf("\n");
280 		return;
281 	}
282 	printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr);
283 
284 	/*
285 	 * Finish off the attach.
286 	 */
287 	atw_attach(sc);
288 }
289 
290