xref: /netbsd-src/sys/dev/pci/if_ath_pci.c (revision d48f14661dda8638fee055ba15d35bdfb29b9fa8)
1 /*	$NetBSD: if_ath_pci.c,v 1.14 2006/06/20 14:38:34 perry Exp $	*/
2 
3 /*-
4  * Copyright (c) 2002-2005 Sam Leffler, Errno Consulting
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer,
12  *    without modification.
13  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
14  *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
15  *    redistribution must be conditioned upon including a substantially
16  *    similar Disclaimer requirement for further binary redistribution.
17  * 3. Neither the names of the above-listed copyright holders nor the names
18  *    of any contributors may be used to endorse or promote products derived
19  *    from this software without specific prior written permission.
20  *
21  * Alternatively, this software may be distributed under the terms of the
22  * GNU General Public License ("GPL") version 2 as published by the Free
23  * Software Foundation.
24  *
25  * NO WARRANTY
26  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
28  * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
29  * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
30  * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
31  * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
34  * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
36  * THE POSSIBILITY OF SUCH DAMAGES.
37  */
38 
39 #include <sys/cdefs.h>
40 #ifdef __FreeBSD__
41 __FBSDID("$FreeBSD: src/sys/dev/ath/if_ath_pci.c,v 1.11 2005/01/18 18:08:16 sam Exp $");
42 #endif
43 #ifdef __NetBSD__
44 __KERNEL_RCSID(0, "$NetBSD: if_ath_pci.c,v 1.14 2006/06/20 14:38:34 perry Exp $");
45 #endif
46 
47 /*
48  * PCI/Cardbus front-end for the Atheros Wireless LAN controller driver.
49  */
50 
51 #include <sys/param.h>
52 #include <sys/systm.h>
53 #include <sys/mbuf.h>
54 #include <sys/malloc.h>
55 #include <sys/kernel.h>
56 #include <sys/lock.h>
57 #include <sys/socket.h>
58 #include <sys/sockio.h>
59 #include <sys/errno.h>
60 #include <sys/device.h>
61 
62 #include <machine/bus.h>
63 
64 #include <net/if.h>
65 #include <net/if_media.h>
66 #include <net/if_ether.h>
67 #include <net/if_llc.h>
68 #include <net/if_arp.h>
69 
70 #include <net80211/ieee80211_netbsd.h>
71 #include <net80211/ieee80211_var.h>
72 
73 #ifdef INET
74 #include <netinet/in.h>
75 #endif
76 
77 #include <dev/ic/ath_netbsd.h>
78 #include <dev/ic/athvar.h>
79 #include <contrib/dev/ath/ah.h>
80 
81 #include <dev/pci/pcivar.h>
82 #include <dev/pci/pcireg.h>
83 #include <dev/pci/pcidevs.h>
84 
85 #include <sys/device.h>
86 
87 /*
88  * PCI glue.
89  */
90 
91 struct ath_pci_softc {
92 	struct ath_softc	sc_sc;
93 	pci_chipset_tag_t	sc_pc;
94         pcitag_t 		sc_pcitag;
95         struct pci_conf_state 	sc_pciconf;
96 	void			*sc_ih;		/* interrupt handler */
97 	bus_space_tag_t		sc_iot;
98 	bus_space_handle_t	sc_ioh;
99 };
100 
101 #define	BS_BAR	0x10
102 #define	PCIR_RETRY_TIMEOUT_REG		0x40
103 #define	PCIR_RETRY_TIMEOUT_MASK		0x0000ff00
104 
105 static int ath_pci_match(struct device *, struct cfdata *, void *);
106 static void ath_pci_attach(struct device *, struct device *, void *);
107 static void ath_pci_shutdown(void *);
108 static void ath_pci_powerhook(int, void *);
109 static int ath_pci_detach(struct device *, int);
110 
111 CFATTACH_DECL(ath_pci,
112     sizeof(struct ath_pci_softc),
113     ath_pci_match,
114     ath_pci_attach,
115     ath_pci_detach,
116     NULL);
117 
118 static int
119 ath_pci_match(struct device *parent, struct cfdata *match, void *aux)
120 {
121 	const char* devname;
122 	struct pci_attach_args *pa = aux;
123 
124 	devname = ath_hal_probe(PCI_VENDOR(pa->pa_id), PCI_PRODUCT(pa->pa_id));
125 	if (devname != NULL)
126 		return 1;
127 	return 0;
128 }
129 
130 static int
131 ath_pci_setup(struct pci_attach_args *pa)
132 {
133 	pci_chipset_tag_t pc = pa->pa_pc;
134 	uint32_t res;
135 	/*
136 	 * Enable memory mapping and bus mastering.
137 	 */
138 	pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
139 	    pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) |
140 	        PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_MEM_ENABLE);
141 	res = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
142 
143 	if ((res & PCI_COMMAND_MEM_ENABLE) == 0) {
144 		aprint_error("couldn't enable memory mapping\n");
145 		return 0;
146 	}
147 	if ((res & PCI_COMMAND_MASTER_ENABLE) == 0) {
148 		aprint_error("couldn't enable bus mastering\n");
149 		return 0;
150 	}
151 
152 	/*
153 	 * Disable retry timeout to keep PCI Tx retries from
154 	 * interfering with C3 CPU state.
155 	 */
156 	pci_conf_write(pc, pa->pa_tag, PCIR_RETRY_TIMEOUT_REG,
157 	    pci_conf_read(pc, pa->pa_tag, PCIR_RETRY_TIMEOUT_REG) &
158 	    ~PCIR_RETRY_TIMEOUT_MASK);
159 
160 	return 1;
161 }
162 
163 static void
164 ath_pci_attach(struct device *parent, struct device *self, void *aux)
165 {
166 	struct ath_pci_softc *psc = (struct ath_pci_softc *)self;
167 	struct ath_softc *sc = &psc->sc_sc;
168 	struct pci_attach_args *pa = aux;
169 	pci_chipset_tag_t pc = pa->pa_pc;
170 	pci_intr_handle_t ih;
171 	void *shook;
172 	void *phook;
173 	const char *intrstr = NULL;
174 
175 	psc->sc_pc = pc;
176 
177 	psc->sc_pcitag = pa->pa_tag;
178 
179 	if (!ath_pci_setup(pa))
180 		goto bad;
181 
182 	/*
183 	 * Setup memory-mapping of PCI registers.
184 	 */
185 	if (pci_mapreg_map(pa, BS_BAR, PCI_MAPREG_TYPE_MEM, 0, &psc->sc_iot,
186 		&psc->sc_ioh, NULL, NULL)) {
187 		aprint_error("cannot map register space\n");
188 		goto bad;
189 	}
190 
191 	sc->sc_st = HALTAG(psc->sc_iot);
192 	sc->sc_sh = HALHANDLE(psc->sc_ioh);
193 
194 	sc->sc_invalid = 1;
195 
196 	/*
197 	 * Arrange interrupt line.
198 	 */
199 	if (pci_intr_map(pa, &ih)) {
200 		aprint_error("couldn't map interrupt\n");
201 		goto bad1;
202 	}
203 
204 	intrstr = pci_intr_string(pc, ih);
205 	psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, ath_intr, sc);
206 	if (psc->sc_ih == NULL) {
207 		aprint_error("couldn't map interrupt\n");
208 		goto bad2;
209 	}
210 
211 	printf("\n");
212 	printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr);
213 
214 	sc->sc_dmat = pa->pa_dmat;
215 
216 	shook = shutdownhook_establish(ath_pci_shutdown, psc);
217 	if (shook == NULL) {
218 		aprint_error("couldn't make shutdown hook\n");
219 		goto bad3;
220 	}
221 
222 	phook = powerhook_establish(ath_pci_powerhook, psc);
223 	if (phook == NULL) {
224 		aprint_error("couldn't make power hook\n");
225 		goto bad3;
226 	}
227 
228 	if (ath_attach(PCI_PRODUCT(pa->pa_id), sc) == 0)
229 		return;
230 
231 	shutdownhook_disestablish(shook);
232 	powerhook_disestablish(phook);
233 
234 bad3:	pci_intr_disestablish(pc, psc->sc_ih);
235 bad2:	/* XXX */
236 bad1:	/* XXX */
237 bad:
238 	return;
239 }
240 
241 static int
242 ath_pci_detach(struct device *self, int flags)
243 {
244 	struct ath_pci_softc *psc = (struct ath_pci_softc *)self;
245 
246 	ath_detach(&psc->sc_sc);
247 	pci_intr_disestablish(psc->sc_pc, psc->sc_ih);
248 
249 	return (0);
250 }
251 
252 static void
253 ath_pci_shutdown(void *self)
254 {
255 	struct ath_pci_softc *psc = (struct ath_pci_softc *)self;
256 
257 	ath_shutdown(&psc->sc_sc);
258 }
259 
260 static void
261 ath_pci_powerhook(int why, void *arg)
262 {
263 	struct ath_pci_softc *sc = arg;
264 	pci_chipset_tag_t pc = sc->sc_pc;
265 	pcitag_t tag = sc->sc_pcitag;
266 
267 	switch (why) {
268 	case PWR_SOFTSUSPEND:
269 		ath_pci_shutdown(sc);
270 		break;
271 	case PWR_SUSPEND:
272 		pci_conf_capture(pc, tag, &sc->sc_pciconf);
273 		break;
274 	case PWR_RESUME:
275 		pci_conf_restore(pc, tag, &sc->sc_pciconf);
276 		break;
277 	}
278 
279 	return;
280 }
281