1 /* $NetBSD: if_ath_pci.c,v 1.18 2006/10/12 01:31:29 christos Exp $ */ 2 3 /*- 4 * Copyright (c) 2002-2005 Sam Leffler, Errno Consulting 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer, 12 * without modification. 13 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 14 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 15 * redistribution must be conditioned upon including a substantially 16 * similar Disclaimer requirement for further binary redistribution. 17 * 3. Neither the names of the above-listed copyright holders nor the names 18 * of any contributors may be used to endorse or promote products derived 19 * from this software without specific prior written permission. 20 * 21 * Alternatively, this software may be distributed under the terms of the 22 * GNU General Public License ("GPL") version 2 as published by the Free 23 * Software Foundation. 24 * 25 * NO WARRANTY 26 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 28 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 29 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 30 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 31 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 34 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 36 * THE POSSIBILITY OF SUCH DAMAGES. 37 */ 38 39 #include <sys/cdefs.h> 40 #ifdef __FreeBSD__ 41 __FBSDID("$FreeBSD: src/sys/dev/ath/if_ath_pci.c,v 1.11 2005/01/18 18:08:16 sam Exp $"); 42 #endif 43 #ifdef __NetBSD__ 44 __KERNEL_RCSID(0, "$NetBSD: if_ath_pci.c,v 1.18 2006/10/12 01:31:29 christos Exp $"); 45 #endif 46 47 /* 48 * PCI/Cardbus front-end for the Atheros Wireless LAN controller driver. 49 */ 50 51 #include <sys/param.h> 52 #include <sys/systm.h> 53 #include <sys/mbuf.h> 54 #include <sys/malloc.h> 55 #include <sys/kernel.h> 56 #include <sys/lock.h> 57 #include <sys/socket.h> 58 #include <sys/sockio.h> 59 #include <sys/errno.h> 60 #include <sys/device.h> 61 62 #include <machine/bus.h> 63 64 #include <net/if.h> 65 #include <net/if_media.h> 66 #include <net/if_ether.h> 67 #include <net/if_llc.h> 68 #include <net/if_arp.h> 69 70 #include <net80211/ieee80211_netbsd.h> 71 #include <net80211/ieee80211_var.h> 72 73 #ifdef INET 74 #include <netinet/in.h> 75 #endif 76 77 #include <dev/ic/ath_netbsd.h> 78 #include <dev/ic/athvar.h> 79 #include <contrib/dev/ath/ah.h> 80 81 #include <dev/pci/pcivar.h> 82 #include <dev/pci/pcireg.h> 83 #include <dev/pci/pcidevs.h> 84 85 #include <sys/device.h> 86 87 /* 88 * PCI glue. 89 */ 90 91 struct ath_pci_softc { 92 struct ath_softc sc_sc; 93 pci_chipset_tag_t sc_pc; 94 pcitag_t sc_pcitag; 95 struct pci_conf_state sc_pciconf; 96 void *sc_ih; /* interrupt handler */ 97 bus_space_tag_t sc_iot; 98 bus_space_handle_t sc_ioh; 99 void *sc_sdhook; 100 }; 101 102 #define BS_BAR 0x10 103 #define PCIR_RETRY_TIMEOUT_REG 0x40 104 #define PCIR_RETRY_TIMEOUT_MASK 0x0000ff00 105 106 static int ath_pci_match(struct device *, struct cfdata *, void *); 107 static void ath_pci_attach(struct device *, struct device *, void *); 108 static void ath_pci_shutdown(void *); 109 static void ath_pci_powerhook(int, void *); 110 static int ath_pci_detach(struct device *, int); 111 112 CFATTACH_DECL(ath_pci, 113 sizeof(struct ath_pci_softc), 114 ath_pci_match, 115 ath_pci_attach, 116 ath_pci_detach, 117 NULL); 118 119 static int 120 ath_pci_match(struct device *parent __unused, struct cfdata *match __unused, 121 void *aux) 122 { 123 const char* devname; 124 struct pci_attach_args *pa = aux; 125 126 devname = ath_hal_probe(PCI_VENDOR(pa->pa_id), PCI_PRODUCT(pa->pa_id)); 127 if (devname != NULL) 128 return 1; 129 return 0; 130 } 131 132 static int 133 ath_pci_setup(struct pci_attach_args *pa) 134 { 135 pci_chipset_tag_t pc = pa->pa_pc; 136 uint32_t res; 137 /* 138 * Enable memory mapping and bus mastering. 139 */ 140 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 141 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 142 PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_MEM_ENABLE); 143 res = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 144 145 if ((res & PCI_COMMAND_MEM_ENABLE) == 0) { 146 aprint_error("couldn't enable memory mapping\n"); 147 return 0; 148 } 149 if ((res & PCI_COMMAND_MASTER_ENABLE) == 0) { 150 aprint_error("couldn't enable bus mastering\n"); 151 return 0; 152 } 153 154 /* 155 * Disable retry timeout to keep PCI Tx retries from 156 * interfering with C3 CPU state. 157 */ 158 pci_conf_write(pc, pa->pa_tag, PCIR_RETRY_TIMEOUT_REG, 159 pci_conf_read(pc, pa->pa_tag, PCIR_RETRY_TIMEOUT_REG) & 160 ~PCIR_RETRY_TIMEOUT_MASK); 161 162 return 1; 163 } 164 165 static void 166 ath_pci_attach(struct device *parent __unused, struct device *self, void *aux) 167 { 168 struct ath_pci_softc *psc = (struct ath_pci_softc *)self; 169 struct ath_softc *sc = &psc->sc_sc; 170 struct pci_attach_args *pa = aux; 171 pci_chipset_tag_t pc = pa->pa_pc; 172 pci_intr_handle_t ih; 173 pcireg_t mem_type; 174 void *phook; 175 const char *intrstr = NULL; 176 177 psc->sc_pc = pc; 178 179 psc->sc_pcitag = pa->pa_tag; 180 181 if (!ath_pci_setup(pa)) 182 goto bad; 183 184 /* 185 * Setup memory-mapping of PCI registers. 186 */ 187 mem_type = pci_mapreg_type(pc, pa->pa_tag, BS_BAR); 188 if (mem_type != PCI_MAPREG_TYPE_MEM && 189 mem_type != PCI_MAPREG_MEM_TYPE_64BIT) { 190 aprint_error("bad pci register type %d\n", (int)mem_type); 191 goto bad; 192 } 193 if (pci_mapreg_map(pa, BS_BAR, mem_type, 0, &psc->sc_iot, 194 &psc->sc_ioh, NULL, NULL)) { 195 aprint_error("cannot map register space\n"); 196 goto bad; 197 } 198 199 sc->sc_st = HALTAG(psc->sc_iot); 200 sc->sc_sh = HALHANDLE(psc->sc_ioh); 201 202 sc->sc_invalid = 1; 203 204 /* 205 * Arrange interrupt line. 206 */ 207 if (pci_intr_map(pa, &ih)) { 208 aprint_error("couldn't map interrupt\n"); 209 goto bad1; 210 } 211 212 intrstr = pci_intr_string(pc, ih); 213 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, ath_intr, sc); 214 if (psc->sc_ih == NULL) { 215 aprint_error("couldn't map interrupt\n"); 216 goto bad2; 217 } 218 219 printf("\n"); 220 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 221 222 sc->sc_dmat = pa->pa_dmat; 223 224 psc->sc_sdhook = shutdownhook_establish(ath_pci_shutdown, psc); 225 if (psc->sc_sdhook == NULL) { 226 aprint_error("couldn't make shutdown hook\n"); 227 goto bad3; 228 } 229 230 phook = powerhook_establish(sc->sc_dev.dv_xname, 231 ath_pci_powerhook, psc); 232 if (phook == NULL) { 233 aprint_error("couldn't make power hook\n"); 234 goto bad3; 235 } 236 237 if (ath_attach(PCI_PRODUCT(pa->pa_id), sc) == 0) 238 return; 239 240 shutdownhook_disestablish(psc->sc_sdhook); 241 powerhook_disestablish(phook); 242 243 bad3: pci_intr_disestablish(pc, psc->sc_ih); 244 bad2: /* XXX */ 245 bad1: /* XXX */ 246 bad: 247 return; 248 } 249 250 static int 251 ath_pci_detach(struct device *self, int flags __unused) 252 { 253 struct ath_pci_softc *psc = (struct ath_pci_softc *)self; 254 255 shutdownhook_disestablish(psc->sc_sdhook); 256 ath_detach(&psc->sc_sc); 257 pci_intr_disestablish(psc->sc_pc, psc->sc_ih); 258 259 return (0); 260 } 261 262 static void 263 ath_pci_shutdown(void *self) 264 { 265 struct ath_pci_softc *psc = (struct ath_pci_softc *)self; 266 267 ath_shutdown(&psc->sc_sc); 268 } 269 270 static void 271 ath_pci_powerhook(int why, void *arg) 272 { 273 struct ath_pci_softc *sc = arg; 274 pci_chipset_tag_t pc = sc->sc_pc; 275 pcitag_t tag = sc->sc_pcitag; 276 277 switch (why) { 278 case PWR_SOFTSUSPEND: 279 ath_pci_shutdown(sc); 280 break; 281 case PWR_SUSPEND: 282 pci_conf_capture(pc, tag, &sc->sc_pciconf); 283 break; 284 case PWR_RESUME: 285 pci_conf_restore(pc, tag, &sc->sc_pciconf); 286 break; 287 } 288 289 return; 290 } 291