1 /* $NetBSD: if_ath_pci.c,v 1.17 2006/09/24 03:53:09 jmcneill Exp $ */ 2 3 /*- 4 * Copyright (c) 2002-2005 Sam Leffler, Errno Consulting 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer, 12 * without modification. 13 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 14 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 15 * redistribution must be conditioned upon including a substantially 16 * similar Disclaimer requirement for further binary redistribution. 17 * 3. Neither the names of the above-listed copyright holders nor the names 18 * of any contributors may be used to endorse or promote products derived 19 * from this software without specific prior written permission. 20 * 21 * Alternatively, this software may be distributed under the terms of the 22 * GNU General Public License ("GPL") version 2 as published by the Free 23 * Software Foundation. 24 * 25 * NO WARRANTY 26 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 28 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 29 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 30 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 31 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 34 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 36 * THE POSSIBILITY OF SUCH DAMAGES. 37 */ 38 39 #include <sys/cdefs.h> 40 #ifdef __FreeBSD__ 41 __FBSDID("$FreeBSD: src/sys/dev/ath/if_ath_pci.c,v 1.11 2005/01/18 18:08:16 sam Exp $"); 42 #endif 43 #ifdef __NetBSD__ 44 __KERNEL_RCSID(0, "$NetBSD: if_ath_pci.c,v 1.17 2006/09/24 03:53:09 jmcneill Exp $"); 45 #endif 46 47 /* 48 * PCI/Cardbus front-end for the Atheros Wireless LAN controller driver. 49 */ 50 51 #include <sys/param.h> 52 #include <sys/systm.h> 53 #include <sys/mbuf.h> 54 #include <sys/malloc.h> 55 #include <sys/kernel.h> 56 #include <sys/lock.h> 57 #include <sys/socket.h> 58 #include <sys/sockio.h> 59 #include <sys/errno.h> 60 #include <sys/device.h> 61 62 #include <machine/bus.h> 63 64 #include <net/if.h> 65 #include <net/if_media.h> 66 #include <net/if_ether.h> 67 #include <net/if_llc.h> 68 #include <net/if_arp.h> 69 70 #include <net80211/ieee80211_netbsd.h> 71 #include <net80211/ieee80211_var.h> 72 73 #ifdef INET 74 #include <netinet/in.h> 75 #endif 76 77 #include <dev/ic/ath_netbsd.h> 78 #include <dev/ic/athvar.h> 79 #include <contrib/dev/ath/ah.h> 80 81 #include <dev/pci/pcivar.h> 82 #include <dev/pci/pcireg.h> 83 #include <dev/pci/pcidevs.h> 84 85 #include <sys/device.h> 86 87 /* 88 * PCI glue. 89 */ 90 91 struct ath_pci_softc { 92 struct ath_softc sc_sc; 93 pci_chipset_tag_t sc_pc; 94 pcitag_t sc_pcitag; 95 struct pci_conf_state sc_pciconf; 96 void *sc_ih; /* interrupt handler */ 97 bus_space_tag_t sc_iot; 98 bus_space_handle_t sc_ioh; 99 void *sc_sdhook; 100 }; 101 102 #define BS_BAR 0x10 103 #define PCIR_RETRY_TIMEOUT_REG 0x40 104 #define PCIR_RETRY_TIMEOUT_MASK 0x0000ff00 105 106 static int ath_pci_match(struct device *, struct cfdata *, void *); 107 static void ath_pci_attach(struct device *, struct device *, void *); 108 static void ath_pci_shutdown(void *); 109 static void ath_pci_powerhook(int, void *); 110 static int ath_pci_detach(struct device *, int); 111 112 CFATTACH_DECL(ath_pci, 113 sizeof(struct ath_pci_softc), 114 ath_pci_match, 115 ath_pci_attach, 116 ath_pci_detach, 117 NULL); 118 119 static int 120 ath_pci_match(struct device *parent, struct cfdata *match, void *aux) 121 { 122 const char* devname; 123 struct pci_attach_args *pa = aux; 124 125 devname = ath_hal_probe(PCI_VENDOR(pa->pa_id), PCI_PRODUCT(pa->pa_id)); 126 if (devname != NULL) 127 return 1; 128 return 0; 129 } 130 131 static int 132 ath_pci_setup(struct pci_attach_args *pa) 133 { 134 pci_chipset_tag_t pc = pa->pa_pc; 135 uint32_t res; 136 /* 137 * Enable memory mapping and bus mastering. 138 */ 139 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 140 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 141 PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_MEM_ENABLE); 142 res = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 143 144 if ((res & PCI_COMMAND_MEM_ENABLE) == 0) { 145 aprint_error("couldn't enable memory mapping\n"); 146 return 0; 147 } 148 if ((res & PCI_COMMAND_MASTER_ENABLE) == 0) { 149 aprint_error("couldn't enable bus mastering\n"); 150 return 0; 151 } 152 153 /* 154 * Disable retry timeout to keep PCI Tx retries from 155 * interfering with C3 CPU state. 156 */ 157 pci_conf_write(pc, pa->pa_tag, PCIR_RETRY_TIMEOUT_REG, 158 pci_conf_read(pc, pa->pa_tag, PCIR_RETRY_TIMEOUT_REG) & 159 ~PCIR_RETRY_TIMEOUT_MASK); 160 161 return 1; 162 } 163 164 static void 165 ath_pci_attach(struct device *parent, struct device *self, void *aux) 166 { 167 struct ath_pci_softc *psc = (struct ath_pci_softc *)self; 168 struct ath_softc *sc = &psc->sc_sc; 169 struct pci_attach_args *pa = aux; 170 pci_chipset_tag_t pc = pa->pa_pc; 171 pci_intr_handle_t ih; 172 pcireg_t mem_type; 173 void *phook; 174 const char *intrstr = NULL; 175 176 psc->sc_pc = pc; 177 178 psc->sc_pcitag = pa->pa_tag; 179 180 if (!ath_pci_setup(pa)) 181 goto bad; 182 183 /* 184 * Setup memory-mapping of PCI registers. 185 */ 186 mem_type = pci_mapreg_type(pc, pa->pa_tag, BS_BAR); 187 if (mem_type != PCI_MAPREG_TYPE_MEM && 188 mem_type != PCI_MAPREG_MEM_TYPE_64BIT) { 189 aprint_error("bad pci register type %d\n", (int)mem_type); 190 goto bad; 191 } 192 if (pci_mapreg_map(pa, BS_BAR, mem_type, 0, &psc->sc_iot, 193 &psc->sc_ioh, NULL, NULL)) { 194 aprint_error("cannot map register space\n"); 195 goto bad; 196 } 197 198 sc->sc_st = HALTAG(psc->sc_iot); 199 sc->sc_sh = HALHANDLE(psc->sc_ioh); 200 201 sc->sc_invalid = 1; 202 203 /* 204 * Arrange interrupt line. 205 */ 206 if (pci_intr_map(pa, &ih)) { 207 aprint_error("couldn't map interrupt\n"); 208 goto bad1; 209 } 210 211 intrstr = pci_intr_string(pc, ih); 212 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, ath_intr, sc); 213 if (psc->sc_ih == NULL) { 214 aprint_error("couldn't map interrupt\n"); 215 goto bad2; 216 } 217 218 printf("\n"); 219 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 220 221 sc->sc_dmat = pa->pa_dmat; 222 223 psc->sc_sdhook = shutdownhook_establish(ath_pci_shutdown, psc); 224 if (psc->sc_sdhook == NULL) { 225 aprint_error("couldn't make shutdown hook\n"); 226 goto bad3; 227 } 228 229 phook = powerhook_establish(sc->sc_dev.dv_xname, 230 ath_pci_powerhook, psc); 231 if (phook == NULL) { 232 aprint_error("couldn't make power hook\n"); 233 goto bad3; 234 } 235 236 if (ath_attach(PCI_PRODUCT(pa->pa_id), sc) == 0) 237 return; 238 239 shutdownhook_disestablish(psc->sc_sdhook); 240 powerhook_disestablish(phook); 241 242 bad3: pci_intr_disestablish(pc, psc->sc_ih); 243 bad2: /* XXX */ 244 bad1: /* XXX */ 245 bad: 246 return; 247 } 248 249 static int 250 ath_pci_detach(struct device *self, int flags) 251 { 252 struct ath_pci_softc *psc = (struct ath_pci_softc *)self; 253 254 shutdownhook_disestablish(psc->sc_sdhook); 255 ath_detach(&psc->sc_sc); 256 pci_intr_disestablish(psc->sc_pc, psc->sc_ih); 257 258 return (0); 259 } 260 261 static void 262 ath_pci_shutdown(void *self) 263 { 264 struct ath_pci_softc *psc = (struct ath_pci_softc *)self; 265 266 ath_shutdown(&psc->sc_sc); 267 } 268 269 static void 270 ath_pci_powerhook(int why, void *arg) 271 { 272 struct ath_pci_softc *sc = arg; 273 pci_chipset_tag_t pc = sc->sc_pc; 274 pcitag_t tag = sc->sc_pcitag; 275 276 switch (why) { 277 case PWR_SOFTSUSPEND: 278 ath_pci_shutdown(sc); 279 break; 280 case PWR_SUSPEND: 281 pci_conf_capture(pc, tag, &sc->sc_pciconf); 282 break; 283 case PWR_RESUME: 284 pci_conf_restore(pc, tag, &sc->sc_pciconf); 285 break; 286 } 287 288 return; 289 } 290