1 /* $NetBSD: if_ath_pci.c,v 1.28 2008/01/28 18:18:37 dyoung Exp $ */ 2 3 /*- 4 * Copyright (c) 2002-2005 Sam Leffler, Errno Consulting 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer, 12 * without modification. 13 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 14 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 15 * redistribution must be conditioned upon including a substantially 16 * similar Disclaimer requirement for further binary redistribution. 17 * 3. Neither the names of the above-listed copyright holders nor the names 18 * of any contributors may be used to endorse or promote products derived 19 * from this software without specific prior written permission. 20 * 21 * Alternatively, this software may be distributed under the terms of the 22 * GNU General Public License ("GPL") version 2 as published by the Free 23 * Software Foundation. 24 * 25 * NO WARRANTY 26 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 28 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 29 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 30 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 31 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 34 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 36 * THE POSSIBILITY OF SUCH DAMAGES. 37 */ 38 39 #include <sys/cdefs.h> 40 #ifdef __FreeBSD__ 41 __FBSDID("$FreeBSD: src/sys/dev/ath/if_ath_pci.c,v 1.11 2005/01/18 18:08:16 sam Exp $"); 42 #endif 43 #ifdef __NetBSD__ 44 __KERNEL_RCSID(0, "$NetBSD: if_ath_pci.c,v 1.28 2008/01/28 18:18:37 dyoung Exp $"); 45 #endif 46 47 /* 48 * PCI/Cardbus front-end for the Atheros Wireless LAN controller driver. 49 */ 50 51 #include <sys/param.h> 52 #include <sys/systm.h> 53 #include <sys/mbuf.h> 54 #include <sys/malloc.h> 55 #include <sys/kernel.h> 56 #include <sys/socket.h> 57 #include <sys/errno.h> 58 #include <sys/device.h> 59 60 #include <net/if.h> 61 #include <net/if_media.h> 62 #include <net/if_ether.h> 63 64 #include <net80211/ieee80211_netbsd.h> 65 #include <net80211/ieee80211_var.h> 66 67 #ifdef INET 68 #include <netinet/in.h> 69 #endif 70 71 #include <dev/ic/ath_netbsd.h> 72 #include <dev/ic/athvar.h> 73 #include <contrib/dev/ath/ah.h> 74 75 #include <dev/pci/pcivar.h> 76 #include <dev/pci/pcireg.h> 77 #include <dev/pci/pcidevs.h> 78 79 /* 80 * PCI glue. 81 */ 82 83 struct ath_pci_softc { 84 struct ath_softc sc_sc; 85 pci_chipset_tag_t sc_pc; 86 pcitag_t sc_pcitag; 87 void *sc_ih; /* interrupt handler */ 88 bus_space_tag_t sc_iot; 89 bus_space_handle_t sc_ioh; 90 bus_size_t sc_mapsz; 91 }; 92 93 #define BS_BAR 0x10 94 95 static void ath_pci_attach(struct device *, struct device *, void *); 96 static int ath_pci_detach(struct device *, int); 97 static int ath_pci_match(struct device *, struct cfdata *, void *); 98 static int ath_pci_detach(struct device *, int); 99 100 CFATTACH_DECL(ath_pci, 101 sizeof(struct ath_pci_softc), 102 ath_pci_match, 103 ath_pci_attach, 104 ath_pci_detach, 105 NULL); 106 107 static int 108 ath_pci_match(struct device *parent, struct cfdata *match, void *aux) 109 { 110 const char* devname; 111 struct pci_attach_args *pa = aux; 112 113 devname = ath_hal_probe(PCI_VENDOR(pa->pa_id), PCI_PRODUCT(pa->pa_id)); 114 if (devname != NULL) 115 return 1; 116 return 0; 117 } 118 119 static bool 120 ath_pci_resume(device_t dv) 121 { 122 struct ath_pci_softc *sc = device_private(dv); 123 124 ath_resume(&sc->sc_sc); 125 126 return true; 127 } 128 129 static int 130 ath_pci_setup(struct ath_pci_softc *sc) 131 { 132 pcireg_t bhlc, csr, icr, lattimer; 133 /* 134 * Enable memory mapping and bus mastering. 135 */ 136 csr = pci_conf_read(sc->sc_pc, sc->sc_pcitag, PCI_COMMAND_STATUS_REG); 137 csr |= PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_MEM_ENABLE; 138 pci_conf_write(sc->sc_pc, sc->sc_pcitag, PCI_COMMAND_STATUS_REG, csr); 139 csr = pci_conf_read(sc->sc_pc, sc->sc_pcitag, PCI_COMMAND_STATUS_REG); 140 141 if ((csr & PCI_COMMAND_MEM_ENABLE) == 0) { 142 aprint_error("couldn't enable memory mapping\n"); 143 return 0; 144 } 145 if ((csr & PCI_COMMAND_MASTER_ENABLE) == 0) { 146 aprint_error("couldn't enable bus mastering\n"); 147 return 0; 148 } 149 150 /* 151 * XXX Both this comment and code are replicated in 152 * XXX cardbus_rescan(). 153 * 154 * Make sure the latency timer is set to some reasonable 155 * value. 156 * 157 * I will set the initial value of the Latency Timer here. 158 * 159 * While a PCI device owns the bus, its Latency Timer counts 160 * down bus cycles from its initial value to 0. Minimum 161 * Grant tells for how long the device wants to own the 162 * bus once it gets access, in units of 250ns. 163 * 164 * On a 33 MHz bus, there are 8 cycles per 250ns. So I 165 * multiply the Minimum Grant by 8 to find out the initial 166 * value of the Latency Timer. 167 * 168 * I never set a Latency Timer less than 0x10, since that 169 * is what the old code did. 170 */ 171 bhlc = pci_conf_read(sc->sc_pc, sc->sc_pcitag, PCI_BHLC_REG); 172 icr = pci_conf_read(sc->sc_pc, sc->sc_pcitag, PCI_INTERRUPT_REG); 173 lattimer = MAX(0x10, MIN(0xf8, 8 * PCI_MIN_GNT(icr))); 174 if (PCI_LATTIMER(bhlc) < lattimer) { 175 bhlc &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT); 176 bhlc |= (lattimer << PCI_LATTIMER_SHIFT); 177 pci_conf_write(sc->sc_pc, sc->sc_pcitag, PCI_BHLC_REG, bhlc); 178 } 179 return 1; 180 } 181 182 static void 183 ath_pci_attach(struct device *parent, struct device *self, void *aux) 184 { 185 struct ath_pci_softc *psc = (struct ath_pci_softc *)self; 186 struct ath_softc *sc = &psc->sc_sc; 187 struct pci_attach_args *pa = aux; 188 pci_chipset_tag_t pc = pa->pa_pc; 189 pci_intr_handle_t ih; 190 pcireg_t mem_type; 191 const char *intrstr = NULL; 192 193 psc->sc_pc = pc; 194 195 psc->sc_pcitag = pa->pa_tag; 196 197 if (!ath_pci_setup(psc)) 198 goto bad; 199 200 /* 201 * Setup memory-mapping of PCI registers. 202 */ 203 mem_type = pci_mapreg_type(pc, pa->pa_tag, BS_BAR); 204 if (mem_type != PCI_MAPREG_TYPE_MEM && 205 mem_type != PCI_MAPREG_MEM_TYPE_64BIT) { 206 aprint_error("bad pci register type %d\n", (int)mem_type); 207 goto bad; 208 } 209 if (pci_mapreg_map(pa, BS_BAR, mem_type, 0, &psc->sc_iot, 210 &psc->sc_ioh, NULL, &psc->sc_mapsz)) { 211 aprint_error("cannot map register space\n"); 212 goto bad; 213 } 214 215 sc->sc_st = HALTAG(psc->sc_iot); 216 sc->sc_sh = HALHANDLE(psc->sc_ioh); 217 218 sc->sc_invalid = 1; 219 220 /* 221 * Arrange interrupt line. 222 */ 223 if (pci_intr_map(pa, &ih)) { 224 aprint_error("couldn't map interrupt\n"); 225 goto bad1; 226 } 227 228 intrstr = pci_intr_string(pc, ih); 229 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, ath_intr, sc); 230 if (psc->sc_ih == NULL) { 231 aprint_error("couldn't map interrupt\n"); 232 goto bad2; 233 } 234 235 printf("\n"); 236 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 237 238 sc->sc_dmat = pa->pa_dmat; 239 240 ATH_LOCK_INIT(sc); 241 242 if (!pmf_device_register(self, NULL, ath_pci_resume)) 243 aprint_error_dev(self, "couldn't establish power handler\n"); 244 245 if (ath_attach(PCI_PRODUCT(pa->pa_id), sc) == 0) { 246 pmf_class_network_register(self, &sc->sc_if); 247 return; 248 } 249 ATH_LOCK_DESTROY(sc); 250 251 pci_intr_disestablish(pc, psc->sc_ih); 252 bad2: /* XXX */ 253 bad1: 254 bus_space_unmap(psc->sc_iot, psc->sc_ioh, psc->sc_mapsz); 255 bad: /* XXX */ 256 return; 257 } 258 259 static int 260 ath_pci_detach(struct device *self, int flags) 261 { 262 struct ath_pci_softc *psc = (struct ath_pci_softc *)self; 263 264 ath_detach(&psc->sc_sc); 265 pmf_device_deregister(self); 266 pci_intr_disestablish(psc->sc_pc, psc->sc_ih); 267 bus_space_unmap(psc->sc_iot, psc->sc_ioh, psc->sc_mapsz); 268 269 ATH_LOCK_DESTROY(&psc->sc_sc); 270 271 return (0); 272 } 273