1 /* $NetBSD: if_ath_pci.c,v 1.21 2007/04/17 21:50:31 dyoung Exp $ */ 2 3 /*- 4 * Copyright (c) 2002-2005 Sam Leffler, Errno Consulting 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer, 12 * without modification. 13 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 14 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 15 * redistribution must be conditioned upon including a substantially 16 * similar Disclaimer requirement for further binary redistribution. 17 * 3. Neither the names of the above-listed copyright holders nor the names 18 * of any contributors may be used to endorse or promote products derived 19 * from this software without specific prior written permission. 20 * 21 * Alternatively, this software may be distributed under the terms of the 22 * GNU General Public License ("GPL") version 2 as published by the Free 23 * Software Foundation. 24 * 25 * NO WARRANTY 26 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 28 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 29 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 30 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 31 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 34 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 36 * THE POSSIBILITY OF SUCH DAMAGES. 37 */ 38 39 #include <sys/cdefs.h> 40 #ifdef __FreeBSD__ 41 __FBSDID("$FreeBSD: src/sys/dev/ath/if_ath_pci.c,v 1.11 2005/01/18 18:08:16 sam Exp $"); 42 #endif 43 #ifdef __NetBSD__ 44 __KERNEL_RCSID(0, "$NetBSD: if_ath_pci.c,v 1.21 2007/04/17 21:50:31 dyoung Exp $"); 45 #endif 46 47 /* 48 * PCI/Cardbus front-end for the Atheros Wireless LAN controller driver. 49 */ 50 51 #include <sys/param.h> 52 #include <sys/systm.h> 53 #include <sys/mbuf.h> 54 #include <sys/malloc.h> 55 #include <sys/kernel.h> 56 #include <sys/socket.h> 57 #include <sys/errno.h> 58 #include <sys/device.h> 59 60 #include <net/if.h> 61 #include <net/if_media.h> 62 #include <net/if_ether.h> 63 64 #include <net80211/ieee80211_netbsd.h> 65 #include <net80211/ieee80211_var.h> 66 67 #ifdef INET 68 #include <netinet/in.h> 69 #endif 70 71 #include <dev/ic/ath_netbsd.h> 72 #include <dev/ic/athvar.h> 73 #include <contrib/dev/ath/ah.h> 74 75 #include <dev/pci/pcivar.h> 76 #include <dev/pci/pcireg.h> 77 #include <dev/pci/pcidevs.h> 78 79 /* 80 * PCI glue. 81 */ 82 83 struct ath_pci_softc { 84 struct ath_softc sc_sc; 85 pci_chipset_tag_t sc_pc; 86 pcitag_t sc_pcitag; 87 struct pci_conf_state sc_pciconf; 88 void *sc_ih; /* interrupt handler */ 89 bus_space_tag_t sc_iot; 90 bus_space_handle_t sc_ioh; 91 void *sc_sdhook; 92 }; 93 94 #define BS_BAR 0x10 95 #define PCIR_RETRY_TIMEOUT_REG 0x40 96 #define PCIR_RETRY_TIMEOUT_MASK __BITS(15,8) 97 98 static void ath_pci_attach(struct device *, struct device *, void *); 99 static int ath_pci_detach(struct device *, int); 100 static int ath_pci_match(struct device *, struct cfdata *, void *); 101 static void ath_pci_shutdown(void *); 102 static void ath_pci_powerhook(int, void *); 103 static int ath_pci_detach(struct device *, int); 104 105 CFATTACH_DECL(ath_pci, 106 sizeof(struct ath_pci_softc), 107 ath_pci_match, 108 ath_pci_attach, 109 ath_pci_detach, 110 NULL); 111 112 static int ath_pci_setup(struct pci_attach_args *); 113 114 static int 115 ath_pci_match(struct device *parent, struct cfdata *match, void *aux) 116 { 117 const char* devname; 118 struct pci_attach_args *pa = aux; 119 120 devname = ath_hal_probe(PCI_VENDOR(pa->pa_id), PCI_PRODUCT(pa->pa_id)); 121 if (devname != NULL) 122 return 1; 123 return 0; 124 } 125 126 static void 127 ath_disable_retry(pci_chipset_tag_t pc, pcitag_t tag) 128 { 129 #if 0 130 pcireg_t retry; 131 132 /* 133 * Disable retry timeout to keep PCI Tx retries from 134 * interfering with ACPI C3 CPU state. 135 */ 136 retry = pci_conf_read(pc, tag, PCIR_RETRY_TIMEOUT_REG); 137 pci_conf_write(pc, tag, PCIR_RETRY_TIMEOUT_REG, 138 retry & ~PCIR_RETRY_TIMEOUT_MASK); 139 #endif 140 } 141 142 static int 143 ath_pci_setup(struct pci_attach_args *pa) 144 { 145 pci_chipset_tag_t pc = pa->pa_pc; 146 pcireg_t bhlc, csr, icr, lattimer; 147 /* 148 * Enable memory mapping and bus mastering. 149 */ 150 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 151 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 152 PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_MEM_ENABLE); 153 csr = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 154 155 if ((csr & PCI_COMMAND_MEM_ENABLE) == 0) { 156 aprint_error("couldn't enable memory mapping\n"); 157 return 0; 158 } 159 if ((csr & PCI_COMMAND_MASTER_ENABLE) == 0) { 160 aprint_error("couldn't enable bus mastering\n"); 161 return 0; 162 } 163 164 ath_disable_retry(pc, pa->pa_tag); 165 166 /* 167 * XXX Both this comment and code are replicated in 168 * XXX cardbus_rescan(). 169 * 170 * Make sure the latency timer is set to some reasonable 171 * value. 172 * 173 * I will set the initial value of the Latency Timer here. 174 * 175 * While a PCI device owns the bus, its Latency Timer counts 176 * down bus cycles from its initial value to 0. Minimum 177 * Grant tells for how long the device wants to own the 178 * bus once it gets access, in units of 250ns. 179 * 180 * On a 33 MHz bus, there are 8 cycles per 250ns. So I 181 * multiply the Minimum Grant by 8 to find out the initial 182 * value of the Latency Timer. 183 * 184 * I never set a Latency Timer less than 0x10, since that 185 * is what the old code did. 186 */ 187 bhlc = pci_conf_read(pc, pa->pa_tag, PCI_BHLC_REG); 188 icr = pci_conf_read(pc, pa->pa_tag, PCI_INTERRUPT_REG); 189 lattimer = MAX(0x10, MIN(0xf8, 8 * PCI_MIN_GNT(icr))); 190 if (PCI_LATTIMER(bhlc) < lattimer) { 191 bhlc &= ~(PCI_LATTIMER_MASK << PCI_LATTIMER_SHIFT); 192 bhlc |= (lattimer << PCI_LATTIMER_SHIFT); 193 pci_conf_write(pc, pa->pa_tag, PCI_BHLC_REG, bhlc); 194 } 195 return 1; 196 } 197 198 static void 199 ath_pci_attach(struct device *parent, struct device *self, void *aux) 200 { 201 struct ath_pci_softc *psc = (struct ath_pci_softc *)self; 202 struct ath_softc *sc = &psc->sc_sc; 203 struct pci_attach_args *pa = aux; 204 pci_chipset_tag_t pc = pa->pa_pc; 205 pci_intr_handle_t ih; 206 pcireg_t mem_type; 207 void *phook; 208 const char *intrstr = NULL; 209 210 psc->sc_pc = pc; 211 212 psc->sc_pcitag = pa->pa_tag; 213 214 if (!ath_pci_setup(pa)) 215 goto bad; 216 217 /* 218 * Setup memory-mapping of PCI registers. 219 */ 220 mem_type = pci_mapreg_type(pc, pa->pa_tag, BS_BAR); 221 if (mem_type != PCI_MAPREG_TYPE_MEM && 222 mem_type != PCI_MAPREG_MEM_TYPE_64BIT) { 223 aprint_error("bad pci register type %d\n", (int)mem_type); 224 goto bad; 225 } 226 if (pci_mapreg_map(pa, BS_BAR, mem_type, 0, &psc->sc_iot, 227 &psc->sc_ioh, NULL, NULL)) { 228 aprint_error("cannot map register space\n"); 229 goto bad; 230 } 231 232 sc->sc_st = HALTAG(psc->sc_iot); 233 sc->sc_sh = HALHANDLE(psc->sc_ioh); 234 235 sc->sc_invalid = 1; 236 237 /* 238 * Arrange interrupt line. 239 */ 240 if (pci_intr_map(pa, &ih)) { 241 aprint_error("couldn't map interrupt\n"); 242 goto bad1; 243 } 244 245 intrstr = pci_intr_string(pc, ih); 246 psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, ath_intr, sc); 247 if (psc->sc_ih == NULL) { 248 aprint_error("couldn't map interrupt\n"); 249 goto bad2; 250 } 251 252 printf("\n"); 253 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 254 255 sc->sc_dmat = pa->pa_dmat; 256 257 psc->sc_sdhook = shutdownhook_establish(ath_pci_shutdown, psc); 258 if (psc->sc_sdhook == NULL) { 259 aprint_error("couldn't make shutdown hook\n"); 260 goto bad3; 261 } 262 263 phook = powerhook_establish(sc->sc_dev.dv_xname, 264 ath_pci_powerhook, psc); 265 if (phook == NULL) { 266 aprint_error("couldn't make power hook\n"); 267 goto bad3; 268 } 269 270 if (ath_attach(PCI_PRODUCT(pa->pa_id), sc) == 0) 271 return; 272 273 shutdownhook_disestablish(psc->sc_sdhook); 274 powerhook_disestablish(phook); 275 276 bad3: pci_intr_disestablish(pc, psc->sc_ih); 277 bad2: /* XXX */ 278 bad1: /* XXX */ 279 bad: 280 return; 281 } 282 283 static int 284 ath_pci_detach(struct device *self, int flags) 285 { 286 struct ath_pci_softc *psc = (struct ath_pci_softc *)self; 287 288 shutdownhook_disestablish(psc->sc_sdhook); 289 ath_detach(&psc->sc_sc); 290 pci_intr_disestablish(psc->sc_pc, psc->sc_ih); 291 292 return (0); 293 } 294 295 static void 296 ath_pci_shutdown(void *self) 297 { 298 struct ath_pci_softc *psc = (struct ath_pci_softc *)self; 299 300 ath_shutdown(&psc->sc_sc); 301 } 302 303 static void 304 ath_pci_powerhook(int why, void *arg) 305 { 306 struct ath_pci_softc *sc = arg; 307 pci_chipset_tag_t pc = sc->sc_pc; 308 pcitag_t tag = sc->sc_pcitag; 309 310 switch (why) { 311 case PWR_SOFTSUSPEND: 312 ath_pci_shutdown(sc); 313 break; 314 case PWR_SUSPEND: 315 pci_conf_capture(pc, tag, &sc->sc_pciconf); 316 break; 317 case PWR_RESUME: 318 pci_conf_restore(pc, tag, &sc->sc_pciconf); 319 ath_disable_retry(pc, tag); 320 break; 321 } 322 323 return; 324 } 325