xref: /netbsd-src/sys/dev/pci/gffb.c (revision d909946ca08dceb44d7d0f22ec9488679695d976)
1 /*	$NetBSD: gffb.c,v 1.11 2016/07/11 11:31:51 msaitoh Exp $	*/
2 
3 /*
4  * Copyright (c) 2013 Michael Lorenz
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26  */
27 
28 /*
29  * A console driver for nvidia geforce graphics controllers
30  * tested on macppc only so far, should work on other hardware as long as
31  * something sets up a usable graphics mode and sets the right device properties
32  * This driver should work with all NV1x hardware but so far it's been tested
33  * only on NV11 / GeForce2 MX. Needs testing with more hardware and if
34  * successful, PCI IDs need to be added to gffb_match()
35  */
36 
37 #include <sys/cdefs.h>
38 __KERNEL_RCSID(0, "$NetBSD: gffb.c,v 1.11 2016/07/11 11:31:51 msaitoh Exp $");
39 
40 #include <sys/param.h>
41 #include <sys/systm.h>
42 #include <sys/kernel.h>
43 #include <sys/device.h>
44 #include <sys/malloc.h>
45 #include <sys/lwp.h>
46 #include <sys/kauth.h>
47 #include <sys/atomic.h>
48 
49 #include <dev/videomode/videomode.h>
50 
51 #include <dev/pci/pcivar.h>
52 #include <dev/pci/pcireg.h>
53 #include <dev/pci/pcidevs.h>
54 #include <dev/pci/pciio.h>
55 #include <dev/pci/gffbreg.h>
56 
57 #include <dev/wscons/wsdisplayvar.h>
58 #include <dev/wscons/wsconsio.h>
59 #include <dev/wsfont/wsfont.h>
60 #include <dev/rasops/rasops.h>
61 #include <dev/wscons/wsdisplay_vconsvar.h>
62 #include <dev/pci/wsdisplay_pci.h>
63 #include <dev/wscons/wsdisplay_glyphcachevar.h>
64 
65 #include <dev/i2c/i2cvar.h>
66 
67 #include "opt_gffb.h"
68 #include "opt_vcons.h"
69 
70 #ifdef GFFB_DEBUG
71 #define DPRINTF printf
72 #else
73 #define DPRINTF while(0) printf
74 #endif
75 
76 struct gffb_softc {
77 	device_t sc_dev;
78 
79 	pci_chipset_tag_t sc_pc;
80 	pcitag_t sc_pcitag;
81 
82 	bus_space_tag_t sc_memt;
83 	bus_space_tag_t sc_iot;
84 
85 	bus_space_handle_t sc_regh, sc_fbh;
86 	bus_addr_t sc_fb, sc_reg;
87 	bus_size_t sc_fbsize, sc_regsize;
88 	uint8_t *sc_fbaddr;
89 	size_t sc_vramsize;
90 
91 	int sc_width, sc_height, sc_depth, sc_stride;
92 	int sc_locked;
93 	struct vcons_screen sc_console_screen;
94 	struct wsscreen_descr sc_defaultscreen_descr;
95 	const struct wsscreen_descr *sc_screens[1];
96 	struct wsscreen_list sc_screenlist;
97 	struct vcons_data vd;
98 	int sc_mode;
99 	u_char sc_cmap_red[256];
100 	u_char sc_cmap_green[256];
101 	u_char sc_cmap_blue[256];
102 	int sc_put, sc_current, sc_free;
103 	uint32_t sc_rop;
104 	void (*sc_putchar)(void *, int, int, u_int, long);
105 	kmutex_t sc_lock;
106 	glyphcache sc_gc;
107 };
108 
109 static int	gffb_match(device_t, cfdata_t, void *);
110 static void	gffb_attach(device_t, device_t, void *);
111 
112 CFATTACH_DECL_NEW(gffb, sizeof(struct gffb_softc),
113     gffb_match, gffb_attach, NULL, NULL);
114 
115 static int	gffb_ioctl(void *, void *, u_long, void *, int, struct lwp *);
116 static paddr_t	gffb_mmap(void *, void *, off_t, int);
117 static void	gffb_init_screen(void *, struct vcons_screen *, int, long *);
118 
119 static int	gffb_putcmap(struct gffb_softc *, struct wsdisplay_cmap *);
120 static int 	gffb_getcmap(struct gffb_softc *, struct wsdisplay_cmap *);
121 static void	gffb_restore_palette(struct gffb_softc *);
122 static int 	gffb_putpalreg(struct gffb_softc *, uint8_t, uint8_t,
123 			    uint8_t, uint8_t);
124 
125 static void	gffb_init(struct gffb_softc *);
126 
127 static void	gffb_make_room(struct gffb_softc *, int);
128 static void	gffb_sync(struct gffb_softc *);
129 
130 static void	gffb_rectfill(struct gffb_softc *, int, int, int, int,
131 			    uint32_t);
132 static void	gffb_bitblt(void *, int, int, int, int, int, int, int);
133 static void	gffb_rop(struct gffb_softc *, int);
134 
135 static void	gffb_cursor(void *, int, int, int);
136 static void	gffb_putchar(void *, int, int, u_int, long);
137 static void	gffb_copycols(void *, int, int, int, int);
138 static void	gffb_erasecols(void *, int, int, int, long);
139 static void	gffb_copyrows(void *, int, int, int);
140 static void	gffb_eraserows(void *, int, int, long);
141 
142 #define GFFB_READ_4(o) bus_space_read_4(sc->sc_memt, sc->sc_regh, (o))
143 #define GFFB_WRITE_4(o, v) bus_space_write_4(sc->sc_memt, sc->sc_regh, (o), (v))
144 
145 struct wsdisplay_accessops gffb_accessops = {
146 	gffb_ioctl,
147 	gffb_mmap,
148 	NULL,	/* alloc_screen */
149 	NULL,	/* free_screen */
150 	NULL,	/* show_screen */
151 	NULL, 	/* load_font */
152 	NULL,	/* pollc */
153 	NULL	/* scroll */
154 };
155 
156 static int
157 gffb_match(device_t parent, cfdata_t match, void *aux)
158 {
159 	struct pci_attach_args *pa = (struct pci_attach_args *)aux;
160 
161 	if (PCI_CLASS(pa->pa_class) != PCI_CLASS_DISPLAY)
162 		return 0;
163 	if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_NVIDIA)
164 		return 0;
165 
166 	/* only card tested on so far - likely need a list */
167 	if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_NVIDIA_GEFORCE2MX)
168 		return 100;
169 	return (0);
170 }
171 
172 static void
173 gffb_attach(device_t parent, device_t self, void *aux)
174 {
175 	struct gffb_softc	*sc = device_private(self);
176 	struct pci_attach_args	*pa = aux;
177 	struct rasops_info	*ri;
178 	bus_space_tag_t		tag;
179 	struct wsemuldisplaydev_attach_args aa;
180 	prop_dictionary_t	dict;
181 	unsigned long		defattr;
182 	bool			is_console = FALSE;
183 	int			i, j, f;
184 	uint8_t			cmap[768];
185 
186 	sc->sc_pc = pa->pa_pc;
187 	sc->sc_pcitag = pa->pa_tag;
188 	sc->sc_memt = pa->pa_memt;
189 	sc->sc_iot = pa->pa_iot;
190 	sc->sc_dev = self;
191 
192 	pci_aprint_devinfo(pa, NULL);
193 
194 	/* fill in parameters from properties */
195 	dict = device_properties(self);
196 	if (!prop_dictionary_get_uint32(dict, "width", &sc->sc_width)) {
197 		aprint_error("%s: no width property\n", device_xname(self));
198 		return;
199 	}
200 	if (!prop_dictionary_get_uint32(dict, "height", &sc->sc_height)) {
201 		aprint_error("%s: no height property\n", device_xname(self));
202 		return;
203 	}
204 
205 #ifdef GLYPHCACHE_DEBUG
206 	/* leave some visible VRAM unused so we can see the glyph cache */
207 	sc->sc_height -= 300;
208 #endif
209 
210 	if (!prop_dictionary_get_uint32(dict, "depth", &sc->sc_depth)) {
211 		aprint_error("%s: no depth property\n", device_xname(self));
212 		return;
213 	}
214 	if (!prop_dictionary_get_uint32(dict, "linebytes", &sc->sc_stride)) {
215 		aprint_error("%s: no linebytes property\n",
216 		    device_xname(self));
217 		return;
218 	}
219 
220 	prop_dictionary_get_bool(dict, "is_console", &is_console);
221 
222 	if (pci_mapreg_map(pa, 0x10, PCI_MAPREG_TYPE_MEM, 0,
223 	    &tag, &sc->sc_regh, &sc->sc_reg, &sc->sc_regsize)) {
224 		aprint_error("%s: failed to map registers.\n",
225 		    device_xname(sc->sc_dev));
226 	}
227 	sc->sc_vramsize = GFFB_READ_4(GFFB_VRAM) & 0xfff00000;
228 
229 	/* don't map more VRAM than we actually have */
230 	if (pci_mapreg_info(sc->sc_pc, sc->sc_pcitag,
231 	    0x14, PCI_MAPREG_TYPE_MEM, &sc->sc_fb, &sc->sc_fbsize, &f)) {
232 		aprint_error("%s: can't find the framebuffer?!\n",
233 		    device_xname(sc->sc_dev));
234 	}
235 
236 	if (bus_space_map(sc->sc_memt, sc->sc_fb, sc->sc_vramsize,
237 	    BUS_SPACE_MAP_PREFETCHABLE | BUS_SPACE_MAP_LINEAR,
238 	    &sc->sc_fbh)) {
239 		aprint_error("%s: failed to map the framebuffer.\n",
240 		    device_xname(sc->sc_dev));
241 	}
242 	sc->sc_fbaddr = bus_space_vaddr(tag, sc->sc_fbh);
243 
244 	aprint_normal("%s: %d MB aperture at 0x%08x\n", device_xname(self),
245 	    (int)(sc->sc_fbsize >> 20), (uint32_t)sc->sc_fb);
246 	aprint_normal_dev(sc->sc_dev, "%d MB video memory\n",
247 	    (int)(sc->sc_vramsize >> 20));
248 
249 	sc->sc_defaultscreen_descr = (struct wsscreen_descr){
250 		"default",
251 		0, 0,
252 		NULL,
253 		8, 16,
254 		WSSCREEN_WSCOLORS | WSSCREEN_HILIT,
255 		NULL
256 	};
257 	sc->sc_screens[0] = &sc->sc_defaultscreen_descr;
258 	sc->sc_screenlist = (struct wsscreen_list){1, sc->sc_screens};
259 	sc->sc_mode = WSDISPLAYIO_MODE_EMUL;
260 	sc->sc_locked = 0;
261 
262 #ifdef GFFB_DEBUG
263 	printf("put: %08x\n", GFFB_READ_4(GFFB_FIFO_PUT));
264 	printf("get: %08x\n", GFFB_READ_4(GFFB_FIFO_GET));
265 #endif
266 
267 	/*
268 	 * we don't have hardware synchronization so we need a lock to serialize
269 	 * access to the DMA buffer between normal and kernel output
270 	 * actually it might be enough to use atomic ops on sc_current, sc_free
271 	 * etc. but for now we'll play it safe
272 	 * XXX we will probably deadlock if we take an interrupt while sc_lock
273 	 * is held and then try to printf()
274 	 */
275 	mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_NONE);
276 
277 	/* init engine here */
278 	gffb_init(sc);
279 
280 	vcons_init(&sc->vd, sc, &sc->sc_defaultscreen_descr,
281 	    &gffb_accessops);
282 	sc->vd.init_screen = gffb_init_screen;
283 
284 
285 	ri = &sc->sc_console_screen.scr_ri;
286 
287 	sc->sc_gc.gc_bitblt = gffb_bitblt;
288 	sc->sc_gc.gc_blitcookie = sc;
289 	sc->sc_gc.gc_rop = 0xcc;
290 
291 	if (is_console) {
292 		vcons_init_screen(&sc->vd, &sc->sc_console_screen, 1,
293 		    &defattr);
294 		sc->sc_console_screen.scr_flags |= VCONS_SCREEN_IS_STATIC;
295 
296 		gffb_rectfill(sc, 0, 0, sc->sc_width, sc->sc_height,
297 		    ri->ri_devcmap[(defattr >> 16) & 0xf]);
298 
299 		sc->sc_defaultscreen_descr.textops = &ri->ri_ops;
300 		sc->sc_defaultscreen_descr.capabilities = ri->ri_caps;
301 		sc->sc_defaultscreen_descr.nrows = ri->ri_rows;
302 		sc->sc_defaultscreen_descr.ncols = ri->ri_cols;
303 
304 		glyphcache_init(&sc->sc_gc, sc->sc_height + 5,
305 				(0x800000 / sc->sc_stride) - sc->sc_height - 5,
306 				sc->sc_width,
307 				ri->ri_font->fontwidth,
308 				ri->ri_font->fontheight,
309 				defattr);
310 
311 		wsdisplay_cnattach(&sc->sc_defaultscreen_descr, ri, 0, 0,
312 		    defattr);
313 		vcons_replay_msgbuf(&sc->sc_console_screen);
314 	} else {
315 		/*
316 		 * since we're not the console we can postpone the rest
317 		 * until someone actually allocates a screen for us
318 		 */
319 		if (sc->sc_console_screen.scr_ri.ri_rows == 0) {
320 			/* do some minimal setup to avoid weirdnesses later */
321 			vcons_init_screen(&sc->vd, &sc->sc_console_screen, 1,
322 			    &defattr);
323 		} else
324 			(*ri->ri_ops.allocattr)(ri, 0, 0, 0, &defattr);
325 
326 		glyphcache_init(&sc->sc_gc, sc->sc_height + 5,
327 				(0x800000 / sc->sc_stride) - sc->sc_height - 5,
328 				sc->sc_width,
329 				ri->ri_font->fontwidth,
330 				ri->ri_font->fontheight,
331 				defattr);
332 	}
333 
334 	j = 0;
335 	rasops_get_cmap(ri, cmap, sizeof(cmap));
336 	for (i = 0; i < 256; i++) {
337 		sc->sc_cmap_red[i] = cmap[j];
338 		sc->sc_cmap_green[i] = cmap[j + 1];
339 		sc->sc_cmap_blue[i] = cmap[j + 2];
340 		gffb_putpalreg(sc, i, cmap[j], cmap[j + 1], cmap[j + 2]);
341 		j += 3;
342 	}
343 
344 	/* no suspend/resume support yet */
345 	pmf_device_register(sc->sc_dev, NULL, NULL);
346 
347 	aa.console = is_console;
348 	aa.scrdata = &sc->sc_screenlist;
349 	aa.accessops = &gffb_accessops;
350 	aa.accesscookie = &sc->vd;
351 
352 	config_found(sc->sc_dev, &aa, wsemuldisplaydevprint);
353 
354 #ifdef GFFB_DEBUG
355 	for (i = 0; i < 40; i++) {
356 		for (j = 0; j < 40; j++) {
357 			gffb_rectfill(sc, i * 20, j * 20, 20, 20,
358 			    (i + j ) & 1 ? 0xe0e0e0e0 : 0x03030303);
359 		}
360 	}
361 
362 	gffb_rectfill(sc, 0, 800, 1280, 224, 0x92929292);
363 	gffb_bitblt(sc, 0, 10, 10, 810, 200, 20, 0xcc);
364 	gffb_bitblt(sc, 0, 10, 10, 840, 300, 20, 0xcc);
365 	gffb_bitblt(sc, 0, 10, 10, 870, 400, 20, 0xcc);
366 	gffb_bitblt(sc, 0, 10, 10, 900, 500, 20, 0xcc);
367 	gffb_bitblt(sc, 0, 10, 10, 930, 600, 20, 0xcc);
368 	gffb_bitblt(sc, 0, 10, 610, 810, 200, 20, 0xcc);
369 	gffb_bitblt(sc, 0, 10, 610, 840, 300, 20, 0xcc);
370 	gffb_bitblt(sc, 0, 10, 610, 870, 400, 20, 0xcc);
371 	gffb_bitblt(sc, 0, 10, 610, 900, 500, 20, 0xcc);
372 	gffb_bitblt(sc, 0, 10, 610, 930, 600, 20, 0xcc);
373 	gffb_sync(sc);
374 	printf("put %x current %x\n", sc->sc_put, sc->sc_current);
375 #endif
376 }
377 
378 static int
379 gffb_ioctl(void *v, void *vs, u_long cmd, void *data, int flag, struct lwp *l)
380 {
381 	struct vcons_data *vd = v;
382 	struct gffb_softc *sc = vd->cookie;
383 	struct wsdisplay_fbinfo *wdf;
384 	struct vcons_screen *ms = vd->active;
385 
386 	switch (cmd) {
387 	case WSDISPLAYIO_GTYPE:
388 		*(u_int *)data = WSDISPLAY_TYPE_PCIMISC;
389 		return 0;
390 
391 	/* PCI config read/write passthrough. */
392 	case PCI_IOC_CFGREAD:
393 	case PCI_IOC_CFGWRITE:
394 		return pci_devioctl(sc->sc_pc, sc->sc_pcitag,
395 		    cmd, data, flag, l);
396 
397 	case WSDISPLAYIO_GET_BUSID:
398 		return wsdisplayio_busid_pci(sc->sc_dev, sc->sc_pc,
399 		    sc->sc_pcitag, data);
400 
401 	case WSDISPLAYIO_GINFO:
402 		if (ms == NULL)
403 			return ENODEV;
404 		wdf = (void *)data;
405 		wdf->height = ms->scr_ri.ri_height;
406 		wdf->width = ms->scr_ri.ri_width;
407 		wdf->depth = ms->scr_ri.ri_depth;
408 		wdf->cmsize = 256;
409 		return 0;
410 
411 	case WSDISPLAYIO_GETCMAP:
412 		return gffb_getcmap(sc,
413 		    (struct wsdisplay_cmap *)data);
414 
415 	case WSDISPLAYIO_PUTCMAP:
416 		return gffb_putcmap(sc,
417 		    (struct wsdisplay_cmap *)data);
418 
419 	case WSDISPLAYIO_LINEBYTES:
420 		*(u_int *)data = sc->sc_stride;
421 		return 0;
422 
423 	case WSDISPLAYIO_SMODE: {
424 		int new_mode = *(int*)data;
425 		if (new_mode != sc->sc_mode) {
426 			sc->sc_mode = new_mode;
427 			if(new_mode == WSDISPLAYIO_MODE_EMUL) {
428 				gffb_init(sc);
429 				gffb_restore_palette(sc);
430 				glyphcache_wipe(&sc->sc_gc);
431 				gffb_rectfill(sc, 0, 0, sc->sc_width,
432 				    sc->sc_height, ms->scr_ri.ri_devcmap[
433 				    (ms->scr_defattr >> 16) & 0xf]);
434 				vcons_redraw_screen(ms);
435 			}
436 		}
437 		}
438 		return 0;
439 
440 	case WSDISPLAYIO_GET_EDID: {
441 		struct wsdisplayio_edid_info *d = data;
442 		return wsdisplayio_get_edid(sc->sc_dev, d);
443 	}
444 
445 	case WSDISPLAYIO_GET_FBINFO: {
446 		struct wsdisplayio_fbinfo *fbi = data;
447 		return wsdisplayio_get_fbinfo(&ms->scr_ri, fbi);
448 	}
449 	}
450 	return EPASSTHROUGH;
451 }
452 
453 static paddr_t
454 gffb_mmap(void *v, void *vs, off_t offset, int prot)
455 {
456 	struct vcons_data *vd = v;
457 	struct gffb_softc *sc = vd->cookie;
458 	paddr_t pa;
459 
460 	/* 'regular' framebuffer mmap()ing */
461 	if (offset < sc->sc_vramsize) {
462 		pa = bus_space_mmap(sc->sc_memt, sc->sc_fb + offset + 0x2000,
463 		    0, prot, BUS_SPACE_MAP_LINEAR);
464 		return pa;
465 	}
466 
467 	/*
468 	 * restrict all other mappings to processes with superuser privileges
469 	 * or the kernel itself
470 	 */
471 	if (kauth_authorize_machdep(kauth_cred_get(),
472 	    KAUTH_MACHDEP_UNMANAGEDMEM,
473 	    NULL, NULL, NULL, NULL) != 0) {
474 		aprint_normal("%s: mmap() rejected.\n",
475 		    device_xname(sc->sc_dev));
476 		return -1;
477 	}
478 
479 	if ((offset >= sc->sc_fb) && (offset < (sc->sc_fb + sc->sc_fbsize))) {
480 		pa = bus_space_mmap(sc->sc_memt, offset, 0, prot,
481 		    BUS_SPACE_MAP_LINEAR);
482 		return pa;
483 	}
484 
485 	if ((offset >= sc->sc_reg) &&
486 	    (offset < (sc->sc_reg + sc->sc_regsize))) {
487 		pa = bus_space_mmap(sc->sc_memt, offset, 0, prot,
488 		    BUS_SPACE_MAP_LINEAR);
489 		return pa;
490 	}
491 
492 #ifdef PCI_MAGIC_IO_RANGE
493 	/* allow mapping of IO space */
494 	if ((offset >= PCI_MAGIC_IO_RANGE) &&
495 	    (offset < PCI_MAGIC_IO_RANGE + 0x10000)) {
496 		pa = bus_space_mmap(sc->sc_iot, offset - PCI_MAGIC_IO_RANGE,
497 		    0, prot, BUS_SPACE_MAP_LINEAR);
498 		return pa;
499 	}
500 #endif
501 
502 	return -1;
503 }
504 
505 static void
506 gffb_init_screen(void *cookie, struct vcons_screen *scr,
507     int existing, long *defattr)
508 {
509 	struct gffb_softc *sc = cookie;
510 	struct rasops_info *ri = &scr->scr_ri;
511 
512 	ri->ri_depth = sc->sc_depth;
513 	ri->ri_width = sc->sc_width;
514 	ri->ri_height = sc->sc_height;
515 	ri->ri_stride = sc->sc_stride;
516 	ri->ri_bits = sc->sc_fbaddr + 0x2000;
517 	ri->ri_flg = RI_CENTER;
518 	if (sc->sc_depth == 8)
519 		ri->ri_flg |= RI_8BIT_IS_RGB | RI_ENABLE_ALPHA;
520 
521 	rasops_init(ri, 0, 0);
522 	ri->ri_caps = WSSCREEN_WSCOLORS;
523 
524 	rasops_reconfig(ri, sc->sc_height / ri->ri_font->fontheight,
525 		    sc->sc_width / ri->ri_font->fontwidth);
526 
527 	ri->ri_hw = scr;
528 
529 	sc->sc_putchar = ri->ri_ops.putchar;
530 	ri->ri_ops.copyrows = gffb_copyrows;
531 	ri->ri_ops.copycols = gffb_copycols;
532 	ri->ri_ops.eraserows = gffb_eraserows;
533 	ri->ri_ops.erasecols = gffb_erasecols;
534 	ri->ri_ops.cursor = gffb_cursor;
535 	ri->ri_ops.putchar = gffb_putchar;
536 }
537 
538 static int
539 gffb_putcmap(struct gffb_softc *sc, struct wsdisplay_cmap *cm)
540 {
541 	u_char *r, *g, *b;
542 	u_int index = cm->index;
543 	u_int count = cm->count;
544 	int i, error;
545 	u_char rbuf[256], gbuf[256], bbuf[256];
546 
547 #ifdef GFFB_DEBUG
548 	aprint_debug("putcmap: %d %d\n",index, count);
549 #endif
550 	if (cm->index >= 256 || cm->count > 256 ||
551 	    (cm->index + cm->count) > 256)
552 		return EINVAL;
553 	error = copyin(cm->red, &rbuf[index], count);
554 	if (error)
555 		return error;
556 	error = copyin(cm->green, &gbuf[index], count);
557 	if (error)
558 		return error;
559 	error = copyin(cm->blue, &bbuf[index], count);
560 	if (error)
561 		return error;
562 
563 	memcpy(&sc->sc_cmap_red[index], &rbuf[index], count);
564 	memcpy(&sc->sc_cmap_green[index], &gbuf[index], count);
565 	memcpy(&sc->sc_cmap_blue[index], &bbuf[index], count);
566 
567 	r = &sc->sc_cmap_red[index];
568 	g = &sc->sc_cmap_green[index];
569 	b = &sc->sc_cmap_blue[index];
570 
571 	for (i = 0; i < count; i++) {
572 		gffb_putpalreg(sc, index, *r, *g, *b);
573 		index++;
574 		r++, g++, b++;
575 	}
576 	return 0;
577 }
578 
579 static int
580 gffb_getcmap(struct gffb_softc *sc, struct wsdisplay_cmap *cm)
581 {
582 	u_int index = cm->index;
583 	u_int count = cm->count;
584 	int error;
585 
586 	if (index >= 255 || count > 256 || index + count > 256)
587 		return EINVAL;
588 
589 	error = copyout(&sc->sc_cmap_red[index],   cm->red,   count);
590 	if (error)
591 		return error;
592 	error = copyout(&sc->sc_cmap_green[index], cm->green, count);
593 	if (error)
594 		return error;
595 	error = copyout(&sc->sc_cmap_blue[index],  cm->blue,  count);
596 	if (error)
597 		return error;
598 
599 	return 0;
600 }
601 
602 static void
603 gffb_restore_palette(struct gffb_softc *sc)
604 {
605 	int i;
606 
607 	for (i = 0; i < (1 << sc->sc_depth); i++) {
608 		gffb_putpalreg(sc, i, sc->sc_cmap_red[i],
609 		    sc->sc_cmap_green[i], sc->sc_cmap_blue[i]);
610 	}
611 }
612 
613 static int
614 gffb_putpalreg(struct gffb_softc *sc, uint8_t idx, uint8_t r, uint8_t g,
615     uint8_t b)
616 {
617 	/* port 0 */
618 	bus_space_write_1(sc->sc_memt, sc->sc_regh,
619 	    GFFB_PDIO0 + GFFB_PEL_IW, idx);
620 	bus_space_write_1(sc->sc_memt, sc->sc_regh,
621 	    GFFB_PDIO0 + GFFB_PEL_D, r);
622 	bus_space_write_1(sc->sc_memt, sc->sc_regh,
623 	    GFFB_PDIO0 + GFFB_PEL_D, g);
624 	bus_space_write_1(sc->sc_memt, sc->sc_regh,
625 	    GFFB_PDIO0 + GFFB_PEL_D, b);
626 
627 	/* port 1 */
628 	bus_space_write_1(sc->sc_memt, sc->sc_regh,
629 	    GFFB_PDIO1 + GFFB_PEL_IW, idx);
630 	bus_space_write_1(sc->sc_memt, sc->sc_regh,
631 	    GFFB_PDIO1 + GFFB_PEL_D, r);
632 	bus_space_write_1(sc->sc_memt, sc->sc_regh,
633 	    GFFB_PDIO1 + GFFB_PEL_D, g);
634 	bus_space_write_1(sc->sc_memt, sc->sc_regh,
635 	    GFFB_PDIO1 + GFFB_PEL_D, b);
636 
637 	return 0;
638 }
639 
640 
641 static void
642 gffb_dma_kickoff(struct gffb_softc *sc)
643 {
644 
645 	if (sc->sc_current != sc->sc_put) {
646 		sc->sc_put = sc->sc_current;
647 		membar_sync();
648 		(void)*sc->sc_fbaddr;
649 		GFFB_WRITE_4(GFFB_FIFO_PUT, sc->sc_put);
650 		membar_sync();
651 	}
652 }
653 
654 static void
655 gffb_dmanext(struct gffb_softc *sc, uint32_t data)
656 {
657 	bus_space_write_stream_4(sc->sc_memt, sc->sc_fbh, sc->sc_current, data);
658 	sc->sc_current += 4;
659 }
660 
661 static void
662 gffb_dmastart(struct gffb_softc *sc, uint32_t tag, int size)
663 {
664 	if(sc->sc_free <= (size << 2))
665 		gffb_make_room(sc, size);
666 	gffb_dmanext(sc, ((size) << 18) | (tag));
667 	sc->sc_free -= ((size + 1) << 2);
668 }
669 
670 /*
671  * from xf86_video_nv/nv_xaa.c:
672  * There is a HW race condition with videoram command buffers.
673  * You can't jump to the location of your put offset.  We write put
674  * at the jump offset + SKIPS dwords with noop padding in between
675  * to solve this problem
676  */
677 
678 #define SKIPS  8
679 
680 static void
681 gffb_make_room(struct gffb_softc *sc, int size)
682 {
683 	uint32_t get;
684 
685 	size = (size + 1) << 2;	/* slots -> offset */
686 
687 	while (sc->sc_free < size) {
688 		get = GFFB_READ_4(GFFB_FIFO_GET);
689 
690 		if (sc->sc_put >= get) {
691 			sc->sc_free = 0x2000 - sc->sc_current;
692 			if (sc->sc_free < size) {
693 				gffb_dmanext(sc, 0x20000000);
694 				if(get <= (SKIPS << 2)) {
695 					if (sc->sc_put <= (SKIPS << 2)) {
696 						/* corner case - will be idle */
697 						GFFB_WRITE_4(GFFB_FIFO_PUT,
698 						    (SKIPS + 1) << 2);
699 					}
700 					do {
701 						get =GFFB_READ_4(GFFB_FIFO_GET);
702 					} while (get <= (SKIPS << 2));
703 				}
704 				GFFB_WRITE_4(GFFB_FIFO_PUT, SKIPS << 2);
705 				sc->sc_current = sc->sc_put = (SKIPS << 2);
706 				sc->sc_free = get - ((SKIPS + 1) << 2);
707 			}
708 		} else
709 			sc->sc_free = get - sc->sc_current - 4;
710 	}
711 }
712 
713 static void
714 gffb_sync(struct gffb_softc *sc)
715 {
716 	int bail;
717 	int i;
718 
719 	/*
720 	 * if there are commands in the buffer make sure the chip is actually
721 	 * trying to run them
722 	 */
723 	gffb_dma_kickoff(sc);
724 
725 	/* now wait for the command buffer to drain... */
726 	bail = 100000000;
727 	while ((GFFB_READ_4(GFFB_FIFO_GET) != sc->sc_put) && (bail > 0)) {
728 		bail--;
729 	}
730 	if (bail == 0) goto crap;
731 
732 	/* ... and for the engine to go idle */
733 	bail = 100000000;
734 	while((GFFB_READ_4(GFFB_BUSY) != 0) && (bail > 0)) {
735 		bail--;
736 	}
737 	if (bail == 0) goto crap;
738 	return;
739 crap:
740 	/* if we time out fill the buffer with NOPs and cross fingers */
741 	sc->sc_put = 0;
742 	sc->sc_current = 0;
743 	for (i = 0; i < 0x2000; i += 4)
744 		bus_space_write_stream_4(sc->sc_memt, sc->sc_fbh, i, 0);
745 	aprint_error_dev(sc->sc_dev, "DMA lockup\n");
746 }
747 
748 static void
749 gffb_init(struct gffb_softc *sc)
750 {
751 	int i;
752 	uint32_t foo;
753 
754 	/* init display start */
755 	GFFB_WRITE_4(GFFB_CRTC0 + GFFB_DISPLAYSTART, 0x2000);
756 	GFFB_WRITE_4(GFFB_CRTC1 + GFFB_DISPLAYSTART, 0x2000);
757 	GFFB_WRITE_4(GFFB_PDIO0 + GFFB_PEL_MASK, 0xff);
758 	GFFB_WRITE_4(GFFB_PDIO1 + GFFB_PEL_MASK, 0xff);
759 
760 	/* DMA stuff. A whole lot of magic number voodoo from xf86-video-nv */
761 	GFFB_WRITE_4(GFFB_PMC + 0x140, 0);
762 	GFFB_WRITE_4(GFFB_PMC + 0x200, 0xffff00ff);
763 	GFFB_WRITE_4(GFFB_PMC + 0x200, 0xffffffff);
764 	GFFB_WRITE_4(GFFB_PTIMER + 0x800, 8);
765 	GFFB_WRITE_4(GFFB_PTIMER + 0x840, 3);
766 	GFFB_WRITE_4(GFFB_PTIMER + 0x500, 0);
767 	GFFB_WRITE_4(GFFB_PTIMER + 0x400, 0xffffffff);
768 	for (i = 0; i < 8; i++) {
769 		GFFB_WRITE_4(GFFB_PMC + 0x240 + (i * 0x10), 0);
770 		GFFB_WRITE_4(GFFB_PMC + 0x244 + (i * 0x10),
771 		    sc->sc_vramsize - 1);
772 	}
773 
774 	for (i = 0; i < 8; i++) {
775 		GFFB_WRITE_4(GFFB_PFB + 0x0240 + (i * 0x10), 0);
776 		GFFB_WRITE_4(GFFB_PFB + 0x0244 + (i * 0x10),
777 		    sc->sc_vramsize - 1);
778 	}
779 
780 	GFFB_WRITE_4(GFFB_PRAMIN, 0x80000010);
781 	GFFB_WRITE_4(GFFB_PRAMIN + 0x04, 0x80011201);
782 	GFFB_WRITE_4(GFFB_PRAMIN + 0x08, 0x80000011);
783 	GFFB_WRITE_4(GFFB_PRAMIN + 0x0c, 0x80011202);
784 	GFFB_WRITE_4(GFFB_PRAMIN + 0x10, 0x80000012);
785 	GFFB_WRITE_4(GFFB_PRAMIN + 0x14, 0x80011203);
786 	GFFB_WRITE_4(GFFB_PRAMIN + 0x18, 0x80000013);
787 	GFFB_WRITE_4(GFFB_PRAMIN + 0x1c, 0x80011204);
788 	GFFB_WRITE_4(GFFB_PRAMIN + 0x20, 0x80000014);
789 	GFFB_WRITE_4(GFFB_PRAMIN + 0x24, 0x80011205);
790 	GFFB_WRITE_4(GFFB_PRAMIN + 0x28, 0x80000015);
791 	GFFB_WRITE_4(GFFB_PRAMIN + 0x2c, 0x80011206);
792 	GFFB_WRITE_4(GFFB_PRAMIN + 0x30, 0x80000016);
793 	GFFB_WRITE_4(GFFB_PRAMIN + 0x34, 0x80011207);
794 	GFFB_WRITE_4(GFFB_PRAMIN + 0x38, 0x80000017);
795 	GFFB_WRITE_4(GFFB_PRAMIN + 0x3c, 0x80011208);
796 	GFFB_WRITE_4(GFFB_PRAMIN + 0x2000, 0x00003000);
797 	GFFB_WRITE_4(GFFB_PRAMIN + 0x2004, sc->sc_vramsize - 1);
798 	GFFB_WRITE_4(GFFB_PRAMIN + 0x2008, 0x00000002);
799 	GFFB_WRITE_4(GFFB_PRAMIN + 0x200c, 0x00000002);
800 	GFFB_WRITE_4(GFFB_PRAMIN + 0x2010, 0x01008042);	/* different for nv40 */
801 	GFFB_WRITE_4(GFFB_PRAMIN + 0x2014, 0);
802 	GFFB_WRITE_4(GFFB_PRAMIN + 0x2018, 0x12001200);
803 	GFFB_WRITE_4(GFFB_PRAMIN + 0x201c, 0);
804 	GFFB_WRITE_4(GFFB_PRAMIN + 0x2020, 0x01008043);
805 	GFFB_WRITE_4(GFFB_PRAMIN + 0x2024, 0);
806 	GFFB_WRITE_4(GFFB_PRAMIN + 0x2028, 0);
807 	GFFB_WRITE_4(GFFB_PRAMIN + 0x202c, 0);
808 	GFFB_WRITE_4(GFFB_PRAMIN + 0x2030, 0x01008044);
809 	GFFB_WRITE_4(GFFB_PRAMIN + 0x2034, 0x00000002);
810 	GFFB_WRITE_4(GFFB_PRAMIN + 0x2038, 0);
811 	GFFB_WRITE_4(GFFB_PRAMIN + 0x203c, 0);
812 	GFFB_WRITE_4(GFFB_PRAMIN + 0x2040, 0x01008019);
813 	GFFB_WRITE_4(GFFB_PRAMIN + 0x2044, 0);
814 	GFFB_WRITE_4(GFFB_PRAMIN + 0x2048, 0);
815 	GFFB_WRITE_4(GFFB_PRAMIN + 0x204c, 0);
816 	GFFB_WRITE_4(GFFB_PRAMIN + 0x2050, 0x0100a05c);
817 	GFFB_WRITE_4(GFFB_PRAMIN + 0x2054, 0);
818 	GFFB_WRITE_4(GFFB_PRAMIN + 0x2058, 0);
819 	GFFB_WRITE_4(GFFB_PRAMIN + 0x205c, 0);
820 	/* XXX 0x0100805f if !WaitVSynvPossible */
821 	GFFB_WRITE_4(GFFB_PRAMIN + 0x2060, 0x0100809f);
822 	GFFB_WRITE_4(GFFB_PRAMIN + 0x2064, 0);
823 	GFFB_WRITE_4(GFFB_PRAMIN + 0x2068, 0x12001200);
824 	GFFB_WRITE_4(GFFB_PRAMIN + 0x206c, 0);
825 	GFFB_WRITE_4(GFFB_PRAMIN + 0x2070, 0x0100804a);
826 	GFFB_WRITE_4(GFFB_PRAMIN + 0x2074, 0x00000002);
827 	GFFB_WRITE_4(GFFB_PRAMIN + 0x2078, 0);
828 	GFFB_WRITE_4(GFFB_PRAMIN + 0x207c, 0);
829 	GFFB_WRITE_4(GFFB_PRAMIN + 0x2080, 0x01018077);
830 	GFFB_WRITE_4(GFFB_PRAMIN + 0x2084, 0);
831 	GFFB_WRITE_4(GFFB_PRAMIN + 0x2088, 0x12001200);
832 	GFFB_WRITE_4(GFFB_PRAMIN + 0x208c, 0);
833 	GFFB_WRITE_4(GFFB_PRAMIN + 0x2090, 0x00003002);
834 	GFFB_WRITE_4(GFFB_PRAMIN + 0x2094, 0x00007fff);
835 	/* command buffer start with some flag in the lower bits */
836 	GFFB_WRITE_4(GFFB_PRAMIN + 0x2098, 0x00000002);
837 	GFFB_WRITE_4(GFFB_PRAMIN + 0x209c, 0x00000002);
838 #if BYTE_ORDER == BIG_ENDIAN
839 	GFFB_WRITE_4(GFFB_PRAMIN + 0x2010, 0x01088042);
840 	GFFB_WRITE_4(GFFB_PRAMIN + 0x2020, 0x01088043);
841 	GFFB_WRITE_4(GFFB_PRAMIN + 0x2030, 0x01088044);
842 	GFFB_WRITE_4(GFFB_PRAMIN + 0x2040, 0x01088019);
843 	GFFB_WRITE_4(GFFB_PRAMIN + 0x2050, 0x0108a05c);
844 	GFFB_WRITE_4(GFFB_PRAMIN + 0x2060, 0x0108809f);
845 	GFFB_WRITE_4(GFFB_PRAMIN + 0x2070, 0x0108804a);
846 	GFFB_WRITE_4(GFFB_PRAMIN + 0x2080, 0x01098077);
847 	GFFB_WRITE_4(GFFB_PRAMIN + 0x2034, 0x00000001);
848 	GFFB_WRITE_4(GFFB_PRAMIN + 0x2074, 0x00000001);
849 #endif
850 
851 	/* PGRAPH setup */
852 	GFFB_WRITE_4(GFFB_PFIFO + 0x0500, 0);
853 	GFFB_WRITE_4(GFFB_PFIFO + 0x0504, 0x00000001);
854 	GFFB_WRITE_4(GFFB_PFIFO + 0x1200, 0);
855 	GFFB_WRITE_4(GFFB_PFIFO + 0x1250, 0);
856 	GFFB_WRITE_4(GFFB_PFIFO + 0x1204, 0x00000100);	/* different on nv40 */
857 	GFFB_WRITE_4(GFFB_PFIFO + 0x1240, 0);
858 	GFFB_WRITE_4(GFFB_PFIFO + 0x1244, 0);
859 	GFFB_WRITE_4(GFFB_PFIFO + 0x122c, 0x00001209);	/* different on nv40 */
860 	GFFB_WRITE_4(GFFB_PFIFO + 0x1000, 0);
861 	GFFB_WRITE_4(GFFB_PFIFO + 0x1050, 0);
862 	GFFB_WRITE_4(GFFB_PFIFO + 0x0210, 0x03000100);
863 	GFFB_WRITE_4(GFFB_PFIFO + 0x0214, 0x00000110);
864 	GFFB_WRITE_4(GFFB_PFIFO + 0x0218, 0x00000112);
865 	GFFB_WRITE_4(GFFB_PFIFO + 0x050c, 0x0000ffff);
866 	GFFB_WRITE_4(GFFB_PFIFO + 0x1258, 0x0000ffff);
867 	GFFB_WRITE_4(GFFB_PFIFO + 0x0140, 0);
868 	GFFB_WRITE_4(GFFB_PFIFO + 0x0100, 0xffffffff);
869 	GFFB_WRITE_4(GFFB_PFIFO + 0x1054, 0x00000001);
870 	GFFB_WRITE_4(GFFB_PFIFO + 0x1230, 0);
871 	GFFB_WRITE_4(GFFB_PFIFO + 0x1280, 0);
872 #if BYTE_ORDER == BIG_ENDIAN
873 	GFFB_WRITE_4(GFFB_PFIFO + 0x1224, 0x800f0078);
874 #else
875 	GFFB_WRITE_4(GFFB_PFIFO + 0x1224, 0x000f0078);
876 #endif
877 	GFFB_WRITE_4(GFFB_PFIFO + 0x1220, 0x00000001);
878 	GFFB_WRITE_4(GFFB_PFIFO + 0x1200, 0x00000001);
879 	GFFB_WRITE_4(GFFB_PFIFO + 0x1250, 0x00000001);
880 	GFFB_WRITE_4(GFFB_PFIFO + 0x1254, 0x00000001);
881 	GFFB_WRITE_4(GFFB_PFIFO + 0x0500, 0x00000001);
882 
883 	GFFB_WRITE_4(GFFB_PGRAPH + 0x0080, 0xFFFFFFFF);
884 	GFFB_WRITE_4(GFFB_PGRAPH + 0x0080, 0x00000000);
885 
886 	GFFB_WRITE_4(GFFB_PGRAPH + 0x0140, 0x00000000);
887 	GFFB_WRITE_4(GFFB_PGRAPH + 0x0100, 0xFFFFFFFF);
888 	GFFB_WRITE_4(GFFB_PGRAPH + 0x0144, 0x10010100);
889 	GFFB_WRITE_4(GFFB_PGRAPH + 0x0714, 0xFFFFFFFF);
890 	GFFB_WRITE_4(GFFB_PGRAPH + 0x0720, 0x00000001);
891 	/*
892 	 * xf86_video_nv does this in two writes,
893 	 * not sure if they can be combined
894 	 */
895 	foo = GFFB_READ_4(GFFB_PGRAPH + 0x0710);
896 	GFFB_WRITE_4(GFFB_PGRAPH + 0x0710, foo & 0x0007ff00);
897 	foo = GFFB_READ_4(GFFB_PGRAPH + 0x0710);
898 	GFFB_WRITE_4(GFFB_PGRAPH + 0x0710, foo | 0x00020100);
899 
900 	/* NV_ARCH_10 */
901 	GFFB_WRITE_4(GFFB_PGRAPH + 0x0084, 0x00118700);
902 	GFFB_WRITE_4(GFFB_PGRAPH + 0x0088, 0x24E00810);
903 	GFFB_WRITE_4(GFFB_PGRAPH + 0x008C, 0x55DE0030);
904 
905 	for(i = 0; i < 128; i += 4) {
906 		GFFB_WRITE_4(GFFB_PGRAPH + 0x0B00 + i,
907 		    GFFB_READ_4(GFFB_PFB + 0x0240 + i));
908 	}
909 
910 	GFFB_WRITE_4(GFFB_PGRAPH + 0x640, 0);
911 	GFFB_WRITE_4(GFFB_PGRAPH + 0x644, 0);
912 	GFFB_WRITE_4(GFFB_PGRAPH + 0x684, sc->sc_vramsize - 1);
913 	GFFB_WRITE_4(GFFB_PGRAPH + 0x688, sc->sc_vramsize - 1);
914 
915 	GFFB_WRITE_4(GFFB_PGRAPH + 0x0810, 0x00000000);
916 	GFFB_WRITE_4(GFFB_PGRAPH + 0x0608, 0xFFFFFFFF);
917 
918 	GFFB_WRITE_4(GFFB_PGRAPH + 0x053C, 0);
919 	GFFB_WRITE_4(GFFB_PGRAPH + 0x0540, 0);
920 	GFFB_WRITE_4(GFFB_PGRAPH + 0x0544, 0x00007FFF);
921 	GFFB_WRITE_4(GFFB_PGRAPH + 0x0548, 0x00007FFF);
922 
923 	GFFB_WRITE_4(GFFB_CMDSTART, 0x00000002);
924 	GFFB_WRITE_4(GFFB_FIFO_GET, 0);
925 	sc->sc_put = 0;
926 	sc->sc_current = 0;
927 	sc->sc_free = 0x2000;
928 
929 	for(i = 0; i < SKIPS; i++)
930 		gffb_dmanext(sc, 0);
931 
932 	gffb_dmanext(sc, 0x00040000);
933 	gffb_dmanext(sc, 0x80000010);
934 	gffb_dmanext(sc, 0x00042000);
935 	gffb_dmanext(sc, 0x80000011);
936 	gffb_dmanext(sc, 0x00044000);
937 	gffb_dmanext(sc, 0x80000012);
938 	gffb_dmanext(sc, 0x00046000);
939 	gffb_dmanext(sc, 0x80000013);
940 	gffb_dmanext(sc, 0x00048000);
941 	gffb_dmanext(sc, 0x80000014);
942 	gffb_dmanext(sc, 0x0004A000);
943 	gffb_dmanext(sc, 0x80000015);
944 	gffb_dmanext(sc, 0x0004C000);
945 	gffb_dmanext(sc, 0x80000016);
946 	gffb_dmanext(sc, 0x0004E000);
947 	gffb_dmanext(sc, 0x80000017);
948 	sc->sc_free = 0x2000 - sc->sc_current;
949 
950 	gffb_dmastart(sc, SURFACE_FORMAT, 4);
951 	gffb_dmanext(sc, SURFACE_FORMAT_DEPTH8);
952 	gffb_dmanext(sc, sc->sc_stride | (sc->sc_stride << 16));
953 	gffb_dmanext(sc, 0x2000);	/* src offset */
954 	gffb_dmanext(sc, 0x2000);	/* dst offset */
955 
956 	gffb_dmastart(sc, RECT_FORMAT, 1);
957 	gffb_dmanext(sc, RECT_FORMAT_DEPTH8);
958 
959 	gffb_dmastart(sc, PATTERN_FORMAT, 1);
960 	gffb_dmanext(sc, PATTERN_FORMAT_DEPTH8);
961 
962 	gffb_dmastart(sc, PATTERN_COLOR_0, 4);
963 	gffb_dmanext(sc, 0xffffffff);
964 	gffb_dmanext(sc, 0xffffffff);
965 	gffb_dmanext(sc, 0xffffffff);
966 	gffb_dmanext(sc, 0xffffffff);
967 
968 	gffb_dmastart(sc, ROP_SET, 1);
969 	gffb_dmanext(sc, 0xcc);
970 	sc->sc_rop = 0xcc;
971 
972 	gffb_dma_kickoff(sc);
973 	gffb_sync(sc);
974 	DPRINTF("put %x current %x\n", sc->sc_put, sc->sc_current);
975 
976 }
977 
978 static void
979 gffb_rop(struct gffb_softc *sc, int rop)
980 {
981 	if (rop == sc->sc_rop)
982 		return;
983 	sc->sc_rop = rop;
984 	gffb_dmastart(sc, ROP_SET, 1);
985 	gffb_dmanext(sc, rop);
986 }
987 
988 static void
989 gffb_rectfill(struct gffb_softc *sc, int x, int y, int wi, int he,
990      uint32_t colour)
991 {
992 	mutex_enter(&sc->sc_lock);
993 	gffb_rop(sc, 0xcc);
994 
995 	gffb_dmastart(sc, RECT_SOLID_COLOR, 1);
996 	gffb_dmanext(sc, colour);
997 
998 	gffb_dmastart(sc, RECT_SOLID_RECTS(0), 2);
999 	gffb_dmanext(sc, (x << 16) | y);
1000 	gffb_dmanext(sc, (wi << 16) | he);
1001 	gffb_dma_kickoff(sc);
1002 	mutex_exit(&sc->sc_lock);
1003 }
1004 
1005 static void
1006 gffb_bitblt(void *cookie, int xs, int ys, int xd, int yd,
1007     int wi, int he, int rop)
1008 {
1009 	struct gffb_softc *sc = cookie;
1010 
1011 	mutex_enter(&sc->sc_lock);
1012 
1013 	gffb_rop(sc, rop);
1014 
1015 	gffb_dmastart(sc, BLIT_POINT_SRC, 3);
1016 	gffb_dmanext(sc, (ys << 16) | xs);
1017 	gffb_dmanext(sc, (yd << 16) | xd);
1018 	gffb_dmanext(sc, (he << 16) | wi);
1019 	gffb_dma_kickoff(sc);
1020 	mutex_exit(&sc->sc_lock);
1021 }
1022 
1023 static void
1024 gffb_cursor(void *cookie, int on, int row, int col)
1025 {
1026 	struct rasops_info *ri = cookie;
1027 	struct vcons_screen *scr = ri->ri_hw;
1028 	struct gffb_softc *sc = scr->scr_cookie;
1029 	int x, y, wi, he;
1030 
1031 	wi = ri->ri_font->fontwidth;
1032 	he = ri->ri_font->fontheight;
1033 
1034 	if (sc->sc_mode == WSDISPLAYIO_MODE_EMUL) {
1035 		x = ri->ri_ccol * wi + ri->ri_xorigin;
1036 		y = ri->ri_crow * he + ri->ri_yorigin;
1037 		if (ri->ri_flg & RI_CURSOR) {
1038 			gffb_bitblt(sc, x, y, x, y, wi, he, 0x33);
1039 			ri->ri_flg &= ~RI_CURSOR;
1040 		}
1041 		ri->ri_crow = row;
1042 		ri->ri_ccol = col;
1043 		if (on) {
1044 			x = ri->ri_ccol * wi + ri->ri_xorigin;
1045 			y = ri->ri_crow * he + ri->ri_yorigin;
1046 			gffb_bitblt(sc, x, y, x, y, wi, he, 0x33);
1047 			ri->ri_flg |= RI_CURSOR;
1048 		}
1049 	} else {
1050 		scr->scr_ri.ri_crow = row;
1051 		scr->scr_ri.ri_ccol = col;
1052 		scr->scr_ri.ri_flg &= ~RI_CURSOR;
1053 	}
1054 
1055 }
1056 
1057 static void
1058 gffb_putchar(void *cookie, int row, int col, u_int c, long attr)
1059 {
1060 	struct rasops_info *ri = cookie;
1061 	struct wsdisplay_font *font = PICK_FONT(ri, c);
1062 	struct vcons_screen *scr = ri->ri_hw;
1063 	struct gffb_softc *sc = scr->scr_cookie;
1064 	int x, y, wi, he, rv = GC_NOPE;
1065 	uint32_t bg;
1066 
1067 	if (sc->sc_mode != WSDISPLAYIO_MODE_EMUL)
1068 		return;
1069 
1070 	if (!CHAR_IN_FONT(c, font))
1071 		return;
1072 
1073 	wi = font->fontwidth;
1074 	he = font->fontheight;
1075 
1076 	x = ri->ri_xorigin + col * wi;
1077 	y = ri->ri_yorigin + row * he;
1078 	bg = ri->ri_devcmap[(attr >> 16) & 0xf];
1079 
1080 	if (c == 0x20) {
1081 		gffb_rectfill(sc, x, y, wi, he, bg);
1082 		return;
1083 	}
1084 	rv = glyphcache_try(&sc->sc_gc, c, x, y, attr);
1085 	if (rv == GC_OK)
1086 		return;
1087 
1088 	mutex_enter(&sc->sc_lock);
1089 	gffb_sync(sc);
1090 	sc->sc_putchar(cookie, row, col, c, attr);
1091 	membar_sync();
1092 	mutex_exit(&sc->sc_lock);
1093 
1094 	if (rv == GC_ADD) {
1095 		glyphcache_add(&sc->sc_gc, c, x, y);
1096 	}
1097 }
1098 
1099 static void
1100 gffb_copycols(void *cookie, int row, int srccol, int dstcol, int ncols)
1101 {
1102 	struct rasops_info *ri = cookie;
1103 	struct vcons_screen *scr = ri->ri_hw;
1104 	struct gffb_softc *sc = scr->scr_cookie;
1105 	int32_t xs, xd, y, width, height;
1106 
1107 	if ((sc->sc_locked == 0) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) {
1108 		xs = ri->ri_xorigin + ri->ri_font->fontwidth * srccol;
1109 		xd = ri->ri_xorigin + ri->ri_font->fontwidth * dstcol;
1110 		y = ri->ri_yorigin + ri->ri_font->fontheight * row;
1111 		width = ri->ri_font->fontwidth * ncols;
1112 		height = ri->ri_font->fontheight;
1113 		gffb_bitblt(sc, xs, y, xd, y, width, height, 0xcc);
1114 	}
1115 }
1116 
1117 static void
1118 gffb_erasecols(void *cookie, int row, int startcol, int ncols, long fillattr)
1119 {
1120 	struct rasops_info *ri = cookie;
1121 	struct vcons_screen *scr = ri->ri_hw;
1122 	struct gffb_softc *sc = scr->scr_cookie;
1123 	int32_t x, y, width, height, fg, bg, ul;
1124 
1125 	if ((sc->sc_locked == 0) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) {
1126 		x = ri->ri_xorigin + ri->ri_font->fontwidth * startcol;
1127 		y = ri->ri_yorigin + ri->ri_font->fontheight * row;
1128 		width = ri->ri_font->fontwidth * ncols;
1129 		height = ri->ri_font->fontheight;
1130 		rasops_unpack_attr(fillattr, &fg, &bg, &ul);
1131 
1132 		gffb_rectfill(sc, x, y, width, height, ri->ri_devcmap[bg]);
1133 	}
1134 }
1135 
1136 static void
1137 gffb_copyrows(void *cookie, int srcrow, int dstrow, int nrows)
1138 {
1139 	struct rasops_info *ri = cookie;
1140 	struct vcons_screen *scr = ri->ri_hw;
1141 	struct gffb_softc *sc = scr->scr_cookie;
1142 	int32_t x, ys, yd, width, height;
1143 
1144 	if ((sc->sc_locked == 0) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) {
1145 		x = ri->ri_xorigin;
1146 		ys = ri->ri_yorigin + ri->ri_font->fontheight * srcrow;
1147 		yd = ri->ri_yorigin + ri->ri_font->fontheight * dstrow;
1148 		width = ri->ri_emuwidth;
1149 		height = ri->ri_font->fontheight * nrows;
1150 		gffb_bitblt(sc, x, ys, x, yd, width, height, 0xcc);
1151 	}
1152 }
1153 
1154 static void
1155 gffb_eraserows(void *cookie, int row, int nrows, long fillattr)
1156 {
1157 	struct rasops_info *ri = cookie;
1158 	struct vcons_screen *scr = ri->ri_hw;
1159 	struct gffb_softc *sc = scr->scr_cookie;
1160 	int32_t x, y, width, height, fg, bg, ul;
1161 
1162 	if ((sc->sc_locked == 0) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) {
1163 		x = ri->ri_xorigin;
1164 		y = ri->ri_yorigin + ri->ri_font->fontheight * row;
1165 		width = ri->ri_emuwidth;
1166 		height = ri->ri_font->fontheight * nrows;
1167 		rasops_unpack_attr(fillattr, &fg, &bg, &ul);
1168 
1169 		gffb_rectfill(sc, x, y, width, height, ri->ri_devcmap[bg]);
1170 	}
1171 }
1172