1 /* $NetBSD: gffb.c,v 1.7 2013/10/23 13:15:47 macallan Exp $ */ 2 3 /* 4 * Copyright (c) 2013 Michael Lorenz 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 /* 29 * A console driver for nvidia geforce graphics controllers 30 * tested on macppc only so far, should work on other hardware as long as 31 * something sets up a usable graphics mode and sets the right device properties 32 * This driver should work with all NV1x hardware but so far it's been tested 33 * only on NV11 / GeForce2 MX. Needs testing with more hardware and if 34 * successful, PCI IDs need to be added to gffb_match() 35 */ 36 37 #include <sys/cdefs.h> 38 __KERNEL_RCSID(0, "$NetBSD: gffb.c,v 1.7 2013/10/23 13:15:47 macallan Exp $"); 39 40 #include <sys/param.h> 41 #include <sys/systm.h> 42 #include <sys/kernel.h> 43 #include <sys/device.h> 44 #include <sys/malloc.h> 45 #include <sys/lwp.h> 46 #include <sys/kauth.h> 47 #include <sys/atomic.h> 48 49 #include <dev/videomode/videomode.h> 50 51 #include <dev/pci/pcivar.h> 52 #include <dev/pci/pcireg.h> 53 #include <dev/pci/pcidevs.h> 54 #include <dev/pci/pciio.h> 55 #include <dev/pci/gffbreg.h> 56 57 #include <dev/wscons/wsdisplayvar.h> 58 #include <dev/wscons/wsconsio.h> 59 #include <dev/wsfont/wsfont.h> 60 #include <dev/rasops/rasops.h> 61 #include <dev/wscons/wsdisplay_vconsvar.h> 62 #include <dev/pci/wsdisplay_pci.h> 63 #include <dev/wscons/wsdisplay_glyphcachevar.h> 64 65 #include <dev/i2c/i2cvar.h> 66 67 #include "opt_gffb.h" 68 #include "opt_vcons.h" 69 70 #ifdef GFFB_DEBUG 71 #define DPRINTF printf 72 #else 73 #define DPRINTF while(0) printf 74 #endif 75 76 struct gffb_softc { 77 device_t sc_dev; 78 79 pci_chipset_tag_t sc_pc; 80 pcitag_t sc_pcitag; 81 82 bus_space_tag_t sc_memt; 83 bus_space_tag_t sc_iot; 84 85 bus_space_handle_t sc_regh, sc_fbh; 86 bus_addr_t sc_fb, sc_reg; 87 bus_size_t sc_fbsize, sc_regsize; 88 uint8_t *sc_fbaddr; 89 size_t sc_vramsize; 90 91 int sc_width, sc_height, sc_depth, sc_stride; 92 int sc_locked; 93 struct vcons_screen sc_console_screen; 94 struct wsscreen_descr sc_defaultscreen_descr; 95 const struct wsscreen_descr *sc_screens[1]; 96 struct wsscreen_list sc_screenlist; 97 struct vcons_data vd; 98 int sc_mode; 99 u_char sc_cmap_red[256]; 100 u_char sc_cmap_green[256]; 101 u_char sc_cmap_blue[256]; 102 int sc_put, sc_current, sc_free; 103 uint32_t sc_rop; 104 void (*sc_putchar)(void *, int, int, u_int, long); 105 kmutex_t sc_lock; 106 glyphcache sc_gc; 107 }; 108 109 static int gffb_match(device_t, cfdata_t, void *); 110 static void gffb_attach(device_t, device_t, void *); 111 112 CFATTACH_DECL_NEW(gffb, sizeof(struct gffb_softc), 113 gffb_match, gffb_attach, NULL, NULL); 114 115 static int gffb_ioctl(void *, void *, u_long, void *, int, 116 struct lwp *); 117 static paddr_t gffb_mmap(void *, void *, off_t, int); 118 static void gffb_init_screen(void *, struct vcons_screen *, int, long *); 119 120 static int gffb_putcmap(struct gffb_softc *, struct wsdisplay_cmap *); 121 static int gffb_getcmap(struct gffb_softc *, struct wsdisplay_cmap *); 122 static void gffb_restore_palette(struct gffb_softc *); 123 static int gffb_putpalreg(struct gffb_softc *, uint8_t, uint8_t, 124 uint8_t, uint8_t); 125 126 static void gffb_init(struct gffb_softc *); 127 128 static void gffb_make_room(struct gffb_softc *, int); 129 static void gffb_sync(struct gffb_softc *); 130 131 static void gffb_rectfill(struct gffb_softc *, int, int, int, int, 132 uint32_t); 133 static void gffb_bitblt(void *, int, int, int, int, int, 134 int, int); 135 static void gffb_rop(struct gffb_softc *, int); 136 137 static void gffb_cursor(void *, int, int, int); 138 static void gffb_putchar(void *, int, int, u_int, long); 139 static void gffb_copycols(void *, int, int, int, int); 140 static void gffb_erasecols(void *, int, int, int, long); 141 static void gffb_copyrows(void *, int, int, int); 142 static void gffb_eraserows(void *, int, int, long); 143 144 #define GFFB_READ_4(o) bus_space_read_4(sc->sc_memt, sc->sc_regh, (o)) 145 #define GFFB_WRITE_4(o, v) bus_space_write_4(sc->sc_memt, sc->sc_regh, (o), (v)) 146 147 struct wsdisplay_accessops gffb_accessops = { 148 gffb_ioctl, 149 gffb_mmap, 150 NULL, /* alloc_screen */ 151 NULL, /* free_screen */ 152 NULL, /* show_screen */ 153 NULL, /* load_font */ 154 NULL, /* pollc */ 155 NULL /* scroll */ 156 }; 157 158 static int 159 gffb_match(device_t parent, cfdata_t match, void *aux) 160 { 161 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 162 163 if (PCI_CLASS(pa->pa_class) != PCI_CLASS_DISPLAY) 164 return 0; 165 if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_NVIDIA) 166 return 0; 167 168 /* only card tested on so far - likely need a list */ 169 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_NVIDIA_GEFORCE2MX) 170 return 100; 171 return (0); 172 } 173 174 static void 175 gffb_attach(device_t parent, device_t self, void *aux) 176 { 177 struct gffb_softc *sc = device_private(self); 178 struct pci_attach_args *pa = aux; 179 struct rasops_info *ri; 180 bus_space_tag_t tag; 181 struct wsemuldisplaydev_attach_args aa; 182 prop_dictionary_t dict; 183 unsigned long defattr; 184 bool is_console; 185 int i, j, f; 186 uint8_t cmap[768]; 187 188 sc->sc_pc = pa->pa_pc; 189 sc->sc_pcitag = pa->pa_tag; 190 sc->sc_memt = pa->pa_memt; 191 sc->sc_iot = pa->pa_iot; 192 sc->sc_dev = self; 193 194 pci_aprint_devinfo(pa, NULL); 195 196 /* fill in parameters from properties */ 197 dict = device_properties(self); 198 if (!prop_dictionary_get_uint32(dict, "width", &sc->sc_width)) { 199 aprint_error("%s: no width property\n", device_xname(self)); 200 return; 201 } 202 if (!prop_dictionary_get_uint32(dict, "height", &sc->sc_height)) { 203 aprint_error("%s: no height property\n", device_xname(self)); 204 return; 205 } 206 207 #ifdef GLYPHCACHE_DEBUG 208 /* leave some visible VRAM unused so we can see the glyph cache */ 209 sc->sc_height -= 300; 210 #endif 211 212 if (!prop_dictionary_get_uint32(dict, "depth", &sc->sc_depth)) { 213 aprint_error("%s: no depth property\n", device_xname(self)); 214 return; 215 } 216 if (!prop_dictionary_get_uint32(dict, "linebytes", &sc->sc_stride)) { 217 aprint_error("%s: no linebytes property\n", 218 device_xname(self)); 219 return; 220 } 221 222 prop_dictionary_get_bool(dict, "is_console", &is_console); 223 224 if (pci_mapreg_map(pa, 0x10, PCI_MAPREG_TYPE_MEM, 0, 225 &tag, &sc->sc_regh, &sc->sc_reg, &sc->sc_regsize)) { 226 aprint_error("%s: failed to map registers.\n", 227 device_xname(sc->sc_dev)); 228 } 229 sc->sc_vramsize = GFFB_READ_4(GFFB_VRAM) & 0xfff00000; 230 231 /* don't map more VRAM than we actually have */ 232 if (pci_mapreg_info(sc->sc_pc, sc->sc_pcitag, 233 0x14, PCI_MAPREG_TYPE_MEM, &sc->sc_fb, &sc->sc_fbsize, &f)) { 234 aprint_error("%s: can't find the framebuffer?!\n", 235 device_xname(sc->sc_dev)); 236 } 237 238 if (bus_space_map(sc->sc_memt, sc->sc_fb, sc->sc_vramsize, 239 BUS_SPACE_MAP_PREFETCHABLE | BUS_SPACE_MAP_LINEAR, 240 &sc->sc_fbh)) { 241 aprint_error("%s: failed to map the framebuffer.\n", 242 device_xname(sc->sc_dev)); 243 } 244 sc->sc_fbaddr = bus_space_vaddr(tag, sc->sc_fbh); 245 246 aprint_normal("%s: %d MB aperture at 0x%08x\n", device_xname(self), 247 (int)(sc->sc_fbsize >> 20), (uint32_t)sc->sc_fb); 248 aprint_normal_dev(sc->sc_dev, "%d MB video memory\n", 249 sc->sc_vramsize >> 20); 250 251 sc->sc_defaultscreen_descr = (struct wsscreen_descr){ 252 "default", 253 0, 0, 254 NULL, 255 8, 16, 256 WSSCREEN_WSCOLORS | WSSCREEN_HILIT, 257 NULL 258 }; 259 sc->sc_screens[0] = &sc->sc_defaultscreen_descr; 260 sc->sc_screenlist = (struct wsscreen_list){1, sc->sc_screens}; 261 sc->sc_mode = WSDISPLAYIO_MODE_EMUL; 262 sc->sc_locked = 0; 263 264 #ifdef GFFB_DEBUG 265 printf("put: %08x\n", GFFB_READ_4(GFFB_FIFO_PUT)); 266 printf("get: %08x\n", GFFB_READ_4(GFFB_FIFO_GET)); 267 #endif 268 269 /* 270 * we don't have hardware synchronization so we need a lock to serialize 271 * access to the DMA buffer between normal and kernel output 272 * actually it might be enough to use atomic ops on sc_current, sc_free 273 * etc. but for now we'll play it safe 274 * XXX we will probably deadlock if we take an interrupt while sc_lock 275 * is held and then try to printf() 276 */ 277 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_NONE); 278 279 /* init engine here */ 280 gffb_init(sc); 281 282 vcons_init(&sc->vd, sc, &sc->sc_defaultscreen_descr, 283 &gffb_accessops); 284 sc->vd.init_screen = gffb_init_screen; 285 286 287 ri = &sc->sc_console_screen.scr_ri; 288 289 sc->sc_gc.gc_bitblt = gffb_bitblt; 290 sc->sc_gc.gc_blitcookie = sc; 291 sc->sc_gc.gc_rop = 0xcc; 292 293 if (is_console) { 294 vcons_init_screen(&sc->vd, &sc->sc_console_screen, 1, 295 &defattr); 296 sc->sc_console_screen.scr_flags |= VCONS_SCREEN_IS_STATIC; 297 298 gffb_rectfill(sc, 0, 0, sc->sc_width, sc->sc_height, 299 ri->ri_devcmap[(defattr >> 16) & 0xf]); 300 301 sc->sc_defaultscreen_descr.textops = &ri->ri_ops; 302 sc->sc_defaultscreen_descr.capabilities = ri->ri_caps; 303 sc->sc_defaultscreen_descr.nrows = ri->ri_rows; 304 sc->sc_defaultscreen_descr.ncols = ri->ri_cols; 305 306 glyphcache_init(&sc->sc_gc, sc->sc_height + 5, 307 (0x800000 / sc->sc_stride) - sc->sc_height - 5, 308 sc->sc_width, 309 ri->ri_font->fontwidth, 310 ri->ri_font->fontheight, 311 defattr); 312 313 wsdisplay_cnattach(&sc->sc_defaultscreen_descr, ri, 0, 0, 314 defattr); 315 vcons_replay_msgbuf(&sc->sc_console_screen); 316 } else { 317 /* 318 * since we're not the console we can postpone the rest 319 * until someone actually allocates a screen for us 320 */ 321 if (sc->sc_console_screen.scr_ri.ri_rows == 0) { 322 /* do some minimal setup to avoid weirdnesses later */ 323 vcons_init_screen(&sc->vd, &sc->sc_console_screen, 1, 324 &defattr); 325 } else 326 (*ri->ri_ops.allocattr)(ri, 0, 0, 0, &defattr); 327 328 glyphcache_init(&sc->sc_gc, sc->sc_height + 5, 329 (0x800000 / sc->sc_stride) - sc->sc_height - 5, 330 sc->sc_width, 331 ri->ri_font->fontwidth, 332 ri->ri_font->fontheight, 333 defattr); 334 } 335 336 j = 0; 337 rasops_get_cmap(ri, cmap, sizeof(cmap)); 338 for (i = 0; i < 256; i++) { 339 sc->sc_cmap_red[i] = cmap[j]; 340 sc->sc_cmap_green[i] = cmap[j + 1]; 341 sc->sc_cmap_blue[i] = cmap[j + 2]; 342 gffb_putpalreg(sc, i, cmap[j], cmap[j + 1], cmap[j + 2]); 343 j += 3; 344 } 345 346 /* no suspend/resume support yet */ 347 pmf_device_register(sc->sc_dev, NULL, NULL); 348 349 aa.console = is_console; 350 aa.scrdata = &sc->sc_screenlist; 351 aa.accessops = &gffb_accessops; 352 aa.accesscookie = &sc->vd; 353 354 config_found(sc->sc_dev, &aa, wsemuldisplaydevprint); 355 356 #ifdef GFFB_DEBUG 357 for (i = 0; i < 40; i++) { 358 for (j = 0; j < 40; j++) { 359 gffb_rectfill(sc, i * 20, j * 20, 20, 20, 360 (i + j ) & 1 ? 0xe0e0e0e0 : 0x03030303); 361 } 362 } 363 364 gffb_rectfill(sc, 0, 800, 1280, 224, 0x92929292); 365 gffb_bitblt(sc, 0, 10, 10, 810, 200, 20, 0xcc); 366 gffb_bitblt(sc, 0, 10, 10, 840, 300, 20, 0xcc); 367 gffb_bitblt(sc, 0, 10, 10, 870, 400, 20, 0xcc); 368 gffb_bitblt(sc, 0, 10, 10, 900, 500, 20, 0xcc); 369 gffb_bitblt(sc, 0, 10, 10, 930, 600, 20, 0xcc); 370 gffb_bitblt(sc, 0, 10, 610, 810, 200, 20, 0xcc); 371 gffb_bitblt(sc, 0, 10, 610, 840, 300, 20, 0xcc); 372 gffb_bitblt(sc, 0, 10, 610, 870, 400, 20, 0xcc); 373 gffb_bitblt(sc, 0, 10, 610, 900, 500, 20, 0xcc); 374 gffb_bitblt(sc, 0, 10, 610, 930, 600, 20, 0xcc); 375 gffb_sync(sc); 376 printf("put %x current %x\n", sc->sc_put, sc->sc_current); 377 #endif 378 } 379 380 static int 381 gffb_ioctl(void *v, void *vs, u_long cmd, void *data, int flag, 382 struct lwp *l) 383 { 384 struct vcons_data *vd = v; 385 struct gffb_softc *sc = vd->cookie; 386 struct wsdisplay_fbinfo *wdf; 387 struct vcons_screen *ms = vd->active; 388 389 switch (cmd) { 390 case WSDISPLAYIO_GTYPE: 391 *(u_int *)data = WSDISPLAY_TYPE_PCIMISC; 392 return 0; 393 394 /* PCI config read/write passthrough. */ 395 case PCI_IOC_CFGREAD: 396 case PCI_IOC_CFGWRITE: 397 return pci_devioctl(sc->sc_pc, sc->sc_pcitag, 398 cmd, data, flag, l); 399 400 case WSDISPLAYIO_GET_BUSID: 401 return wsdisplayio_busid_pci(sc->sc_dev, sc->sc_pc, 402 sc->sc_pcitag, data); 403 404 case WSDISPLAYIO_GINFO: 405 if (ms == NULL) 406 return ENODEV; 407 wdf = (void *)data; 408 wdf->height = ms->scr_ri.ri_height; 409 wdf->width = ms->scr_ri.ri_width; 410 wdf->depth = ms->scr_ri.ri_depth; 411 wdf->cmsize = 256; 412 return 0; 413 414 case WSDISPLAYIO_GETCMAP: 415 return gffb_getcmap(sc, 416 (struct wsdisplay_cmap *)data); 417 418 case WSDISPLAYIO_PUTCMAP: 419 return gffb_putcmap(sc, 420 (struct wsdisplay_cmap *)data); 421 422 case WSDISPLAYIO_LINEBYTES: 423 *(u_int *)data = sc->sc_stride; 424 return 0; 425 426 case WSDISPLAYIO_SMODE: { 427 int new_mode = *(int*)data; 428 if (new_mode != sc->sc_mode) { 429 sc->sc_mode = new_mode; 430 if(new_mode == WSDISPLAYIO_MODE_EMUL) { 431 gffb_init(sc); 432 gffb_restore_palette(sc); 433 glyphcache_wipe(&sc->sc_gc); 434 gffb_rectfill(sc, 0, 0, sc->sc_width, 435 sc->sc_height, ms->scr_ri.ri_devcmap[ 436 (ms->scr_defattr >> 16) & 0xf]); 437 vcons_redraw_screen(ms); 438 } 439 } 440 } 441 return 0; 442 443 case WSDISPLAYIO_GET_EDID: { 444 struct wsdisplayio_edid_info *d = data; 445 return wsdisplayio_get_edid(sc->sc_dev, d); 446 } 447 448 case WSDISPLAYIO_GET_FBINFO: { 449 struct wsdisplayio_fbinfo *fbi = data; 450 return wsdisplayio_get_fbinfo(&ms->scr_ri, fbi); 451 } 452 } 453 return EPASSTHROUGH; 454 } 455 456 static paddr_t 457 gffb_mmap(void *v, void *vs, off_t offset, int prot) 458 { 459 struct vcons_data *vd = v; 460 struct gffb_softc *sc = vd->cookie; 461 paddr_t pa; 462 463 /* 'regular' framebuffer mmap()ing */ 464 if (offset < sc->sc_vramsize) { 465 pa = bus_space_mmap(sc->sc_memt, sc->sc_fb + offset + 0x2000, 466 0, prot, BUS_SPACE_MAP_LINEAR); 467 return pa; 468 } 469 470 /* 471 * restrict all other mappings to processes with superuser privileges 472 * or the kernel itself 473 */ 474 if (kauth_authorize_machdep(kauth_cred_get(), 475 KAUTH_MACHDEP_UNMANAGEDMEM, 476 NULL, NULL, NULL, NULL) != 0) { 477 aprint_normal("%s: mmap() rejected.\n", 478 device_xname(sc->sc_dev)); 479 return -1; 480 } 481 482 if ((offset >= sc->sc_fb) && (offset < (sc->sc_fb + sc->sc_fbsize))) { 483 pa = bus_space_mmap(sc->sc_memt, offset, 0, prot, 484 BUS_SPACE_MAP_LINEAR); 485 return pa; 486 } 487 488 if ((offset >= sc->sc_reg) && 489 (offset < (sc->sc_reg + sc->sc_regsize))) { 490 pa = bus_space_mmap(sc->sc_memt, offset, 0, prot, 491 BUS_SPACE_MAP_LINEAR); 492 return pa; 493 } 494 495 #ifdef PCI_MAGIC_IO_RANGE 496 /* allow mapping of IO space */ 497 if ((offset >= PCI_MAGIC_IO_RANGE) && 498 (offset < PCI_MAGIC_IO_RANGE + 0x10000)) { 499 pa = bus_space_mmap(sc->sc_iot, offset - PCI_MAGIC_IO_RANGE, 500 0, prot, BUS_SPACE_MAP_LINEAR); 501 return pa; 502 } 503 #endif 504 505 return -1; 506 } 507 508 static void 509 gffb_init_screen(void *cookie, struct vcons_screen *scr, 510 int existing, long *defattr) 511 { 512 struct gffb_softc *sc = cookie; 513 struct rasops_info *ri = &scr->scr_ri; 514 515 ri->ri_depth = sc->sc_depth; 516 ri->ri_width = sc->sc_width; 517 ri->ri_height = sc->sc_height; 518 ri->ri_stride = sc->sc_stride; 519 ri->ri_bits = sc->sc_fbaddr + 0x2000; 520 ri->ri_flg = RI_CENTER; 521 if (sc->sc_depth == 8) 522 ri->ri_flg |= RI_8BIT_IS_RGB | RI_ENABLE_ALPHA; 523 524 rasops_init(ri, 0, 0); 525 ri->ri_caps = WSSCREEN_WSCOLORS; 526 527 rasops_reconfig(ri, sc->sc_height / ri->ri_font->fontheight, 528 sc->sc_width / ri->ri_font->fontwidth); 529 530 ri->ri_hw = scr; 531 532 sc->sc_putchar = ri->ri_ops.putchar; 533 ri->ri_ops.copyrows = gffb_copyrows; 534 ri->ri_ops.copycols = gffb_copycols; 535 ri->ri_ops.eraserows = gffb_eraserows; 536 ri->ri_ops.erasecols = gffb_erasecols; 537 ri->ri_ops.cursor = gffb_cursor; 538 ri->ri_ops.putchar = gffb_putchar; 539 } 540 541 static int 542 gffb_putcmap(struct gffb_softc *sc, struct wsdisplay_cmap *cm) 543 { 544 u_char *r, *g, *b; 545 u_int index = cm->index; 546 u_int count = cm->count; 547 int i, error; 548 u_char rbuf[256], gbuf[256], bbuf[256]; 549 550 #ifdef GFFB_DEBUG 551 aprint_debug("putcmap: %d %d\n",index, count); 552 #endif 553 if (cm->index >= 256 || cm->count > 256 || 554 (cm->index + cm->count) > 256) 555 return EINVAL; 556 error = copyin(cm->red, &rbuf[index], count); 557 if (error) 558 return error; 559 error = copyin(cm->green, &gbuf[index], count); 560 if (error) 561 return error; 562 error = copyin(cm->blue, &bbuf[index], count); 563 if (error) 564 return error; 565 566 memcpy(&sc->sc_cmap_red[index], &rbuf[index], count); 567 memcpy(&sc->sc_cmap_green[index], &gbuf[index], count); 568 memcpy(&sc->sc_cmap_blue[index], &bbuf[index], count); 569 570 r = &sc->sc_cmap_red[index]; 571 g = &sc->sc_cmap_green[index]; 572 b = &sc->sc_cmap_blue[index]; 573 574 for (i = 0; i < count; i++) { 575 gffb_putpalreg(sc, index, *r, *g, *b); 576 index++; 577 r++, g++, b++; 578 } 579 return 0; 580 } 581 582 static int 583 gffb_getcmap(struct gffb_softc *sc, struct wsdisplay_cmap *cm) 584 { 585 u_int index = cm->index; 586 u_int count = cm->count; 587 int error; 588 589 if (index >= 255 || count > 256 || index + count > 256) 590 return EINVAL; 591 592 error = copyout(&sc->sc_cmap_red[index], cm->red, count); 593 if (error) 594 return error; 595 error = copyout(&sc->sc_cmap_green[index], cm->green, count); 596 if (error) 597 return error; 598 error = copyout(&sc->sc_cmap_blue[index], cm->blue, count); 599 if (error) 600 return error; 601 602 return 0; 603 } 604 605 static void 606 gffb_restore_palette(struct gffb_softc *sc) 607 { 608 int i; 609 610 for (i = 0; i < (1 << sc->sc_depth); i++) { 611 gffb_putpalreg(sc, i, sc->sc_cmap_red[i], 612 sc->sc_cmap_green[i], sc->sc_cmap_blue[i]); 613 } 614 } 615 616 static int 617 gffb_putpalreg(struct gffb_softc *sc, uint8_t idx, uint8_t r, uint8_t g, 618 uint8_t b) 619 { 620 /* port 0 */ 621 bus_space_write_1(sc->sc_memt, sc->sc_regh, 622 GFFB_PDIO0 + GFFB_PEL_IW, idx); 623 bus_space_write_1(sc->sc_memt, sc->sc_regh, 624 GFFB_PDIO0 + GFFB_PEL_D, r); 625 bus_space_write_1(sc->sc_memt, sc->sc_regh, 626 GFFB_PDIO0 + GFFB_PEL_D, g); 627 bus_space_write_1(sc->sc_memt, sc->sc_regh, 628 GFFB_PDIO0 + GFFB_PEL_D, b); 629 630 /* port 1 */ 631 bus_space_write_1(sc->sc_memt, sc->sc_regh, 632 GFFB_PDIO1 + GFFB_PEL_IW, idx); 633 bus_space_write_1(sc->sc_memt, sc->sc_regh, 634 GFFB_PDIO1 + GFFB_PEL_D, r); 635 bus_space_write_1(sc->sc_memt, sc->sc_regh, 636 GFFB_PDIO1 + GFFB_PEL_D, g); 637 bus_space_write_1(sc->sc_memt, sc->sc_regh, 638 GFFB_PDIO1 + GFFB_PEL_D, b); 639 640 return 0; 641 } 642 643 644 static void 645 gffb_dma_kickoff(struct gffb_softc *sc) 646 { 647 volatile uint8_t scratch; 648 649 if(sc->sc_current != sc->sc_put) { 650 sc->sc_put = sc->sc_current; 651 membar_sync(); 652 scratch = *sc->sc_fbaddr; 653 GFFB_WRITE_4(GFFB_FIFO_PUT, sc->sc_put); 654 membar_sync(); 655 } 656 } 657 658 static void 659 gffb_dmanext(struct gffb_softc *sc, uint32_t data) 660 { 661 bus_space_write_stream_4(sc->sc_memt, sc->sc_fbh, sc->sc_current, data); 662 sc->sc_current += 4; 663 } 664 665 static void 666 gffb_dmastart(struct gffb_softc *sc, uint32_t tag, int size) 667 { 668 if(sc->sc_free <= (size << 2)) 669 gffb_make_room(sc, size); 670 gffb_dmanext(sc, ((size) << 18) | (tag)); 671 sc->sc_free -= ((size + 1) << 2); 672 } 673 674 /* 675 * from xf86_video_nv/nv_xaa.c: 676 * There is a HW race condition with videoram command buffers. 677 * You can't jump to the location of your put offset. We write put 678 * at the jump offset + SKIPS dwords with noop padding in between 679 * to solve this problem 680 */ 681 682 #define SKIPS 8 683 684 static void 685 gffb_make_room(struct gffb_softc *sc, int size) 686 { 687 uint32_t get; 688 689 size = (size + 1) << 2; /* slots -> offset */ 690 691 while (sc->sc_free < size) { 692 get = GFFB_READ_4(GFFB_FIFO_GET); 693 694 if (sc->sc_put >= get) { 695 sc->sc_free = 0x2000 - sc->sc_current; 696 if (sc->sc_free < size) { 697 gffb_dmanext(sc, 0x20000000); 698 if(get <= (SKIPS << 2)) { 699 if (sc->sc_put <= (SKIPS << 2)) { 700 /* corner case - will be idle */ 701 GFFB_WRITE_4(GFFB_FIFO_PUT, 702 (SKIPS + 1) << 2); 703 } 704 do { 705 get =GFFB_READ_4(GFFB_FIFO_GET); 706 } while (get <= (SKIPS << 2)); 707 } 708 GFFB_WRITE_4(GFFB_FIFO_PUT, SKIPS << 2); 709 sc->sc_current = sc->sc_put = (SKIPS << 2); 710 sc->sc_free = get - ((SKIPS + 1) << 2); 711 } 712 } else 713 sc->sc_free = get - sc->sc_current - 4; 714 } 715 } 716 717 static void 718 gffb_sync(struct gffb_softc *sc) 719 { 720 int bail; 721 int i; 722 723 /* 724 * if there are commands in the buffer make sure the chip is actually 725 * trying to run them 726 */ 727 gffb_dma_kickoff(sc); 728 729 /* now wait for the command buffer to drain... */ 730 bail = 100000000; 731 while ((GFFB_READ_4(GFFB_FIFO_GET) != sc->sc_put) && (bail > 0)) { 732 bail--; 733 } 734 if (bail == 0) goto crap; 735 736 /* ... and for the engine to go idle */ 737 bail = 100000000; 738 while((GFFB_READ_4(GFFB_BUSY) != 0) && (bail > 0)) { 739 bail--; 740 } 741 if (bail == 0) goto crap; 742 return; 743 crap: 744 /* if we time out fill the buffer with NOPs and cross fingers */ 745 sc->sc_put = 0; 746 sc->sc_current = 0; 747 for (i = 0; i < 0x2000; i += 4) 748 bus_space_write_stream_4(sc->sc_memt, sc->sc_fbh, i, 0); 749 aprint_error_dev(sc->sc_dev, "DMA lockup\n"); 750 } 751 752 static void 753 gffb_init(struct gffb_softc *sc) 754 { 755 int i; 756 uint32_t foo; 757 758 /* init display start */ 759 GFFB_WRITE_4(GFFB_CRTC0 + GFFB_DISPLAYSTART, 0x2000); 760 GFFB_WRITE_4(GFFB_CRTC1 + GFFB_DISPLAYSTART, 0x2000); 761 GFFB_WRITE_4(GFFB_PDIO0 + GFFB_PEL_MASK, 0xff); 762 GFFB_WRITE_4(GFFB_PDIO1 + GFFB_PEL_MASK, 0xff); 763 764 /* DMA stuff. A whole lot of magic number voodoo from xf86-video-nv */ 765 GFFB_WRITE_4(GFFB_PMC + 0x140, 0); 766 GFFB_WRITE_4(GFFB_PMC + 0x200, 0xffff00ff); 767 GFFB_WRITE_4(GFFB_PMC + 0x200, 0xffffffff); 768 GFFB_WRITE_4(GFFB_PTIMER + 0x800, 8); 769 GFFB_WRITE_4(GFFB_PTIMER + 0x840, 3); 770 GFFB_WRITE_4(GFFB_PTIMER + 0x500, 0); 771 GFFB_WRITE_4(GFFB_PTIMER + 0x400, 0xffffffff); 772 for (i = 0; i < 8; i++) { 773 GFFB_WRITE_4(GFFB_PMC + 0x240 + (i * 0x10), 0); 774 GFFB_WRITE_4(GFFB_PMC + 0x244 + (i * 0x10), 775 sc->sc_vramsize - 1); 776 } 777 778 for (i = 0; i < 8; i++) { 779 GFFB_WRITE_4(GFFB_PFB + 0x0240 + (i * 0x10), 0); 780 GFFB_WRITE_4(GFFB_PFB + 0x0244 + (i * 0x10), 781 sc->sc_vramsize - 1); 782 } 783 784 GFFB_WRITE_4(GFFB_PRAMIN, 0x80000010); 785 GFFB_WRITE_4(GFFB_PRAMIN + 0x04, 0x80011201); 786 GFFB_WRITE_4(GFFB_PRAMIN + 0x08, 0x80000011); 787 GFFB_WRITE_4(GFFB_PRAMIN + 0x0c, 0x80011202); 788 GFFB_WRITE_4(GFFB_PRAMIN + 0x10, 0x80000012); 789 GFFB_WRITE_4(GFFB_PRAMIN + 0x14, 0x80011203); 790 GFFB_WRITE_4(GFFB_PRAMIN + 0x18, 0x80000013); 791 GFFB_WRITE_4(GFFB_PRAMIN + 0x1c, 0x80011204); 792 GFFB_WRITE_4(GFFB_PRAMIN + 0x20, 0x80000014); 793 GFFB_WRITE_4(GFFB_PRAMIN + 0x24, 0x80011205); 794 GFFB_WRITE_4(GFFB_PRAMIN + 0x28, 0x80000015); 795 GFFB_WRITE_4(GFFB_PRAMIN + 0x2c, 0x80011206); 796 GFFB_WRITE_4(GFFB_PRAMIN + 0x30, 0x80000016); 797 GFFB_WRITE_4(GFFB_PRAMIN + 0x34, 0x80011207); 798 GFFB_WRITE_4(GFFB_PRAMIN + 0x38, 0x80000017); 799 GFFB_WRITE_4(GFFB_PRAMIN + 0x3c, 0x80011208); 800 GFFB_WRITE_4(GFFB_PRAMIN + 0x2000, 0x00003000); 801 GFFB_WRITE_4(GFFB_PRAMIN + 0x2004, sc->sc_vramsize - 1); 802 GFFB_WRITE_4(GFFB_PRAMIN + 0x2008, 0x00000002); 803 GFFB_WRITE_4(GFFB_PRAMIN + 0x200c, 0x00000002); 804 GFFB_WRITE_4(GFFB_PRAMIN + 0x2010, 0x01008042); /* different for nv40 */ 805 GFFB_WRITE_4(GFFB_PRAMIN + 0x2014, 0); 806 GFFB_WRITE_4(GFFB_PRAMIN + 0x2018, 0x12001200); 807 GFFB_WRITE_4(GFFB_PRAMIN + 0x201c, 0); 808 GFFB_WRITE_4(GFFB_PRAMIN + 0x2020, 0x01008043); 809 GFFB_WRITE_4(GFFB_PRAMIN + 0x2024, 0); 810 GFFB_WRITE_4(GFFB_PRAMIN + 0x2028, 0); 811 GFFB_WRITE_4(GFFB_PRAMIN + 0x202c, 0); 812 GFFB_WRITE_4(GFFB_PRAMIN + 0x2030, 0x01008044); 813 GFFB_WRITE_4(GFFB_PRAMIN + 0x2034, 0x00000002); 814 GFFB_WRITE_4(GFFB_PRAMIN + 0x2038, 0); 815 GFFB_WRITE_4(GFFB_PRAMIN + 0x203c, 0); 816 GFFB_WRITE_4(GFFB_PRAMIN + 0x2040, 0x01008019); 817 GFFB_WRITE_4(GFFB_PRAMIN + 0x2044, 0); 818 GFFB_WRITE_4(GFFB_PRAMIN + 0x2048, 0); 819 GFFB_WRITE_4(GFFB_PRAMIN + 0x204c, 0); 820 GFFB_WRITE_4(GFFB_PRAMIN + 0x2050, 0x0100a05c); 821 GFFB_WRITE_4(GFFB_PRAMIN + 0x2054, 0); 822 GFFB_WRITE_4(GFFB_PRAMIN + 0x2058, 0); 823 GFFB_WRITE_4(GFFB_PRAMIN + 0x205c, 0); 824 /* XXX 0x0100805f if !WaitVSynvPossible */ 825 GFFB_WRITE_4(GFFB_PRAMIN + 0x2060, 0x0100809f); 826 GFFB_WRITE_4(GFFB_PRAMIN + 0x2064, 0); 827 GFFB_WRITE_4(GFFB_PRAMIN + 0x2068, 0x12001200); 828 GFFB_WRITE_4(GFFB_PRAMIN + 0x206c, 0); 829 GFFB_WRITE_4(GFFB_PRAMIN + 0x2070, 0x0100804a); 830 GFFB_WRITE_4(GFFB_PRAMIN + 0x2074, 0x00000002); 831 GFFB_WRITE_4(GFFB_PRAMIN + 0x2078, 0); 832 GFFB_WRITE_4(GFFB_PRAMIN + 0x207c, 0); 833 GFFB_WRITE_4(GFFB_PRAMIN + 0x2080, 0x01018077); 834 GFFB_WRITE_4(GFFB_PRAMIN + 0x2084, 0); 835 GFFB_WRITE_4(GFFB_PRAMIN + 0x2088, 0x12001200); 836 GFFB_WRITE_4(GFFB_PRAMIN + 0x208c, 0); 837 GFFB_WRITE_4(GFFB_PRAMIN + 0x2090, 0x00003002); 838 GFFB_WRITE_4(GFFB_PRAMIN + 0x2094, 0x00007fff); 839 /* command buffer start with some flag in the lower bits */ 840 GFFB_WRITE_4(GFFB_PRAMIN + 0x2098, 0x00000002); 841 GFFB_WRITE_4(GFFB_PRAMIN + 0x209c, 0x00000002); 842 #if BYTE_ORDER == BIG_ENDIAN 843 GFFB_WRITE_4(GFFB_PRAMIN + 0x2010, 0x01088042); 844 GFFB_WRITE_4(GFFB_PRAMIN + 0x2020, 0x01088043); 845 GFFB_WRITE_4(GFFB_PRAMIN + 0x2030, 0x01088044); 846 GFFB_WRITE_4(GFFB_PRAMIN + 0x2040, 0x01088019); 847 GFFB_WRITE_4(GFFB_PRAMIN + 0x2050, 0x0108a05c); 848 GFFB_WRITE_4(GFFB_PRAMIN + 0x2060, 0x0108809f); 849 GFFB_WRITE_4(GFFB_PRAMIN + 0x2070, 0x0108804a); 850 GFFB_WRITE_4(GFFB_PRAMIN + 0x2080, 0x01098077); 851 GFFB_WRITE_4(GFFB_PRAMIN + 0x2034, 0x00000001); 852 GFFB_WRITE_4(GFFB_PRAMIN + 0x2074, 0x00000001); 853 #endif 854 855 /* PGRAPH setup */ 856 GFFB_WRITE_4(GFFB_PFIFO + 0x0500, 0); 857 GFFB_WRITE_4(GFFB_PFIFO + 0x0504, 0x00000001); 858 GFFB_WRITE_4(GFFB_PFIFO + 0x1200, 0); 859 GFFB_WRITE_4(GFFB_PFIFO + 0x1250, 0); 860 GFFB_WRITE_4(GFFB_PFIFO + 0x1204, 0x00000100); /* different on nv40 */ 861 GFFB_WRITE_4(GFFB_PFIFO + 0x1240, 0); 862 GFFB_WRITE_4(GFFB_PFIFO + 0x1244, 0); 863 GFFB_WRITE_4(GFFB_PFIFO + 0x122c, 0x00001209); /* different on nv40 */ 864 GFFB_WRITE_4(GFFB_PFIFO + 0x1000, 0); 865 GFFB_WRITE_4(GFFB_PFIFO + 0x1050, 0); 866 GFFB_WRITE_4(GFFB_PFIFO + 0x0210, 0x03000100); 867 GFFB_WRITE_4(GFFB_PFIFO + 0x0214, 0x00000110); 868 GFFB_WRITE_4(GFFB_PFIFO + 0x0218, 0x00000112); 869 GFFB_WRITE_4(GFFB_PFIFO + 0x050c, 0x0000ffff); 870 GFFB_WRITE_4(GFFB_PFIFO + 0x1258, 0x0000ffff); 871 GFFB_WRITE_4(GFFB_PFIFO + 0x0140, 0); 872 GFFB_WRITE_4(GFFB_PFIFO + 0x0100, 0xffffffff); 873 GFFB_WRITE_4(GFFB_PFIFO + 0x1054, 0x00000001); 874 GFFB_WRITE_4(GFFB_PFIFO + 0x1230, 0); 875 GFFB_WRITE_4(GFFB_PFIFO + 0x1280, 0); 876 #if BYTE_ORDER == BIG_ENDIAN 877 GFFB_WRITE_4(GFFB_PFIFO + 0x1224, 0x800f0078); 878 #else 879 GFFB_WRITE_4(GFFB_PFIFO + 0x1224, 0x000f0078); 880 #endif 881 GFFB_WRITE_4(GFFB_PFIFO + 0x1220, 0x00000001); 882 GFFB_WRITE_4(GFFB_PFIFO + 0x1200, 0x00000001); 883 GFFB_WRITE_4(GFFB_PFIFO + 0x1250, 0x00000001); 884 GFFB_WRITE_4(GFFB_PFIFO + 0x1254, 0x00000001); 885 GFFB_WRITE_4(GFFB_PFIFO + 0x0500, 0x00000001); 886 887 GFFB_WRITE_4(GFFB_PGRAPH + 0x0080, 0xFFFFFFFF); 888 GFFB_WRITE_4(GFFB_PGRAPH + 0x0080, 0x00000000); 889 890 GFFB_WRITE_4(GFFB_PGRAPH + 0x0140, 0x00000000); 891 GFFB_WRITE_4(GFFB_PGRAPH + 0x0100, 0xFFFFFFFF); 892 GFFB_WRITE_4(GFFB_PGRAPH + 0x0144, 0x10010100); 893 GFFB_WRITE_4(GFFB_PGRAPH + 0x0714, 0xFFFFFFFF); 894 GFFB_WRITE_4(GFFB_PGRAPH + 0x0720, 0x00000001); 895 /* 896 * xf86_video_nv does this in two writes, 897 * not sure if they can be combined 898 */ 899 foo = GFFB_READ_4(GFFB_PGRAPH + 0x0710); 900 GFFB_WRITE_4(GFFB_PGRAPH + 0x0710, foo & 0x0007ff00); 901 foo = GFFB_READ_4(GFFB_PGRAPH + 0x0710); 902 GFFB_WRITE_4(GFFB_PGRAPH + 0x0710, foo | 0x00020100); 903 904 /* NV_ARCH_10 */ 905 GFFB_WRITE_4(GFFB_PGRAPH + 0x0084, 0x00118700); 906 GFFB_WRITE_4(GFFB_PGRAPH + 0x0088, 0x24E00810); 907 GFFB_WRITE_4(GFFB_PGRAPH + 0x008C, 0x55DE0030); 908 909 for(i = 0; i < 128; i += 4) { 910 GFFB_WRITE_4(GFFB_PGRAPH + 0x0B00 + i, 911 GFFB_READ_4(GFFB_PFB + 0x0240 + i)); 912 } 913 914 GFFB_WRITE_4(GFFB_PGRAPH + 0x640, 0); 915 GFFB_WRITE_4(GFFB_PGRAPH + 0x644, 0); 916 GFFB_WRITE_4(GFFB_PGRAPH + 0x684, sc->sc_vramsize - 1); 917 GFFB_WRITE_4(GFFB_PGRAPH + 0x688, sc->sc_vramsize - 1); 918 919 GFFB_WRITE_4(GFFB_PGRAPH + 0x0810, 0x00000000); 920 GFFB_WRITE_4(GFFB_PGRAPH + 0x0608, 0xFFFFFFFF); 921 922 GFFB_WRITE_4(GFFB_PGRAPH + 0x053C, 0); 923 GFFB_WRITE_4(GFFB_PGRAPH + 0x0540, 0); 924 GFFB_WRITE_4(GFFB_PGRAPH + 0x0544, 0x00007FFF); 925 GFFB_WRITE_4(GFFB_PGRAPH + 0x0548, 0x00007FFF); 926 927 GFFB_WRITE_4(GFFB_CMDSTART, 0x00000002); 928 GFFB_WRITE_4(GFFB_FIFO_GET, 0); 929 sc->sc_put = 0; 930 sc->sc_current = 0; 931 sc->sc_free = 0x2000; 932 933 for(i = 0; i < SKIPS; i++) 934 gffb_dmanext(sc, 0); 935 936 gffb_dmanext(sc, 0x00040000); 937 gffb_dmanext(sc, 0x80000010); 938 gffb_dmanext(sc, 0x00042000); 939 gffb_dmanext(sc, 0x80000011); 940 gffb_dmanext(sc, 0x00044000); 941 gffb_dmanext(sc, 0x80000012); 942 gffb_dmanext(sc, 0x00046000); 943 gffb_dmanext(sc, 0x80000013); 944 gffb_dmanext(sc, 0x00048000); 945 gffb_dmanext(sc, 0x80000014); 946 gffb_dmanext(sc, 0x0004A000); 947 gffb_dmanext(sc, 0x80000015); 948 gffb_dmanext(sc, 0x0004C000); 949 gffb_dmanext(sc, 0x80000016); 950 gffb_dmanext(sc, 0x0004E000); 951 gffb_dmanext(sc, 0x80000017); 952 sc->sc_free = 0x2000 - sc->sc_current; 953 954 gffb_dmastart(sc, SURFACE_FORMAT, 4); 955 gffb_dmanext(sc, SURFACE_FORMAT_DEPTH8); 956 gffb_dmanext(sc, sc->sc_stride | (sc->sc_stride << 16)); 957 gffb_dmanext(sc, 0x2000); /* src offset */ 958 gffb_dmanext(sc, 0x2000); /* dst offset */ 959 960 gffb_dmastart(sc, RECT_FORMAT, 1); 961 gffb_dmanext(sc, RECT_FORMAT_DEPTH8); 962 963 gffb_dmastart(sc, PATTERN_FORMAT, 1); 964 gffb_dmanext(sc, PATTERN_FORMAT_DEPTH8); 965 966 gffb_dmastart(sc, PATTERN_COLOR_0, 4); 967 gffb_dmanext(sc, 0xffffffff); 968 gffb_dmanext(sc, 0xffffffff); 969 gffb_dmanext(sc, 0xffffffff); 970 gffb_dmanext(sc, 0xffffffff); 971 972 gffb_dmastart(sc, ROP_SET, 1); 973 gffb_dmanext(sc, 0xcc); 974 sc->sc_rop = 0xcc; 975 976 gffb_dma_kickoff(sc); 977 gffb_sync(sc); 978 DPRINTF("put %x current %x\n", sc->sc_put, sc->sc_current); 979 980 } 981 982 static void 983 gffb_rop(struct gffb_softc *sc, int rop) 984 { 985 if (rop == sc->sc_rop) 986 return; 987 sc->sc_rop = rop; 988 gffb_dmastart(sc, ROP_SET, 1); 989 gffb_dmanext(sc, rop); 990 } 991 992 static void 993 gffb_rectfill(struct gffb_softc *sc, int x, int y, int wi, int he, 994 uint32_t colour) 995 { 996 mutex_enter(&sc->sc_lock); 997 gffb_rop(sc, 0xcc); 998 999 gffb_dmastart(sc, RECT_SOLID_COLOR, 1); 1000 gffb_dmanext(sc, colour); 1001 1002 gffb_dmastart(sc, RECT_SOLID_RECTS(0), 2); 1003 gffb_dmanext(sc, (x << 16) | y); 1004 gffb_dmanext(sc, (wi << 16) | he); 1005 gffb_dma_kickoff(sc); 1006 mutex_exit(&sc->sc_lock); 1007 } 1008 1009 static void 1010 gffb_bitblt(void *cookie, int xs, int ys, int xd, int yd, 1011 int wi, int he, int rop) 1012 { 1013 struct gffb_softc *sc = cookie; 1014 1015 mutex_enter(&sc->sc_lock); 1016 1017 gffb_rop(sc, rop); 1018 1019 gffb_dmastart(sc, BLIT_POINT_SRC, 3); 1020 gffb_dmanext(sc, (ys << 16) | xs); 1021 gffb_dmanext(sc, (yd << 16) | xd); 1022 gffb_dmanext(sc, (he << 16) | wi); 1023 gffb_dma_kickoff(sc); 1024 mutex_exit(&sc->sc_lock); 1025 } 1026 1027 static void 1028 gffb_cursor(void *cookie, int on, int row, int col) 1029 { 1030 struct rasops_info *ri = cookie; 1031 struct vcons_screen *scr = ri->ri_hw; 1032 struct gffb_softc *sc = scr->scr_cookie; 1033 int x, y, wi, he; 1034 1035 wi = ri->ri_font->fontwidth; 1036 he = ri->ri_font->fontheight; 1037 1038 if (sc->sc_mode == WSDISPLAYIO_MODE_EMUL) { 1039 x = ri->ri_ccol * wi + ri->ri_xorigin; 1040 y = ri->ri_crow * he + ri->ri_yorigin; 1041 if (ri->ri_flg & RI_CURSOR) { 1042 gffb_bitblt(sc, x, y, x, y, wi, he, 0x33); 1043 ri->ri_flg &= ~RI_CURSOR; 1044 } 1045 ri->ri_crow = row; 1046 ri->ri_ccol = col; 1047 if (on) { 1048 x = ri->ri_ccol * wi + ri->ri_xorigin; 1049 y = ri->ri_crow * he + ri->ri_yorigin; 1050 gffb_bitblt(sc, x, y, x, y, wi, he, 0x33); 1051 ri->ri_flg |= RI_CURSOR; 1052 } 1053 } else { 1054 scr->scr_ri.ri_crow = row; 1055 scr->scr_ri.ri_ccol = col; 1056 scr->scr_ri.ri_flg &= ~RI_CURSOR; 1057 } 1058 1059 } 1060 1061 static void 1062 gffb_putchar(void *cookie, int row, int col, u_int c, long attr) 1063 { 1064 struct rasops_info *ri = cookie; 1065 struct wsdisplay_font *font = PICK_FONT(ri, c); 1066 struct vcons_screen *scr = ri->ri_hw; 1067 struct gffb_softc *sc = scr->scr_cookie; 1068 int x, y, wi, he, rv = GC_NOPE; 1069 uint32_t bg; 1070 1071 if (sc->sc_mode != WSDISPLAYIO_MODE_EMUL) 1072 return; 1073 1074 if (!CHAR_IN_FONT(c, font)) 1075 return; 1076 1077 wi = font->fontwidth; 1078 he = font->fontheight; 1079 1080 x = ri->ri_xorigin + col * wi; 1081 y = ri->ri_yorigin + row * he; 1082 bg = ri->ri_devcmap[(attr >> 16) & 0xf]; 1083 1084 if (c == 0x20) { 1085 gffb_rectfill(sc, x, y, wi, he, bg); 1086 return; 1087 } 1088 rv = glyphcache_try(&sc->sc_gc, c, x, y, attr); 1089 if (rv == GC_OK) 1090 return; 1091 1092 mutex_enter(&sc->sc_lock); 1093 gffb_sync(sc); 1094 sc->sc_putchar(cookie, row, col, c, attr); 1095 membar_sync(); 1096 mutex_exit(&sc->sc_lock); 1097 1098 if (rv == GC_ADD) { 1099 glyphcache_add(&sc->sc_gc, c, x, y); 1100 } 1101 } 1102 1103 static void 1104 gffb_copycols(void *cookie, int row, int srccol, int dstcol, int ncols) 1105 { 1106 struct rasops_info *ri = cookie; 1107 struct vcons_screen *scr = ri->ri_hw; 1108 struct gffb_softc *sc = scr->scr_cookie; 1109 int32_t xs, xd, y, width, height; 1110 1111 if ((sc->sc_locked == 0) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1112 xs = ri->ri_xorigin + ri->ri_font->fontwidth * srccol; 1113 xd = ri->ri_xorigin + ri->ri_font->fontwidth * dstcol; 1114 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1115 width = ri->ri_font->fontwidth * ncols; 1116 height = ri->ri_font->fontheight; 1117 gffb_bitblt(sc, xs, y, xd, y, width, height, 0xcc); 1118 } 1119 } 1120 1121 static void 1122 gffb_erasecols(void *cookie, int row, int startcol, int ncols, long fillattr) 1123 { 1124 struct rasops_info *ri = cookie; 1125 struct vcons_screen *scr = ri->ri_hw; 1126 struct gffb_softc *sc = scr->scr_cookie; 1127 int32_t x, y, width, height, fg, bg, ul; 1128 1129 if ((sc->sc_locked == 0) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1130 x = ri->ri_xorigin + ri->ri_font->fontwidth * startcol; 1131 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1132 width = ri->ri_font->fontwidth * ncols; 1133 height = ri->ri_font->fontheight; 1134 rasops_unpack_attr(fillattr, &fg, &bg, &ul); 1135 1136 gffb_rectfill(sc, x, y, width, height, ri->ri_devcmap[bg]); 1137 } 1138 } 1139 1140 static void 1141 gffb_copyrows(void *cookie, int srcrow, int dstrow, int nrows) 1142 { 1143 struct rasops_info *ri = cookie; 1144 struct vcons_screen *scr = ri->ri_hw; 1145 struct gffb_softc *sc = scr->scr_cookie; 1146 int32_t x, ys, yd, width, height; 1147 1148 if ((sc->sc_locked == 0) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1149 x = ri->ri_xorigin; 1150 ys = ri->ri_yorigin + ri->ri_font->fontheight * srcrow; 1151 yd = ri->ri_yorigin + ri->ri_font->fontheight * dstrow; 1152 width = ri->ri_emuwidth; 1153 height = ri->ri_font->fontheight * nrows; 1154 gffb_bitblt(sc, x, ys, x, yd, width, height, 0xcc); 1155 } 1156 } 1157 1158 static void 1159 gffb_eraserows(void *cookie, int row, int nrows, long fillattr) 1160 { 1161 struct rasops_info *ri = cookie; 1162 struct vcons_screen *scr = ri->ri_hw; 1163 struct gffb_softc *sc = scr->scr_cookie; 1164 int32_t x, y, width, height, fg, bg, ul; 1165 1166 if ((sc->sc_locked == 0) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1167 x = ri->ri_xorigin; 1168 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1169 width = ri->ri_emuwidth; 1170 height = ri->ri_font->fontheight * nrows; 1171 rasops_unpack_attr(fillattr, &fg, &bg, &ul); 1172 1173 gffb_rectfill(sc, x, y, width, height, ri->ri_devcmap[bg]); 1174 } 1175 } 1176