1 /* $NetBSD: gffb.c,v 1.14 2020/05/21 22:55:48 macallan Exp $ */ 2 3 /* 4 * Copyright (c) 2013 Michael Lorenz 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 /* 29 * A console driver for nvidia geforce graphics controllers 30 * tested on macppc only so far, should work on other hardware as long as 31 * something sets up a usable graphics mode and sets the right device properties 32 * This driver should work with all NV1x hardware but so far it's been tested 33 * only on NV11 / GeForce2 MX. Needs testing with more hardware and if 34 * successful, PCI IDs need to be added to gffb_match() 35 */ 36 37 #include <sys/cdefs.h> 38 __KERNEL_RCSID(0, "$NetBSD: gffb.c,v 1.14 2020/05/21 22:55:48 macallan Exp $"); 39 40 #include <sys/param.h> 41 #include <sys/systm.h> 42 #include <sys/kernel.h> 43 #include <sys/device.h> 44 #include <sys/malloc.h> 45 #include <sys/lwp.h> 46 #include <sys/kauth.h> 47 #include <sys/atomic.h> 48 49 #include <dev/pci/pcivar.h> 50 #include <dev/pci/pcireg.h> 51 #include <dev/pci/pcidevs.h> 52 #include <dev/pci/pciio.h> 53 #include <dev/pci/gffbreg.h> 54 55 #include <dev/wscons/wsdisplayvar.h> 56 #include <dev/wscons/wsconsio.h> 57 #include <dev/wsfont/wsfont.h> 58 #include <dev/rasops/rasops.h> 59 #include <dev/wscons/wsdisplay_vconsvar.h> 60 #include <dev/pci/wsdisplay_pci.h> 61 #include <dev/wscons/wsdisplay_glyphcachevar.h> 62 63 #include "opt_gffb.h" 64 #include "opt_vcons.h" 65 66 #ifdef GFFB_DEBUG 67 #define DPRINTF printf 68 #else 69 #define DPRINTF while(0) printf 70 #endif 71 72 struct gffb_softc { 73 device_t sc_dev; 74 75 pci_chipset_tag_t sc_pc; 76 pcitag_t sc_pcitag; 77 78 bus_space_tag_t sc_memt; 79 bus_space_tag_t sc_iot; 80 81 bus_space_handle_t sc_regh, sc_fbh; 82 bus_addr_t sc_fb, sc_reg; 83 bus_size_t sc_fbsize, sc_regsize; 84 uint8_t *sc_fbaddr; 85 size_t sc_vramsize; 86 uint32_t sc_fboffset; 87 88 int sc_width, sc_height, sc_depth, sc_stride; 89 int sc_locked, sc_accel; 90 struct vcons_screen sc_console_screen; 91 struct wsscreen_descr sc_defaultscreen_descr; 92 const struct wsscreen_descr *sc_screens[1]; 93 struct wsscreen_list sc_screenlist; 94 struct vcons_data vd; 95 int sc_mode; 96 u_char sc_cmap_red[256]; 97 u_char sc_cmap_green[256]; 98 u_char sc_cmap_blue[256]; 99 int sc_put, sc_current, sc_free; 100 uint32_t sc_rop; 101 void (*sc_putchar)(void *, int, int, u_int, long); 102 kmutex_t sc_lock; 103 glyphcache sc_gc; 104 }; 105 106 static int gffb_match(device_t, cfdata_t, void *); 107 static void gffb_attach(device_t, device_t, void *); 108 109 CFATTACH_DECL_NEW(gffb, sizeof(struct gffb_softc), 110 gffb_match, gffb_attach, NULL, NULL); 111 112 static int gffb_ioctl(void *, void *, u_long, void *, int, struct lwp *); 113 static paddr_t gffb_mmap(void *, void *, off_t, int); 114 static void gffb_init_screen(void *, struct vcons_screen *, int, long *); 115 116 static int gffb_putcmap(struct gffb_softc *, struct wsdisplay_cmap *); 117 static int gffb_getcmap(struct gffb_softc *, struct wsdisplay_cmap *); 118 static void gffb_restore_palette(struct gffb_softc *); 119 static int gffb_putpalreg(struct gffb_softc *, uint8_t, uint8_t, 120 uint8_t, uint8_t); 121 122 static void gffb_init(struct gffb_softc *); 123 124 static void gffb_make_room(struct gffb_softc *, int); 125 static void gffb_sync(struct gffb_softc *); 126 127 static void gffb_rectfill(struct gffb_softc *, int, int, int, int, 128 uint32_t); 129 static void gffb_bitblt(void *, int, int, int, int, int, int, int); 130 static void gffb_rop(struct gffb_softc *, int); 131 132 static void gffb_cursor(void *, int, int, int); 133 static void gffb_putchar(void *, int, int, u_int, long); 134 static void gffb_copycols(void *, int, int, int, int); 135 static void gffb_erasecols(void *, int, int, int, long); 136 static void gffb_copyrows(void *, int, int, int); 137 static void gffb_eraserows(void *, int, int, long); 138 139 #define GFFB_READ_4(o) bus_space_read_4(sc->sc_memt, sc->sc_regh, (o)) 140 #define GFFB_WRITE_4(o, v) bus_space_write_4(sc->sc_memt, sc->sc_regh, (o), (v)) 141 142 struct wsdisplay_accessops gffb_accessops = { 143 gffb_ioctl, 144 gffb_mmap, 145 NULL, /* alloc_screen */ 146 NULL, /* free_screen */ 147 NULL, /* show_screen */ 148 NULL, /* load_font */ 149 NULL, /* pollc */ 150 NULL /* scroll */ 151 }; 152 153 static int 154 gffb_match(device_t parent, cfdata_t match, void *aux) 155 { 156 struct pci_attach_args *pa = (struct pci_attach_args *)aux; 157 158 if (PCI_CLASS(pa->pa_class) != PCI_CLASS_DISPLAY) 159 return 0; 160 if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_NVIDIA) 161 return 0; 162 163 /* only card tested on so far - likely need a list */ 164 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_NVIDIA_GEFORCE2MX) 165 return 100; 166 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_NVIDIA_GEFORCE_6800U) 167 return 100; 168 return (0); 169 } 170 171 static void 172 gffb_attach(device_t parent, device_t self, void *aux) 173 { 174 struct gffb_softc *sc = device_private(self); 175 struct pci_attach_args *pa = aux; 176 struct rasops_info *ri; 177 bus_space_tag_t tag; 178 struct wsemuldisplaydev_attach_args aa; 179 prop_dictionary_t dict; 180 unsigned long defattr; 181 pcireg_t reg; 182 bool is_console = FALSE; 183 uint32_t addr; 184 int i, j, f; 185 uint8_t cmap[768]; 186 187 sc->sc_pc = pa->pa_pc; 188 sc->sc_pcitag = pa->pa_tag; 189 sc->sc_memt = pa->pa_memt; 190 sc->sc_iot = pa->pa_iot; 191 sc->sc_dev = self; 192 193 /* first, see what kind of chip we've got */ 194 reg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, PCI_ID_REG); 195 sc->sc_accel = PCI_PRODUCT(reg) == PCI_PRODUCT_NVIDIA_GEFORCE2MX; 196 197 pci_aprint_devinfo(pa, NULL); 198 199 /* fill in parameters from properties */ 200 dict = device_properties(self); 201 if (!prop_dictionary_get_uint32(dict, "width", &sc->sc_width)) { 202 aprint_error("%s: no width property\n", device_xname(self)); 203 return; 204 } 205 if (!prop_dictionary_get_uint32(dict, "height", &sc->sc_height)) { 206 aprint_error("%s: no height property\n", device_xname(self)); 207 return; 208 } 209 210 #ifdef GLYPHCACHE_DEBUG 211 /* leave some visible VRAM unused so we can see the glyph cache */ 212 sc->sc_height -= 300; 213 #endif 214 215 if (!prop_dictionary_get_uint32(dict, "depth", &sc->sc_depth)) { 216 aprint_error("%s: no depth property\n", device_xname(self)); 217 return; 218 } 219 if (!prop_dictionary_get_uint32(dict, "linebytes", &sc->sc_stride)) { 220 aprint_error("%s: no linebytes property\n", 221 device_xname(self)); 222 return; 223 } 224 225 /* 226 * on !2MX we need to use the firmware's offset - for some reason 227 * register writes to anything other than the DACs go wrong 228 */ 229 sc->sc_fboffset = 0; 230 if (prop_dictionary_get_uint32(dict, "address", &addr)) { 231 sc->sc_fboffset = addr & 0x000fffff; /* XXX */ 232 } 233 234 prop_dictionary_get_bool(dict, "is_console", &is_console); 235 236 if (pci_mapreg_map(pa, 0x10, PCI_MAPREG_TYPE_MEM, 0, 237 &tag, &sc->sc_regh, &sc->sc_reg, &sc->sc_regsize)) { 238 aprint_error("%s: failed to map registers.\n", 239 device_xname(sc->sc_dev)); 240 } 241 sc->sc_vramsize = GFFB_READ_4(GFFB_VRAM) & 0xfff00000; 242 243 /* don't map more VRAM than we actually have */ 244 if (pci_mapreg_info(sc->sc_pc, sc->sc_pcitag, 245 0x14, PCI_MAPREG_TYPE_MEM, &sc->sc_fb, &sc->sc_fbsize, &f)) { 246 aprint_error("%s: can't find the framebuffer?!\n", 247 device_xname(sc->sc_dev)); 248 } 249 if (sc->sc_vramsize == 0) sc->sc_vramsize = sc->sc_fbsize; 250 251 /* don't map (much) more than we actually need */ 252 if (bus_space_map(sc->sc_memt, sc->sc_fb, 0x1000000, 253 BUS_SPACE_MAP_PREFETCHABLE | BUS_SPACE_MAP_LINEAR, 254 &sc->sc_fbh)) { 255 aprint_error("%s: failed to map the framebuffer.\n", 256 device_xname(sc->sc_dev)); 257 } 258 sc->sc_fbaddr = bus_space_vaddr(tag, sc->sc_fbh); 259 260 aprint_normal("%s: %d MB aperture at 0x%08x\n", device_xname(self), 261 (int)(sc->sc_fbsize >> 20), (uint32_t)sc->sc_fb); 262 aprint_normal_dev(sc->sc_dev, "%d MB video memory\n", 263 (int)(sc->sc_vramsize >> 20)); 264 265 sc->sc_defaultscreen_descr = (struct wsscreen_descr){ 266 "default", 267 0, 0, 268 NULL, 269 8, 16, 270 WSSCREEN_WSCOLORS | WSSCREEN_HILIT, 271 NULL 272 }; 273 sc->sc_screens[0] = &sc->sc_defaultscreen_descr; 274 sc->sc_screenlist = (struct wsscreen_list){1, sc->sc_screens}; 275 sc->sc_mode = WSDISPLAYIO_MODE_EMUL; 276 sc->sc_locked = 0; 277 278 #ifdef GFFB_DEBUG 279 printf("put: %08x\n", GFFB_READ_4(GFFB_FIFO_PUT)); 280 printf("get: %08x\n", GFFB_READ_4(GFFB_FIFO_GET)); 281 #endif 282 283 /* 284 * we don't have hardware synchronization so we need a lock to serialize 285 * access to the DMA buffer between normal and kernel output 286 * actually it might be enough to use atomic ops on sc_current, sc_free 287 * etc. but for now we'll play it safe 288 * XXX we will probably deadlock if we take an interrupt while sc_lock 289 * is held and then try to printf() 290 */ 291 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_NONE); 292 293 /* init engine here */ 294 gffb_init(sc); 295 296 vcons_init(&sc->vd, sc, &sc->sc_defaultscreen_descr, 297 &gffb_accessops); 298 sc->vd.init_screen = gffb_init_screen; 299 300 301 ri = &sc->sc_console_screen.scr_ri; 302 303 if (sc->sc_accel) { 304 sc->sc_gc.gc_bitblt = gffb_bitblt; 305 sc->sc_gc.gc_blitcookie = sc; 306 sc->sc_gc.gc_rop = 0xcc; 307 } 308 309 if (is_console) { 310 vcons_init_screen(&sc->vd, &sc->sc_console_screen, 1, 311 &defattr); 312 sc->sc_console_screen.scr_flags |= VCONS_SCREEN_IS_STATIC; 313 314 if (sc->sc_accel) { 315 gffb_rectfill(sc, 0, 0, sc->sc_width, sc->sc_height, 316 ri->ri_devcmap[(defattr >> 16) & 0xf]); 317 } else { 318 memset(sc->sc_fbaddr + sc->sc_fboffset, 319 ri->ri_devcmap[(defattr >> 16) & 0xf], 320 sc->sc_stride * sc->sc_height); 321 } 322 sc->sc_defaultscreen_descr.textops = &ri->ri_ops; 323 sc->sc_defaultscreen_descr.capabilities = ri->ri_caps; 324 sc->sc_defaultscreen_descr.nrows = ri->ri_rows; 325 sc->sc_defaultscreen_descr.ncols = ri->ri_cols; 326 327 if (sc->sc_accel) 328 glyphcache_init(&sc->sc_gc, sc->sc_height + 5, 329 (0x800000 / sc->sc_stride) - sc->sc_height - 5, 330 sc->sc_width, 331 ri->ri_font->fontwidth, 332 ri->ri_font->fontheight, 333 defattr); 334 335 wsdisplay_cnattach(&sc->sc_defaultscreen_descr, ri, 0, 0, 336 defattr); 337 vcons_replay_msgbuf(&sc->sc_console_screen); 338 } else { 339 /* 340 * since we're not the console we can postpone the rest 341 * until someone actually allocates a screen for us 342 */ 343 if (sc->sc_console_screen.scr_ri.ri_rows == 0) { 344 /* do some minimal setup to avoid weirdnesses later */ 345 vcons_init_screen(&sc->vd, &sc->sc_console_screen, 1, 346 &defattr); 347 } else 348 (*ri->ri_ops.allocattr)(ri, 0, 0, 0, &defattr); 349 350 if (sc->sc_accel) 351 glyphcache_init(&sc->sc_gc, sc->sc_height + 5, 352 (0x800000 / sc->sc_stride) - sc->sc_height - 5, 353 sc->sc_width, 354 ri->ri_font->fontwidth, 355 ri->ri_font->fontheight, 356 defattr); 357 } 358 359 j = 0; 360 rasops_get_cmap(ri, cmap, sizeof(cmap)); 361 for (i = 0; i < 256; i++) { 362 sc->sc_cmap_red[i] = cmap[j]; 363 sc->sc_cmap_green[i] = cmap[j + 1]; 364 sc->sc_cmap_blue[i] = cmap[j + 2]; 365 gffb_putpalreg(sc, i, cmap[j], cmap[j + 1], cmap[j + 2]); 366 j += 3; 367 } 368 369 /* no suspend/resume support yet */ 370 if (!pmf_device_register(sc->sc_dev, NULL, NULL)) 371 aprint_error_dev(sc->sc_dev, 372 "couldn't establish power handler\n"); 373 374 aa.console = is_console; 375 aa.scrdata = &sc->sc_screenlist; 376 aa.accessops = &gffb_accessops; 377 aa.accesscookie = &sc->vd; 378 379 config_found(sc->sc_dev, &aa, wsemuldisplaydevprint); 380 381 #ifdef GFFB_DEBUG 382 for (i = 0; i < 40; i++) { 383 for (j = 0; j < 40; j++) { 384 gffb_rectfill(sc, i * 20, j * 20, 20, 20, 385 (i + j ) & 1 ? 0xe0e0e0e0 : 0x03030303); 386 } 387 } 388 389 gffb_rectfill(sc, 0, 800, 1280, 224, 0x92929292); 390 gffb_bitblt(sc, 0, 10, 10, 810, 200, 20, 0xcc); 391 gffb_bitblt(sc, 0, 10, 10, 840, 300, 20, 0xcc); 392 gffb_bitblt(sc, 0, 10, 10, 870, 400, 20, 0xcc); 393 gffb_bitblt(sc, 0, 10, 10, 900, 500, 20, 0xcc); 394 gffb_bitblt(sc, 0, 10, 10, 930, 600, 20, 0xcc); 395 gffb_bitblt(sc, 0, 10, 610, 810, 200, 20, 0xcc); 396 gffb_bitblt(sc, 0, 10, 610, 840, 300, 20, 0xcc); 397 gffb_bitblt(sc, 0, 10, 610, 870, 400, 20, 0xcc); 398 gffb_bitblt(sc, 0, 10, 610, 900, 500, 20, 0xcc); 399 gffb_bitblt(sc, 0, 10, 610, 930, 600, 20, 0xcc); 400 gffb_sync(sc); 401 printf("put %x current %x\n", sc->sc_put, sc->sc_current); 402 #endif 403 } 404 405 static int 406 gffb_ioctl(void *v, void *vs, u_long cmd, void *data, int flag, struct lwp *l) 407 { 408 struct vcons_data *vd = v; 409 struct gffb_softc *sc = vd->cookie; 410 struct wsdisplay_fbinfo *wdf; 411 struct vcons_screen *ms = vd->active; 412 413 switch (cmd) { 414 case WSDISPLAYIO_GTYPE: 415 *(u_int *)data = WSDISPLAY_TYPE_PCIMISC; 416 return 0; 417 418 /* PCI config read/write passthrough. */ 419 case PCI_IOC_CFGREAD: 420 case PCI_IOC_CFGWRITE: 421 return pci_devioctl(sc->sc_pc, sc->sc_pcitag, 422 cmd, data, flag, l); 423 424 case WSDISPLAYIO_GET_BUSID: 425 return wsdisplayio_busid_pci(sc->sc_dev, sc->sc_pc, 426 sc->sc_pcitag, data); 427 428 case WSDISPLAYIO_GINFO: 429 if (ms == NULL) 430 return ENODEV; 431 wdf = (void *)data; 432 wdf->height = ms->scr_ri.ri_height; 433 wdf->width = ms->scr_ri.ri_width; 434 wdf->depth = ms->scr_ri.ri_depth; 435 wdf->cmsize = 256; 436 return 0; 437 438 case WSDISPLAYIO_GETCMAP: 439 return gffb_getcmap(sc, 440 (struct wsdisplay_cmap *)data); 441 442 case WSDISPLAYIO_PUTCMAP: 443 return gffb_putcmap(sc, 444 (struct wsdisplay_cmap *)data); 445 446 case WSDISPLAYIO_LINEBYTES: 447 *(u_int *)data = sc->sc_stride; 448 return 0; 449 450 case WSDISPLAYIO_SMODE: { 451 int new_mode = *(int*)data; 452 if (new_mode != sc->sc_mode) { 453 sc->sc_mode = new_mode; 454 if(new_mode == WSDISPLAYIO_MODE_EMUL) { 455 gffb_init(sc); 456 gffb_restore_palette(sc); 457 if (sc->sc_accel) { 458 glyphcache_wipe(&sc->sc_gc); 459 gffb_rectfill(sc, 0, 0, sc->sc_width, 460 sc->sc_height, ms->scr_ri.ri_devcmap[ 461 (ms->scr_defattr >> 16) & 0xf]); 462 } else { 463 memset(sc->sc_fbaddr + sc->sc_fboffset, 464 ms->scr_ri.ri_devcmap[ 465 (ms->scr_defattr >> 16) & 0xf], 466 sc->sc_stride * sc->sc_height); 467 } 468 vcons_redraw_screen(ms); 469 } 470 } 471 } 472 return 0; 473 474 case WSDISPLAYIO_GET_EDID: { 475 struct wsdisplayio_edid_info *d = data; 476 return wsdisplayio_get_edid(sc->sc_dev, d); 477 } 478 479 case WSDISPLAYIO_GET_FBINFO: { 480 struct wsdisplayio_fbinfo *fbi = data; 481 return wsdisplayio_get_fbinfo(&ms->scr_ri, fbi); 482 } 483 } 484 return EPASSTHROUGH; 485 } 486 487 static paddr_t 488 gffb_mmap(void *v, void *vs, off_t offset, int prot) 489 { 490 struct vcons_data *vd = v; 491 struct gffb_softc *sc = vd->cookie; 492 paddr_t pa; 493 494 /* 'regular' framebuffer mmap()ing */ 495 if (offset < sc->sc_vramsize) { 496 pa = bus_space_mmap(sc->sc_memt, sc->sc_fb + offset + 0x2000, 497 0, prot, BUS_SPACE_MAP_LINEAR); 498 return pa; 499 } 500 501 /* 502 * restrict all other mappings to processes with superuser privileges 503 * or the kernel itself 504 */ 505 if (kauth_authorize_machdep(kauth_cred_get(), 506 KAUTH_MACHDEP_UNMANAGEDMEM, 507 NULL, NULL, NULL, NULL) != 0) { 508 aprint_normal("%s: mmap() rejected.\n", 509 device_xname(sc->sc_dev)); 510 return -1; 511 } 512 513 if ((offset >= sc->sc_fb) && (offset < (sc->sc_fb + sc->sc_fbsize))) { 514 pa = bus_space_mmap(sc->sc_memt, offset, 0, prot, 515 BUS_SPACE_MAP_LINEAR); 516 return pa; 517 } 518 519 if ((offset >= sc->sc_reg) && 520 (offset < (sc->sc_reg + sc->sc_regsize))) { 521 pa = bus_space_mmap(sc->sc_memt, offset, 0, prot, 522 BUS_SPACE_MAP_LINEAR); 523 return pa; 524 } 525 526 #ifdef PCI_MAGIC_IO_RANGE 527 /* allow mapping of IO space */ 528 if ((offset >= PCI_MAGIC_IO_RANGE) && 529 (offset < PCI_MAGIC_IO_RANGE + 0x10000)) { 530 pa = bus_space_mmap(sc->sc_iot, offset - PCI_MAGIC_IO_RANGE, 531 0, prot, BUS_SPACE_MAP_LINEAR); 532 return pa; 533 } 534 #endif 535 536 return -1; 537 } 538 539 static void 540 gffb_init_screen(void *cookie, struct vcons_screen *scr, 541 int existing, long *defattr) 542 { 543 struct gffb_softc *sc = cookie; 544 struct rasops_info *ri = &scr->scr_ri; 545 546 ri->ri_depth = sc->sc_depth; 547 ri->ri_width = sc->sc_width; 548 ri->ri_height = sc->sc_height; 549 ri->ri_stride = sc->sc_stride; 550 if (sc->sc_depth == 8) 551 ri->ri_bits = sc->sc_fbaddr + sc->sc_fboffset; 552 ri->ri_flg = RI_CENTER; 553 ri->ri_flg |= RI_8BIT_IS_RGB | RI_ENABLE_ALPHA; 554 555 rasops_init(ri, 0, 0); 556 ri->ri_caps = WSSCREEN_WSCOLORS; 557 558 rasops_reconfig(ri, sc->sc_height / ri->ri_font->fontheight, 559 sc->sc_width / ri->ri_font->fontwidth); 560 561 ri->ri_hw = scr; 562 563 if (sc->sc_accel) { 564 sc->sc_putchar = ri->ri_ops.putchar; 565 ri->ri_ops.copyrows = gffb_copyrows; 566 ri->ri_ops.copycols = gffb_copycols; 567 ri->ri_ops.eraserows = gffb_eraserows; 568 ri->ri_ops.erasecols = gffb_erasecols; 569 ri->ri_ops.cursor = gffb_cursor; 570 ri->ri_ops.putchar = gffb_putchar; 571 } else { 572 scr->scr_flags |= VCONS_DONT_READ; 573 } 574 } 575 576 static int 577 gffb_putcmap(struct gffb_softc *sc, struct wsdisplay_cmap *cm) 578 { 579 u_char *r, *g, *b; 580 u_int index = cm->index; 581 u_int count = cm->count; 582 int i, error; 583 u_char rbuf[256], gbuf[256], bbuf[256]; 584 585 #ifdef GFFB_DEBUG 586 aprint_debug("putcmap: %d %d\n",index, count); 587 #endif 588 if (cm->index >= 256 || cm->count > 256 || 589 (cm->index + cm->count) > 256) 590 return EINVAL; 591 error = copyin(cm->red, &rbuf[index], count); 592 if (error) 593 return error; 594 error = copyin(cm->green, &gbuf[index], count); 595 if (error) 596 return error; 597 error = copyin(cm->blue, &bbuf[index], count); 598 if (error) 599 return error; 600 601 memcpy(&sc->sc_cmap_red[index], &rbuf[index], count); 602 memcpy(&sc->sc_cmap_green[index], &gbuf[index], count); 603 memcpy(&sc->sc_cmap_blue[index], &bbuf[index], count); 604 605 r = &sc->sc_cmap_red[index]; 606 g = &sc->sc_cmap_green[index]; 607 b = &sc->sc_cmap_blue[index]; 608 609 for (i = 0; i < count; i++) { 610 gffb_putpalreg(sc, index, *r, *g, *b); 611 index++; 612 r++, g++, b++; 613 } 614 return 0; 615 } 616 617 static int 618 gffb_getcmap(struct gffb_softc *sc, struct wsdisplay_cmap *cm) 619 { 620 u_int index = cm->index; 621 u_int count = cm->count; 622 int error; 623 624 if (index >= 255 || count > 256 || index + count > 256) 625 return EINVAL; 626 627 error = copyout(&sc->sc_cmap_red[index], cm->red, count); 628 if (error) 629 return error; 630 error = copyout(&sc->sc_cmap_green[index], cm->green, count); 631 if (error) 632 return error; 633 error = copyout(&sc->sc_cmap_blue[index], cm->blue, count); 634 if (error) 635 return error; 636 637 return 0; 638 } 639 640 static void 641 gffb_restore_palette(struct gffb_softc *sc) 642 { 643 int i; 644 645 for (i = 0; i < (1 << sc->sc_depth); i++) { 646 gffb_putpalreg(sc, i, sc->sc_cmap_red[i], 647 sc->sc_cmap_green[i], sc->sc_cmap_blue[i]); 648 } 649 } 650 651 static int 652 gffb_putpalreg(struct gffb_softc *sc, uint8_t idx, uint8_t r, uint8_t g, 653 uint8_t b) 654 { 655 /* port 0 */ 656 bus_space_write_1(sc->sc_memt, sc->sc_regh, 657 GFFB_PDIO0 + GFFB_PEL_IW, idx); 658 bus_space_write_1(sc->sc_memt, sc->sc_regh, 659 GFFB_PDIO0 + GFFB_PEL_D, r); 660 bus_space_write_1(sc->sc_memt, sc->sc_regh, 661 GFFB_PDIO0 + GFFB_PEL_D, g); 662 bus_space_write_1(sc->sc_memt, sc->sc_regh, 663 GFFB_PDIO0 + GFFB_PEL_D, b); 664 665 /* port 1 */ 666 bus_space_write_1(sc->sc_memt, sc->sc_regh, 667 GFFB_PDIO1 + GFFB_PEL_IW, idx); 668 bus_space_write_1(sc->sc_memt, sc->sc_regh, 669 GFFB_PDIO1 + GFFB_PEL_D, r); 670 bus_space_write_1(sc->sc_memt, sc->sc_regh, 671 GFFB_PDIO1 + GFFB_PEL_D, g); 672 bus_space_write_1(sc->sc_memt, sc->sc_regh, 673 GFFB_PDIO1 + GFFB_PEL_D, b); 674 675 return 0; 676 } 677 678 679 static void 680 gffb_dma_kickoff(struct gffb_softc *sc) 681 { 682 683 if (sc->sc_current != sc->sc_put) { 684 sc->sc_put = sc->sc_current; 685 membar_sync(); 686 (void)*sc->sc_fbaddr; 687 GFFB_WRITE_4(GFFB_FIFO_PUT, sc->sc_put); 688 membar_sync(); 689 } 690 } 691 692 static void 693 gffb_dmanext(struct gffb_softc *sc, uint32_t data) 694 { 695 bus_space_write_stream_4(sc->sc_memt, sc->sc_fbh, sc->sc_current, data); 696 sc->sc_current += 4; 697 } 698 699 static void 700 gffb_dmastart(struct gffb_softc *sc, uint32_t tag, int size) 701 { 702 if(sc->sc_free <= (size << 2)) 703 gffb_make_room(sc, size); 704 gffb_dmanext(sc, ((size) << 18) | (tag)); 705 sc->sc_free -= ((size + 1) << 2); 706 } 707 708 /* 709 * from xf86_video_nv/nv_xaa.c: 710 * There is a HW race condition with videoram command buffers. 711 * You can't jump to the location of your put offset. We write put 712 * at the jump offset + SKIPS dwords with noop padding in between 713 * to solve this problem 714 */ 715 716 #define SKIPS 8 717 718 static void 719 gffb_make_room(struct gffb_softc *sc, int size) 720 { 721 uint32_t get; 722 723 size = (size + 1) << 2; /* slots -> offset */ 724 725 while (sc->sc_free < size) { 726 get = GFFB_READ_4(GFFB_FIFO_GET); 727 728 if (sc->sc_put >= get) { 729 sc->sc_free = 0x2000 - sc->sc_current; 730 if (sc->sc_free < size) { 731 gffb_dmanext(sc, 0x20000000); 732 if(get <= (SKIPS << 2)) { 733 if (sc->sc_put <= (SKIPS << 2)) { 734 /* corner case - will be idle */ 735 GFFB_WRITE_4(GFFB_FIFO_PUT, 736 (SKIPS + 1) << 2); 737 } 738 do { 739 get =GFFB_READ_4(GFFB_FIFO_GET); 740 } while (get <= (SKIPS << 2)); 741 } 742 GFFB_WRITE_4(GFFB_FIFO_PUT, SKIPS << 2); 743 sc->sc_current = sc->sc_put = (SKIPS << 2); 744 sc->sc_free = get - ((SKIPS + 1) << 2); 745 } 746 } else 747 sc->sc_free = get - sc->sc_current - 4; 748 } 749 } 750 751 static void 752 gffb_sync(struct gffb_softc *sc) 753 { 754 int bail; 755 int i; 756 757 /* 758 * if there are commands in the buffer make sure the chip is actually 759 * trying to run them 760 */ 761 gffb_dma_kickoff(sc); 762 763 /* now wait for the command buffer to drain... */ 764 bail = 100000000; 765 while ((GFFB_READ_4(GFFB_FIFO_GET) != sc->sc_put) && (bail > 0)) { 766 bail--; 767 } 768 if (bail == 0) goto crap; 769 770 /* ... and for the engine to go idle */ 771 bail = 100000000; 772 while((GFFB_READ_4(GFFB_BUSY) != 0) && (bail > 0)) { 773 bail--; 774 } 775 if (bail == 0) goto crap; 776 return; 777 crap: 778 /* if we time out fill the buffer with NOPs and cross fingers */ 779 sc->sc_put = 0; 780 sc->sc_current = 0; 781 for (i = 0; i < 0x2000; i += 4) 782 bus_space_write_stream_4(sc->sc_memt, sc->sc_fbh, i, 0); 783 aprint_error_dev(sc->sc_dev, "DMA lockup\n"); 784 } 785 786 static void 787 gffb_init(struct gffb_softc *sc) 788 { 789 int i; 790 uint32_t foo; 791 792 if (!sc->sc_accel) return; 793 794 sc->sc_fboffset = 0x2000; 795 796 /* init display start */ 797 GFFB_WRITE_4(GFFB_CRTC0 + GFFB_DISPLAYSTART, sc->sc_fboffset); 798 GFFB_WRITE_4(GFFB_CRTC1 + GFFB_DISPLAYSTART, sc->sc_fboffset); 799 GFFB_WRITE_4(GFFB_PDIO0 + GFFB_PEL_MASK, 0xff); 800 GFFB_WRITE_4(GFFB_PDIO1 + GFFB_PEL_MASK, 0xff); 801 802 /* DMA stuff. A whole lot of magic number voodoo from xf86-video-nv */ 803 GFFB_WRITE_4(GFFB_PMC + 0x140, 0); 804 GFFB_WRITE_4(GFFB_PMC + 0x200, 0xffff00ff); 805 GFFB_WRITE_4(GFFB_PMC + 0x200, 0xffffffff); 806 GFFB_WRITE_4(GFFB_PTIMER + 0x800, 8); 807 GFFB_WRITE_4(GFFB_PTIMER + 0x840, 3); 808 GFFB_WRITE_4(GFFB_PTIMER + 0x500, 0); 809 GFFB_WRITE_4(GFFB_PTIMER + 0x400, 0xffffffff); 810 for (i = 0; i < 8; i++) { 811 GFFB_WRITE_4(GFFB_PMC + 0x240 + (i * 0x10), 0); 812 GFFB_WRITE_4(GFFB_PMC + 0x244 + (i * 0x10), 813 sc->sc_vramsize - 1); 814 } 815 816 for (i = 0; i < 8; i++) { 817 GFFB_WRITE_4(GFFB_PFB + 0x0240 + (i * 0x10), 0); 818 GFFB_WRITE_4(GFFB_PFB + 0x0244 + (i * 0x10), 819 sc->sc_vramsize - 1); 820 } 821 822 GFFB_WRITE_4(GFFB_PRAMIN, 0x80000010); 823 GFFB_WRITE_4(GFFB_PRAMIN + 0x04, 0x80011201); 824 GFFB_WRITE_4(GFFB_PRAMIN + 0x08, 0x80000011); 825 GFFB_WRITE_4(GFFB_PRAMIN + 0x0c, 0x80011202); 826 GFFB_WRITE_4(GFFB_PRAMIN + 0x10, 0x80000012); 827 GFFB_WRITE_4(GFFB_PRAMIN + 0x14, 0x80011203); 828 GFFB_WRITE_4(GFFB_PRAMIN + 0x18, 0x80000013); 829 GFFB_WRITE_4(GFFB_PRAMIN + 0x1c, 0x80011204); 830 GFFB_WRITE_4(GFFB_PRAMIN + 0x20, 0x80000014); 831 GFFB_WRITE_4(GFFB_PRAMIN + 0x24, 0x80011205); 832 GFFB_WRITE_4(GFFB_PRAMIN + 0x28, 0x80000015); 833 GFFB_WRITE_4(GFFB_PRAMIN + 0x2c, 0x80011206); 834 GFFB_WRITE_4(GFFB_PRAMIN + 0x30, 0x80000016); 835 GFFB_WRITE_4(GFFB_PRAMIN + 0x34, 0x80011207); 836 GFFB_WRITE_4(GFFB_PRAMIN + 0x38, 0x80000017); 837 GFFB_WRITE_4(GFFB_PRAMIN + 0x3c, 0x80011208); 838 GFFB_WRITE_4(GFFB_PRAMIN + 0x2000, 0x00003000); 839 GFFB_WRITE_4(GFFB_PRAMIN + 0x2004, sc->sc_vramsize - 1); 840 GFFB_WRITE_4(GFFB_PRAMIN + 0x2008, 0x00000002); 841 GFFB_WRITE_4(GFFB_PRAMIN + 0x200c, 0x00000002); 842 GFFB_WRITE_4(GFFB_PRAMIN + 0x2010, 0x01008042); /* different for nv40 */ 843 GFFB_WRITE_4(GFFB_PRAMIN + 0x2014, 0); 844 GFFB_WRITE_4(GFFB_PRAMIN + 0x2018, 0x12001200); 845 GFFB_WRITE_4(GFFB_PRAMIN + 0x201c, 0); 846 GFFB_WRITE_4(GFFB_PRAMIN + 0x2020, 0x01008043); 847 GFFB_WRITE_4(GFFB_PRAMIN + 0x2024, 0); 848 GFFB_WRITE_4(GFFB_PRAMIN + 0x2028, 0); 849 GFFB_WRITE_4(GFFB_PRAMIN + 0x202c, 0); 850 GFFB_WRITE_4(GFFB_PRAMIN + 0x2030, 0x01008044); 851 GFFB_WRITE_4(GFFB_PRAMIN + 0x2034, 0x00000002); 852 GFFB_WRITE_4(GFFB_PRAMIN + 0x2038, 0); 853 GFFB_WRITE_4(GFFB_PRAMIN + 0x203c, 0); 854 GFFB_WRITE_4(GFFB_PRAMIN + 0x2040, 0x01008019); 855 GFFB_WRITE_4(GFFB_PRAMIN + 0x2044, 0); 856 GFFB_WRITE_4(GFFB_PRAMIN + 0x2048, 0); 857 GFFB_WRITE_4(GFFB_PRAMIN + 0x204c, 0); 858 GFFB_WRITE_4(GFFB_PRAMIN + 0x2050, 0x0100a05c); 859 GFFB_WRITE_4(GFFB_PRAMIN + 0x2054, 0); 860 GFFB_WRITE_4(GFFB_PRAMIN + 0x2058, 0); 861 GFFB_WRITE_4(GFFB_PRAMIN + 0x205c, 0); 862 /* XXX 0x0100805f if !WaitVSynvPossible */ 863 GFFB_WRITE_4(GFFB_PRAMIN + 0x2060, 0x0100809f); 864 GFFB_WRITE_4(GFFB_PRAMIN + 0x2064, 0); 865 GFFB_WRITE_4(GFFB_PRAMIN + 0x2068, 0x12001200); 866 GFFB_WRITE_4(GFFB_PRAMIN + 0x206c, 0); 867 GFFB_WRITE_4(GFFB_PRAMIN + 0x2070, 0x0100804a); 868 GFFB_WRITE_4(GFFB_PRAMIN + 0x2074, 0x00000002); 869 GFFB_WRITE_4(GFFB_PRAMIN + 0x2078, 0); 870 GFFB_WRITE_4(GFFB_PRAMIN + 0x207c, 0); 871 GFFB_WRITE_4(GFFB_PRAMIN + 0x2080, 0x01018077); 872 GFFB_WRITE_4(GFFB_PRAMIN + 0x2084, 0); 873 GFFB_WRITE_4(GFFB_PRAMIN + 0x2088, 0x12001200); 874 GFFB_WRITE_4(GFFB_PRAMIN + 0x208c, 0); 875 GFFB_WRITE_4(GFFB_PRAMIN + 0x2090, 0x00003002); 876 GFFB_WRITE_4(GFFB_PRAMIN + 0x2094, 0x00007fff); 877 /* command buffer start with some flag in the lower bits */ 878 GFFB_WRITE_4(GFFB_PRAMIN + 0x2098, 0x00000002); 879 GFFB_WRITE_4(GFFB_PRAMIN + 0x209c, 0x00000002); 880 #if BYTE_ORDER == BIG_ENDIAN 881 GFFB_WRITE_4(GFFB_PRAMIN + 0x2010, 0x01088042); 882 GFFB_WRITE_4(GFFB_PRAMIN + 0x2020, 0x01088043); 883 GFFB_WRITE_4(GFFB_PRAMIN + 0x2030, 0x01088044); 884 GFFB_WRITE_4(GFFB_PRAMIN + 0x2040, 0x01088019); 885 GFFB_WRITE_4(GFFB_PRAMIN + 0x2050, 0x0108a05c); 886 GFFB_WRITE_4(GFFB_PRAMIN + 0x2060, 0x0108809f); 887 GFFB_WRITE_4(GFFB_PRAMIN + 0x2070, 0x0108804a); 888 GFFB_WRITE_4(GFFB_PRAMIN + 0x2080, 0x01098077); 889 GFFB_WRITE_4(GFFB_PRAMIN + 0x2034, 0x00000001); 890 GFFB_WRITE_4(GFFB_PRAMIN + 0x2074, 0x00000001); 891 #endif 892 893 /* PGRAPH setup */ 894 GFFB_WRITE_4(GFFB_PFIFO + 0x0500, 0); 895 GFFB_WRITE_4(GFFB_PFIFO + 0x0504, 0x00000001); 896 GFFB_WRITE_4(GFFB_PFIFO + 0x1200, 0); 897 GFFB_WRITE_4(GFFB_PFIFO + 0x1250, 0); 898 GFFB_WRITE_4(GFFB_PFIFO + 0x1204, 0x00000100); /* different on nv40 */ 899 GFFB_WRITE_4(GFFB_PFIFO + 0x1240, 0); 900 GFFB_WRITE_4(GFFB_PFIFO + 0x1244, 0); 901 GFFB_WRITE_4(GFFB_PFIFO + 0x122c, 0x00001209); /* different on nv40 */ 902 GFFB_WRITE_4(GFFB_PFIFO + 0x1000, 0); 903 GFFB_WRITE_4(GFFB_PFIFO + 0x1050, 0); 904 GFFB_WRITE_4(GFFB_PFIFO + 0x0210, 0x03000100); 905 GFFB_WRITE_4(GFFB_PFIFO + 0x0214, 0x00000110); 906 GFFB_WRITE_4(GFFB_PFIFO + 0x0218, 0x00000112); 907 GFFB_WRITE_4(GFFB_PFIFO + 0x050c, 0x0000ffff); 908 GFFB_WRITE_4(GFFB_PFIFO + 0x1258, 0x0000ffff); 909 GFFB_WRITE_4(GFFB_PFIFO + 0x0140, 0); 910 GFFB_WRITE_4(GFFB_PFIFO + 0x0100, 0xffffffff); 911 GFFB_WRITE_4(GFFB_PFIFO + 0x1054, 0x00000001); 912 GFFB_WRITE_4(GFFB_PFIFO + 0x1230, 0); 913 GFFB_WRITE_4(GFFB_PFIFO + 0x1280, 0); 914 #if BYTE_ORDER == BIG_ENDIAN 915 GFFB_WRITE_4(GFFB_PFIFO + 0x1224, 0x800f0078); 916 #else 917 GFFB_WRITE_4(GFFB_PFIFO + 0x1224, 0x000f0078); 918 #endif 919 GFFB_WRITE_4(GFFB_PFIFO + 0x1220, 0x00000001); 920 GFFB_WRITE_4(GFFB_PFIFO + 0x1200, 0x00000001); 921 GFFB_WRITE_4(GFFB_PFIFO + 0x1250, 0x00000001); 922 GFFB_WRITE_4(GFFB_PFIFO + 0x1254, 0x00000001); 923 GFFB_WRITE_4(GFFB_PFIFO + 0x0500, 0x00000001); 924 925 GFFB_WRITE_4(GFFB_PGRAPH + 0x0080, 0xFFFFFFFF); 926 GFFB_WRITE_4(GFFB_PGRAPH + 0x0080, 0x00000000); 927 928 GFFB_WRITE_4(GFFB_PGRAPH + 0x0140, 0x00000000); 929 GFFB_WRITE_4(GFFB_PGRAPH + 0x0100, 0xFFFFFFFF); 930 GFFB_WRITE_4(GFFB_PGRAPH + 0x0144, 0x10010100); 931 GFFB_WRITE_4(GFFB_PGRAPH + 0x0714, 0xFFFFFFFF); 932 GFFB_WRITE_4(GFFB_PGRAPH + 0x0720, 0x00000001); 933 /* 934 * xf86_video_nv does this in two writes, 935 * not sure if they can be combined 936 */ 937 foo = GFFB_READ_4(GFFB_PGRAPH + 0x0710); 938 GFFB_WRITE_4(GFFB_PGRAPH + 0x0710, foo & 0x0007ff00); 939 foo = GFFB_READ_4(GFFB_PGRAPH + 0x0710); 940 GFFB_WRITE_4(GFFB_PGRAPH + 0x0710, foo | 0x00020100); 941 942 /* NV_ARCH_10 */ 943 GFFB_WRITE_4(GFFB_PGRAPH + 0x0084, 0x00118700); 944 GFFB_WRITE_4(GFFB_PGRAPH + 0x0088, 0x24E00810); 945 GFFB_WRITE_4(GFFB_PGRAPH + 0x008C, 0x55DE0030); 946 947 for(i = 0; i < 128; i += 4) { 948 GFFB_WRITE_4(GFFB_PGRAPH + 0x0B00 + i, 949 GFFB_READ_4(GFFB_PFB + 0x0240 + i)); 950 } 951 952 GFFB_WRITE_4(GFFB_PGRAPH + 0x640, 0); 953 GFFB_WRITE_4(GFFB_PGRAPH + 0x644, 0); 954 GFFB_WRITE_4(GFFB_PGRAPH + 0x684, sc->sc_vramsize - 1); 955 GFFB_WRITE_4(GFFB_PGRAPH + 0x688, sc->sc_vramsize - 1); 956 957 GFFB_WRITE_4(GFFB_PGRAPH + 0x0810, 0x00000000); 958 GFFB_WRITE_4(GFFB_PGRAPH + 0x0608, 0xFFFFFFFF); 959 960 GFFB_WRITE_4(GFFB_PGRAPH + 0x053C, 0); 961 GFFB_WRITE_4(GFFB_PGRAPH + 0x0540, 0); 962 GFFB_WRITE_4(GFFB_PGRAPH + 0x0544, 0x00007FFF); 963 GFFB_WRITE_4(GFFB_PGRAPH + 0x0548, 0x00007FFF); 964 965 GFFB_WRITE_4(GFFB_CMDSTART, 0x00000002); 966 GFFB_WRITE_4(GFFB_FIFO_GET, 0); 967 sc->sc_put = 0; 968 sc->sc_current = 0; 969 sc->sc_free = 0x2000; 970 971 for(i = 0; i < SKIPS; i++) 972 gffb_dmanext(sc, 0); 973 974 gffb_dmanext(sc, 0x00040000); 975 gffb_dmanext(sc, 0x80000010); 976 gffb_dmanext(sc, 0x00042000); 977 gffb_dmanext(sc, 0x80000011); 978 gffb_dmanext(sc, 0x00044000); 979 gffb_dmanext(sc, 0x80000012); 980 gffb_dmanext(sc, 0x00046000); 981 gffb_dmanext(sc, 0x80000013); 982 gffb_dmanext(sc, 0x00048000); 983 gffb_dmanext(sc, 0x80000014); 984 gffb_dmanext(sc, 0x0004A000); 985 gffb_dmanext(sc, 0x80000015); 986 gffb_dmanext(sc, 0x0004C000); 987 gffb_dmanext(sc, 0x80000016); 988 gffb_dmanext(sc, 0x0004E000); 989 gffb_dmanext(sc, 0x80000017); 990 sc->sc_free = 0x2000 - sc->sc_current; 991 992 gffb_dmastart(sc, SURFACE_FORMAT, 4); 993 gffb_dmanext(sc, SURFACE_FORMAT_DEPTH8); 994 gffb_dmanext(sc, sc->sc_stride | (sc->sc_stride << 16)); 995 gffb_dmanext(sc, 0x2000); /* src offset */ 996 gffb_dmanext(sc, 0x2000); /* dst offset */ 997 998 gffb_dmastart(sc, RECT_FORMAT, 1); 999 gffb_dmanext(sc, RECT_FORMAT_DEPTH8); 1000 1001 gffb_dmastart(sc, PATTERN_FORMAT, 1); 1002 gffb_dmanext(sc, PATTERN_FORMAT_DEPTH8); 1003 1004 gffb_dmastart(sc, PATTERN_COLOR_0, 4); 1005 gffb_dmanext(sc, 0xffffffff); 1006 gffb_dmanext(sc, 0xffffffff); 1007 gffb_dmanext(sc, 0xffffffff); 1008 gffb_dmanext(sc, 0xffffffff); 1009 1010 gffb_dmastart(sc, ROP_SET, 1); 1011 gffb_dmanext(sc, 0xcc); 1012 sc->sc_rop = 0xcc; 1013 1014 gffb_dma_kickoff(sc); 1015 gffb_sync(sc); 1016 DPRINTF("put %x current %x\n", sc->sc_put, sc->sc_current); 1017 1018 } 1019 1020 static void 1021 gffb_rop(struct gffb_softc *sc, int rop) 1022 { 1023 if (rop == sc->sc_rop) 1024 return; 1025 sc->sc_rop = rop; 1026 gffb_dmastart(sc, ROP_SET, 1); 1027 gffb_dmanext(sc, rop); 1028 } 1029 1030 static void 1031 gffb_rectfill(struct gffb_softc *sc, int x, int y, int wi, int he, 1032 uint32_t colour) 1033 { 1034 if (!sc->sc_accel) return; 1035 mutex_enter(&sc->sc_lock); 1036 gffb_rop(sc, 0xcc); 1037 1038 gffb_dmastart(sc, RECT_SOLID_COLOR, 1); 1039 gffb_dmanext(sc, colour); 1040 1041 gffb_dmastart(sc, RECT_SOLID_RECTS(0), 2); 1042 gffb_dmanext(sc, (x << 16) | y); 1043 gffb_dmanext(sc, (wi << 16) | he); 1044 gffb_dma_kickoff(sc); 1045 mutex_exit(&sc->sc_lock); 1046 } 1047 1048 static void 1049 gffb_bitblt(void *cookie, int xs, int ys, int xd, int yd, 1050 int wi, int he, int rop) 1051 { 1052 struct gffb_softc *sc = cookie; 1053 1054 if (!sc->sc_accel) return; 1055 mutex_enter(&sc->sc_lock); 1056 1057 gffb_rop(sc, rop); 1058 1059 gffb_dmastart(sc, BLIT_POINT_SRC, 3); 1060 gffb_dmanext(sc, (ys << 16) | xs); 1061 gffb_dmanext(sc, (yd << 16) | xd); 1062 gffb_dmanext(sc, (he << 16) | wi); 1063 gffb_dma_kickoff(sc); 1064 mutex_exit(&sc->sc_lock); 1065 } 1066 1067 static void 1068 gffb_cursor(void *cookie, int on, int row, int col) 1069 { 1070 struct rasops_info *ri = cookie; 1071 struct vcons_screen *scr = ri->ri_hw; 1072 struct gffb_softc *sc = scr->scr_cookie; 1073 int x, y, wi, he; 1074 1075 wi = ri->ri_font->fontwidth; 1076 he = ri->ri_font->fontheight; 1077 1078 if (sc->sc_mode == WSDISPLAYIO_MODE_EMUL) { 1079 x = ri->ri_ccol * wi + ri->ri_xorigin; 1080 y = ri->ri_crow * he + ri->ri_yorigin; 1081 if (ri->ri_flg & RI_CURSOR) { 1082 gffb_bitblt(sc, x, y, x, y, wi, he, 0x33); 1083 ri->ri_flg &= ~RI_CURSOR; 1084 } 1085 ri->ri_crow = row; 1086 ri->ri_ccol = col; 1087 if (on) { 1088 x = ri->ri_ccol * wi + ri->ri_xorigin; 1089 y = ri->ri_crow * he + ri->ri_yorigin; 1090 gffb_bitblt(sc, x, y, x, y, wi, he, 0x33); 1091 ri->ri_flg |= RI_CURSOR; 1092 } 1093 } else { 1094 scr->scr_ri.ri_crow = row; 1095 scr->scr_ri.ri_ccol = col; 1096 scr->scr_ri.ri_flg &= ~RI_CURSOR; 1097 } 1098 1099 } 1100 1101 static void 1102 gffb_putchar(void *cookie, int row, int col, u_int c, long attr) 1103 { 1104 struct rasops_info *ri = cookie; 1105 struct wsdisplay_font *font = PICK_FONT(ri, c); 1106 struct vcons_screen *scr = ri->ri_hw; 1107 struct gffb_softc *sc = scr->scr_cookie; 1108 int x, y, wi, he, rv = GC_NOPE; 1109 uint32_t bg; 1110 1111 if (sc->sc_mode != WSDISPLAYIO_MODE_EMUL) 1112 return; 1113 1114 if (!CHAR_IN_FONT(c, font)) 1115 return; 1116 1117 wi = font->fontwidth; 1118 he = font->fontheight; 1119 1120 x = ri->ri_xorigin + col * wi; 1121 y = ri->ri_yorigin + row * he; 1122 bg = ri->ri_devcmap[(attr >> 16) & 0xf]; 1123 1124 if (c == 0x20) { 1125 gffb_rectfill(sc, x, y, wi, he, bg); 1126 return; 1127 } 1128 rv = glyphcache_try(&sc->sc_gc, c, x, y, attr); 1129 if (rv == GC_OK) 1130 return; 1131 1132 mutex_enter(&sc->sc_lock); 1133 gffb_sync(sc); 1134 sc->sc_putchar(cookie, row, col, c, attr); 1135 membar_sync(); 1136 mutex_exit(&sc->sc_lock); 1137 1138 if (rv == GC_ADD) { 1139 glyphcache_add(&sc->sc_gc, c, x, y); 1140 } 1141 } 1142 1143 static void 1144 gffb_copycols(void *cookie, int row, int srccol, int dstcol, int ncols) 1145 { 1146 struct rasops_info *ri = cookie; 1147 struct vcons_screen *scr = ri->ri_hw; 1148 struct gffb_softc *sc = scr->scr_cookie; 1149 int32_t xs, xd, y, width, height; 1150 1151 if ((sc->sc_locked == 0) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1152 xs = ri->ri_xorigin + ri->ri_font->fontwidth * srccol; 1153 xd = ri->ri_xorigin + ri->ri_font->fontwidth * dstcol; 1154 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1155 width = ri->ri_font->fontwidth * ncols; 1156 height = ri->ri_font->fontheight; 1157 gffb_bitblt(sc, xs, y, xd, y, width, height, 0xcc); 1158 } 1159 } 1160 1161 static void 1162 gffb_erasecols(void *cookie, int row, int startcol, int ncols, long fillattr) 1163 { 1164 struct rasops_info *ri = cookie; 1165 struct vcons_screen *scr = ri->ri_hw; 1166 struct gffb_softc *sc = scr->scr_cookie; 1167 int32_t x, y, width, height, fg, bg, ul; 1168 1169 if ((sc->sc_locked == 0) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1170 x = ri->ri_xorigin + ri->ri_font->fontwidth * startcol; 1171 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1172 width = ri->ri_font->fontwidth * ncols; 1173 height = ri->ri_font->fontheight; 1174 rasops_unpack_attr(fillattr, &fg, &bg, &ul); 1175 1176 gffb_rectfill(sc, x, y, width, height, ri->ri_devcmap[bg]); 1177 } 1178 } 1179 1180 static void 1181 gffb_copyrows(void *cookie, int srcrow, int dstrow, int nrows) 1182 { 1183 struct rasops_info *ri = cookie; 1184 struct vcons_screen *scr = ri->ri_hw; 1185 struct gffb_softc *sc = scr->scr_cookie; 1186 int32_t x, ys, yd, width, height; 1187 1188 if ((sc->sc_locked == 0) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1189 x = ri->ri_xorigin; 1190 ys = ri->ri_yorigin + ri->ri_font->fontheight * srcrow; 1191 yd = ri->ri_yorigin + ri->ri_font->fontheight * dstrow; 1192 width = ri->ri_emuwidth; 1193 height = ri->ri_font->fontheight * nrows; 1194 gffb_bitblt(sc, x, ys, x, yd, width, height, 0xcc); 1195 } 1196 } 1197 1198 static void 1199 gffb_eraserows(void *cookie, int row, int nrows, long fillattr) 1200 { 1201 struct rasops_info *ri = cookie; 1202 struct vcons_screen *scr = ri->ri_hw; 1203 struct gffb_softc *sc = scr->scr_cookie; 1204 int32_t x, y, width, height, fg, bg, ul; 1205 1206 if ((sc->sc_locked == 0) && (sc->sc_mode == WSDISPLAYIO_MODE_EMUL)) { 1207 x = ri->ri_xorigin; 1208 y = ri->ri_yorigin + ri->ri_font->fontheight * row; 1209 width = ri->ri_emuwidth; 1210 height = ri->ri_font->fontheight * nrows; 1211 rasops_unpack_attr(fillattr, &fg, &bg, &ul); 1212 1213 gffb_rectfill(sc, x, y, width, height, ri->ri_devcmap[bg]); 1214 } 1215 } 1216