xref: /netbsd-src/sys/dev/pci/geodeide.c (revision 23c8222edbfb0f0932d88a8351d3a0cf817dfb9e)
1 /*	$NetBSD: geodeide.c,v 1.7 2004/08/21 00:28:34 thorpej Exp $	*/
2 
3 /*
4  * Copyright (c) 2004 Manuel Bouyer.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  * 3. All advertising materials mentioning features or use of this software
15  *    must display the following acknowledgement:
16  *	This product includes software developed by Manuel Bouyer.
17  * 4. The name of the author may not be used to endorse or promote products
18  *    derived from this software without specific prior written permission.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
21  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
26  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
27  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30  *
31  */
32 
33 /*
34  * Driver for the IDE part of the AMD Geode CS5530A companion chip
35  * and AMD Geode SC1100.
36  * Docs available from AMD's web site
37  */
38 
39 #include <sys/cdefs.h>
40 __KERNEL_RCSID(0, "$NetBSD: geodeide.c,v 1.7 2004/08/21 00:28:34 thorpej Exp $");
41 
42 #include <sys/param.h>
43 #include <sys/systm.h>
44 
45 #include <uvm/uvm_extern.h>
46 
47 #include <dev/pci/pcivar.h>
48 #include <dev/pci/pcidevs.h>
49 #include <dev/pci/pciidereg.h>
50 #include <dev/pci/pciidevar.h>
51 
52 #include <dev/pci/pciide_geode_reg.h>
53 
54 static void geodeide_chip_map(struct pciide_softc *,
55 				 struct pci_attach_args *);
56 static void geodeide_setup_channel(struct ata_channel *);
57 
58 static int  geodeide_match(struct device *, struct cfdata *, void *);
59 static void geodeide_attach(struct device *, struct device *, void *);
60 
61 CFATTACH_DECL(geodeide, sizeof(struct pciide_softc),
62     geodeide_match, geodeide_attach, NULL, NULL);
63 
64 static const struct pciide_product_desc pciide_geode_products[] = {
65 	{ PCI_PRODUCT_CYRIX_CX5530_IDE,
66 	  0,
67 	  "AMD Geode CX5530 IDE controller",
68 	  geodeide_chip_map,
69 	},
70 	{ PCI_PRODUCT_NS_SC1100_IDE,
71 	  0,
72 	  "AMD Geode SC1100 IDE controller",
73 	  geodeide_chip_map,
74 	},
75 	{ 0,
76 	  0,
77 	  NULL,
78 	  NULL,
79 	},
80 };
81 
82 static int
83 geodeide_match(struct device *parent, struct cfdata *match, void *aux)
84 {
85 	struct pci_attach_args *pa = aux;
86 
87 	if ((PCI_VENDOR(pa->pa_id) == PCI_VENDOR_CYRIX ||
88 	     PCI_VENDOR(pa->pa_id) == PCI_VENDOR_NS) &&
89 	     PCI_CLASS(pa->pa_class) == PCI_CLASS_MASS_STORAGE &&
90 	     PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_MASS_STORAGE_IDE &&
91 	     pciide_lookup_product(pa->pa_id, pciide_geode_products))
92 		return(2);
93 	return (0);
94 }
95 
96 static void
97 geodeide_attach(struct device *parent, struct device *self, void *aux)
98 {
99 	struct pci_attach_args *pa = aux;
100 	struct pciide_softc *sc = (void *)self;
101 
102 	pciide_common_attach(sc, pa,
103 	    pciide_lookup_product(pa->pa_id, pciide_geode_products));
104 }
105 
106 static void
107 geodeide_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa)
108 {
109 	struct pciide_channel *cp;
110 	int channel;
111 	bus_size_t cmdsize, ctlsize;
112 
113 	if (pciide_chipen(sc, pa) == 0)
114 		return;
115 
116 	aprint_normal("%s: bus-master DMA support present",
117 	    sc->sc_wdcdev.sc_atac.atac_dev.dv_xname);
118 	pciide_mapreg_dma(sc, pa);
119 	aprint_normal("\n");
120 	if (sc->sc_dma_ok) {
121 		sc->sc_wdcdev.sc_atac.atac_cap = ATAC_CAP_DMA | ATAC_CAP_UDMA;
122 		sc->sc_wdcdev.irqack = pciide_irqack;
123 	}
124 	sc->sc_wdcdev.sc_atac.atac_pio_cap = 4;
125 	sc->sc_wdcdev.sc_atac.atac_dma_cap = 2;
126 	sc->sc_wdcdev.sc_atac.atac_udma_cap = 2;
127 	sc->sc_wdcdev.sc_atac.atac_set_modes = geodeide_setup_channel;
128 	sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanarray;
129 	sc->sc_wdcdev.sc_atac.atac_nchannels = PCIIDE_NUM_CHANNELS;
130 	sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16 | ATAC_CAP_DATA32;
131 
132 	/*
133 	 * Soekris Engineering Issue #0003:
134 	 * 	"The SC1100 built in busmaster IDE controller is pretty
135 	 *	 standard, but have two bugs: data transfers need to be
136 	 *	 dword aligned and it cannot do an exact 64Kbyte data
137 	 *	 transfer."
138 	 */
139 	if (sc->sc_pp->ide_product == PCI_PRODUCT_NS_SC1100_IDE) {
140 		if (sc->sc_dma_boundary == 0x10000)
141 			sc->sc_dma_boundary -= PAGE_SIZE;
142 
143 		if (sc->sc_dma_maxsegsz == 0x10000)
144 			sc->sc_dma_maxsegsz -= PAGE_SIZE;
145 	}
146 
147 	wdc_allocate_regs(&sc->sc_wdcdev);
148 
149 	for (channel = 0; channel < sc->sc_wdcdev.sc_atac.atac_nchannels;
150 	     channel++) {
151 		cp = &sc->pciide_channels[channel];
152 		/* controller is compat-only */
153 		if (pciide_chansetup(sc, channel, 0) == 0)
154 			continue;
155 		pciide_mapchan(pa, cp, 0, &cmdsize, &ctlsize, pciide_pci_intr);
156 	}
157 }
158 
159 static void
160 geodeide_setup_channel(struct ata_channel *chp)
161 {
162 	struct ata_drive_datas *drvp;
163 	struct pciide_channel *cp = CHAN_TO_PCHAN(chp);
164 	struct pciide_softc *sc = CHAN_TO_PCIIDE(chp);
165 	int channel = chp->ch_channel;
166 	int drive, s;
167 	u_int32_t dma_timing;
168 	u_int8_t idedma_ctl;
169 	const int32_t *geode_pio;
170 	const int32_t *geode_dma;
171 	const int32_t *geode_udma;
172 	bus_size_t dmaoff, piooff;
173 
174 	switch (sc->sc_pp->ide_product) {
175 	case PCI_PRODUCT_CYRIX_CX5530_IDE:
176 		geode_pio = geode_cs5530_pio;
177 		geode_dma = geode_cs5530_dma;
178 		geode_udma = geode_cs5530_udma;
179 		break;
180 
181 	case PCI_PRODUCT_NS_SC1100_IDE:
182 	default: /* XXX gcc */
183 		geode_pio = geode_sc1100_pio;
184 		geode_dma = geode_sc1100_dma;
185 		geode_udma = geode_sc1100_udma;
186 		break;
187 	}
188 
189 	/* setup DMA if needed */
190 	pciide_channel_dma_setup(cp);
191 
192 	idedma_ctl = 0;
193 
194 	/* Per drive settings */
195 	for (drive = 0; drive < 2; drive++) {
196 		drvp = &chp->ch_drive[drive];
197 		/* If no drive, skip */
198 		if ((drvp->drive_flags & DRIVE) == 0)
199 			continue;
200 
201 		switch (sc->sc_pp->ide_product) {
202 		case PCI_PRODUCT_CYRIX_CX5530_IDE:
203 			dmaoff = CS5530_DMA_REG(channel, drive);
204 			piooff = CS5530_PIO_REG(channel, drive);
205 			dma_timing = CS5530_DMA_REG_PIO_FORMAT;
206 			break;
207 
208 		case PCI_PRODUCT_NS_SC1100_IDE:
209 		default: /* XXX gcc */
210 			dmaoff = SC1100_DMA_REG(channel, drive);
211 			piooff = SC1100_PIO_REG(channel, drive);
212 			dma_timing = 0;
213 			break;
214 		}
215 
216 		/* add timing values, setup DMA if needed */
217 		if (drvp->drive_flags & DRIVE_UDMA) {
218 			/* Use Ultra-DMA */
219 			dma_timing |= geode_udma[drvp->UDMA_mode];
220 			idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
221 		} else if (drvp->drive_flags & DRIVE_DMA) {
222 			/* use Multiword DMA */
223 			dma_timing |= geode_dma[drvp->DMA_mode];
224 			idedma_ctl |= IDEDMA_CTL_DRV_DMA(drive);
225 		} else {
226 			/* PIO only */
227 			s = splbio();
228 			drvp->drive_flags &= ~(DRIVE_UDMA | DRIVE_DMA);
229 			splx(s);
230 		}
231 
232 		switch (sc->sc_pp->ide_product) {
233 		case PCI_PRODUCT_CYRIX_CX5530_IDE:
234 			bus_space_write_4(sc->sc_dma_iot, sc->sc_dma_ioh,
235 			    dmaoff, dma_timing);
236 			bus_space_write_4(sc->sc_dma_iot, sc->sc_dma_ioh,
237 			    piooff, geode_pio[drvp->PIO_mode]);
238 			break;
239 
240 		case PCI_PRODUCT_NS_SC1100_IDE:
241 			pci_conf_write(sc->sc_pc, sc->sc_tag, dmaoff,
242 			    dma_timing);
243 			pci_conf_write(sc->sc_pc, sc->sc_tag, piooff,
244 			    geode_pio[drvp->PIO_mode]);
245 			break;
246 		}
247 	}
248 
249 	if (idedma_ctl != 0) {
250 		/* Add software bits in status register */
251 		bus_space_write_1(sc->sc_dma_iot, cp->dma_iohs[IDEDMA_CTL], 0,
252 		    idedma_ctl);
253 	}
254 }
255