xref: /netbsd-src/sys/dev/pci/genfb_pci.c (revision da9817918ec7e88db2912a2882967c7570a83f47)
1 /*	$NetBSD: genfb_pci.c,v 1.20 2009/05/12 08:23:00 cegger Exp $ */
2 
3 /*-
4  * Copyright (c) 2007 Michael Lorenz
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
17  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
20  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26  * POSSIBILITY OF SUCH DAMAGE.
27  */
28 
29 #include <sys/cdefs.h>
30 __KERNEL_RCSID(0, "$NetBSD: genfb_pci.c,v 1.20 2009/05/12 08:23:00 cegger Exp $");
31 
32 #include <sys/param.h>
33 #include <sys/systm.h>
34 #include <sys/kernel.h>
35 #include <sys/device.h>
36 #include <sys/proc.h>
37 #include <sys/mutex.h>
38 #include <sys/ioctl.h>
39 #include <sys/kernel.h>
40 #include <sys/systm.h>
41 #include <sys/kauth.h>
42 
43 #include <dev/pci/pcidevs.h>
44 #include <dev/pci/pcireg.h>
45 #include <dev/pci/pcivar.h>
46 #include <dev/pci/pciio.h>
47 
48 #include <dev/wsfb/genfbvar.h>
49 
50 #include "opt_wsfb.h"
51 #include "opt_genfb.h"
52 
53 #ifdef GENFB_PCI_DEBUG
54 # define DPRINTF printf
55 #else
56 # define DPRINTF while (0) printf
57 #endif
58 
59 struct range {
60 	bus_addr_t offset;
61 	bus_size_t size;
62 	int flags;
63 };
64 
65 struct pci_genfb_softc {
66 	struct genfb_softc sc_gen;
67 
68 	pci_chipset_tag_t sc_pc;
69 	pcitag_t sc_pcitag;
70 	bus_space_tag_t sc_memt;
71 	bus_space_tag_t sc_iot;
72 	bus_space_handle_t sc_memh;
73 	pcireg_t sc_bars[9];
74 	struct range sc_ranges[8];
75 	int sc_ranges_used;
76 	int sc_want_wsfb;
77 };
78 
79 static int	pci_genfb_match(device_t, cfdata_t, void *);
80 static void	pci_genfb_attach(device_t, device_t, void *);
81 static int	pci_genfb_ioctl(void *, void *, u_long, void *, int,
82 		    struct lwp *);
83 static paddr_t	pci_genfb_mmap(void *, void *, off_t, int);
84 static int	pci_genfb_borrow(void *, bus_addr_t, bus_space_handle_t *);
85 static int	pci_genfb_drm_print(void *, const char *);
86 
87 CFATTACH_DECL(genfb_pci, sizeof(struct pci_genfb_softc),
88     pci_genfb_match, pci_genfb_attach, NULL, NULL);
89 
90 static int
91 pci_genfb_match(device_t parent, cfdata_t match, void *aux)
92 {
93 	struct pci_attach_args *pa = aux;
94 	int matchlvl = 1;
95 
96 	if (!genfb_is_enabled())
97 		return 0;	/* explicitly disabled by MD code */
98 
99 	if (genfb_is_console())
100 		matchlvl = 5;	/* beat VGA */
101 
102 	if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_APPLE &&
103 	    PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_CONTROL)
104 		return matchlvl;
105 
106 	if (PCI_CLASS(pa->pa_class) == PCI_CLASS_DISPLAY)
107 		return matchlvl;
108 
109 	return 0;
110 }
111 
112 static void
113 pci_genfb_attach(device_t parent, device_t self, void *aux)
114 {
115 	struct pci_genfb_softc *sc = device_private(self);
116 	struct pci_attach_args *pa = aux;
117 	struct genfb_ops ops;
118 	int idx, bar, type;
119 	char devinfo[256];
120 
121 	pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo));
122 	aprint_naive("\n");
123 	aprint_normal(": %s\n", devinfo);
124 
125 	sc->sc_memt = pa->pa_memt;
126 	sc->sc_iot = pa->pa_iot;
127 	sc->sc_pc = pa->pa_pc;
128 	sc->sc_pcitag = pa->pa_tag;
129 	sc->sc_want_wsfb = 0;
130 
131 	genfb_init(&sc->sc_gen);
132 
133 	if ((sc->sc_gen.sc_width == 0) || (sc->sc_gen.sc_fbsize == 0)) {
134 		aprint_debug_dev(self, "not configured by firmware\n");
135 		return;
136 	}
137 
138 	if (bus_space_map(sc->sc_memt, sc->sc_gen.sc_fboffset,
139 	    sc->sc_gen.sc_fbsize, BUS_SPACE_MAP_LINEAR, &sc->sc_memh) != 0) {
140 
141 		aprint_error_dev(self, "unable to map the framebuffer\n");
142 		return;
143 	}
144 	sc->sc_gen.sc_fbaddr = bus_space_vaddr(sc->sc_memt, sc->sc_memh);
145 
146 	/* mmap()able bus ranges */
147 	idx = 0;
148 	bar = 0x10;
149 	while (bar < 0x30) {
150 
151 		type = pci_mapreg_type(sc->sc_pc, sc->sc_pcitag, bar);
152 		if ((type == PCI_MAPREG_TYPE_MEM) ||
153 		    (type == PCI_MAPREG_TYPE_ROM)) {
154 
155 			pci_mapreg_info(sc->sc_pc, sc->sc_pcitag, bar, type,
156 			    &sc->sc_ranges[idx].offset,
157 			    &sc->sc_ranges[idx].size,
158 			    &sc->sc_ranges[idx].flags);
159 			idx++;
160 		}
161 		sc->sc_bars[(bar - 0x10) >> 2] =
162 		    pci_conf_read(sc->sc_pc, sc->sc_pcitag, bar);
163 		bar += 4;
164 	}
165 	sc->sc_ranges_used = idx;
166 
167 	ops.genfb_ioctl = pci_genfb_ioctl;
168 	ops.genfb_mmap = pci_genfb_mmap;
169 	ops.genfb_borrow = pci_genfb_borrow;
170 
171 	if (genfb_attach(&sc->sc_gen, &ops) == 0) {
172 
173 		/* now try to attach a DRM */
174 		config_found_ia(self, "drm", aux, pci_genfb_drm_print);
175 	}
176 }
177 
178 static int
179 pci_genfb_drm_print(void *aux, const char *pnp)
180 {
181 	if (pnp)
182 		aprint_normal("drm at %s", pnp);
183 	return (UNCONF);
184 }
185 
186 
187 static int
188 pci_genfb_ioctl(void *v, void *vs, u_long cmd, void *data, int flag,
189     struct lwp *l)
190 {
191 	struct pci_genfb_softc *sc = v;
192 
193 	switch (cmd) {
194 		case WSDISPLAYIO_GTYPE:
195 			*(u_int *)data = WSDISPLAY_TYPE_PCIMISC;
196 			return 0;
197 
198 		/* PCI config read/write passthrough. */
199 		case PCI_IOC_CFGREAD:
200 		case PCI_IOC_CFGWRITE:
201 			return (pci_devioctl(sc->sc_pc, sc->sc_pcitag,
202 			    cmd, data, flag, l));
203 		case WSDISPLAYIO_SMODE:
204 			{
205 				int new_mode = *(int*)data, i;
206 				if (new_mode == WSDISPLAYIO_MODE_EMUL) {
207 					for (i = 0; i < 9; i++)
208 						pci_conf_write(sc->sc_pc,
209 						     sc->sc_pcitag,
210 						     0x10 + (i << 2),
211 						     sc->sc_bars[i]);
212 				}
213 			}
214 			return 0;
215 	}
216 
217 	return EPASSTHROUGH;
218 }
219 
220 static paddr_t
221 pci_genfb_mmap(void *v, void *vs, off_t offset, int prot)
222 {
223 	struct pci_genfb_softc *sc = v;
224 	struct range *r;
225 	int i;
226 
227 	if (offset == 0)
228 		sc->sc_want_wsfb = 1;
229 
230 	/*
231 	 * regular fb mapping at 0
232 	 * since some Sun firmware likes to put PCI resources low enough
233 	 * to collide with the wsfb mapping we only allow it after asking
234 	 * for offset 0
235 	 */
236 	DPRINTF("%s: %08x limit %08x\n", __func__, (uint32_t)offset,
237 	    (uint32_t)sc->sc_gen.sc_fbsize);
238 	if ((offset >= 0) && (offset < sc->sc_gen.sc_fbsize) &&
239 	    (sc->sc_want_wsfb == 1)) {
240 
241 		return bus_space_mmap(sc->sc_memt, sc->sc_gen.sc_fboffset,
242 		   offset, prot, BUS_SPACE_MAP_LINEAR);
243 	}
244 
245 	/*
246 	 * restrict all other mappings to processes with superuser privileges
247 	 * or the kernel itself
248 	 */
249 	if (kauth_authorize_generic(kauth_cred_get(), KAUTH_GENERIC_ISSUSER,
250 	    NULL) != 0) {
251 		aprint_normal_dev(&sc->sc_gen.sc_dev, "mmap() rejected.\n");
252 		return -1;
253 	}
254 
255 #ifdef WSFB_FAKE_VGA_FB
256 	if ((offset >= 0xa0000) && (offset < 0xbffff)) {
257 
258 		return bus_space_mmap(sc->sc_memt, sc->sc_gen.sc_fboffset,
259 		   offset - 0xa0000, prot, BUS_SPACE_MAP_LINEAR);
260 	}
261 #endif
262 
263 	/*
264 	 * XXX this should be generalized, let's just
265 	 * #define PCI_IOAREA_PADDR
266 	 * #define PCI_IOAREA_OFFSET
267 	 * #define PCI_IOAREA_SIZE
268 	 * somewhere in a MD header and compile this code only if all are
269 	 * present
270 	 */
271 #ifdef PCI_MAGIC_IO_RANGE
272 	/* allow to map our IO space */
273 	if ((offset >= PCI_MAGIC_IO_RANGE) &&
274 	    (offset < PCI_MAGIC_IO_RANGE + 0x10000)) {
275 		return bus_space_mmap(sc->sc_iot, offset - PCI_MAGIC_IO_RANGE,
276 		    0, prot, BUS_SPACE_MAP_LINEAR);
277 	}
278 #endif
279 
280 	/* allow to mmap() our BARs */
281 	/* maybe the ROM BAR too? */
282 	for (i = 0; i < sc->sc_ranges_used; i++) {
283 
284 		r = &sc->sc_ranges[i];
285 		if ((offset >= r->offset) && (offset < (r->offset + r->size))) {
286 			return bus_space_mmap(sc->sc_memt, offset, 0, prot,
287 			    r->flags);
288 		}
289 	}
290 
291 	return -1;
292 }
293 
294 int
295 pci_genfb_borrow(void *opaque, bus_addr_t addr, bus_space_handle_t *hdlp)
296 {
297 	struct pci_genfb_softc *sc = opaque;
298 
299 	if (sc == NULL)
300 		return 0;
301 	if (!sc->sc_gen.sc_fboffset)
302 		return 0;
303 	if (sc->sc_gen.sc_fboffset != addr)
304 		return 0;
305 	*hdlp = sc->sc_memh;
306 	return 1;
307 }
308