1 /* $NetBSD: genfb_pci.c,v 1.26 2010/12/16 06:45:50 cegger Exp $ */ 2 3 /*- 4 * Copyright (c) 2007 Michael Lorenz 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: genfb_pci.c,v 1.26 2010/12/16 06:45:50 cegger Exp $"); 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/kernel.h> 35 #include <sys/device.h> 36 #include <sys/proc.h> 37 #include <sys/mutex.h> 38 #include <sys/ioctl.h> 39 #include <sys/kernel.h> 40 #include <sys/systm.h> 41 #include <sys/kauth.h> 42 43 #include <dev/pci/pcidevs.h> 44 #include <dev/pci/pcireg.h> 45 #include <dev/pci/pcivar.h> 46 #include <dev/pci/pciio.h> 47 48 #include <dev/wsfb/genfbvar.h> 49 50 #include <dev/pci/genfb_pcivar.h> 51 52 #include "opt_wsfb.h" 53 #include "opt_genfb.h" 54 55 #ifdef GENFB_PCI_DEBUG 56 # define DPRINTF printf 57 #else 58 # define DPRINTF while (0) printf 59 #endif 60 61 static int pci_genfb_match(device_t, cfdata_t, void *); 62 static void pci_genfb_attach(device_t, device_t, void *); 63 static int pci_genfb_ioctl(void *, void *, u_long, void *, int, 64 struct lwp *); 65 static paddr_t pci_genfb_mmap(void *, void *, off_t, int); 66 static int pci_genfb_borrow(void *, bus_addr_t, bus_space_handle_t *); 67 static int pci_genfb_drm_print(void *, const char *); 68 69 CFATTACH_DECL_NEW(genfb_pci, sizeof(struct pci_genfb_softc), 70 pci_genfb_match, pci_genfb_attach, NULL, NULL); 71 72 static int 73 pci_genfb_match(device_t parent, cfdata_t match, void *aux) 74 { 75 struct pci_attach_args *pa = aux; 76 int matchlvl = 1; 77 78 if (!genfb_is_enabled()) 79 return 0; /* explicitly disabled by MD code */ 80 81 if (genfb_is_console()) 82 matchlvl = 5; /* beat VGA */ 83 84 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_APPLE && 85 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_APPLE_CONTROL) 86 return matchlvl; 87 88 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_DISPLAY) 89 return matchlvl; 90 91 return 0; 92 } 93 94 static void 95 pci_genfb_attach(device_t parent, device_t self, void *aux) 96 { 97 struct pci_genfb_softc *sc = device_private(self); 98 struct pci_attach_args *pa = aux; 99 struct genfb_ops ops; 100 pcireg_t rom; 101 int idx, bar, type; 102 char devinfo[256]; 103 104 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo)); 105 aprint_naive("\n"); 106 aprint_normal(": %s\n", devinfo); 107 108 sc->sc_gen.sc_dev = self; 109 sc->sc_memt = pa->pa_memt; 110 sc->sc_iot = pa->pa_iot; 111 sc->sc_pc = pa->pa_pc; 112 sc->sc_pcitag = pa->pa_tag; 113 sc->sc_want_wsfb = 0; 114 115 genfb_init(&sc->sc_gen); 116 117 /* firmware / MD code responsible for restoring the display */ 118 if (sc->sc_gen.sc_pmfcb == NULL) 119 pmf_device_register(self, NULL, NULL); 120 else 121 pmf_device_register(self, 122 sc->sc_gen.sc_pmfcb->gpc_suspend, 123 sc->sc_gen.sc_pmfcb->gpc_resume); 124 125 if ((sc->sc_gen.sc_width == 0) || (sc->sc_gen.sc_fbsize == 0)) { 126 aprint_debug_dev(self, "not configured by firmware\n"); 127 return; 128 } 129 130 if (bus_space_map(sc->sc_memt, sc->sc_gen.sc_fboffset, 131 sc->sc_gen.sc_fbsize, BUS_SPACE_MAP_LINEAR, &sc->sc_memh) != 0) { 132 133 aprint_error_dev(self, "unable to map the framebuffer\n"); 134 return; 135 } 136 sc->sc_gen.sc_fbaddr = bus_space_vaddr(sc->sc_memt, sc->sc_memh); 137 138 /* mmap()able bus ranges */ 139 idx = 0; 140 bar = 0x10; 141 while (bar < 0x34) { 142 143 type = pci_mapreg_type(sc->sc_pc, sc->sc_pcitag, bar); 144 if ((type == PCI_MAPREG_TYPE_MEM) || 145 (type == PCI_MAPREG_TYPE_ROM)) { 146 147 pci_mapreg_info(sc->sc_pc, sc->sc_pcitag, bar, type, 148 &sc->sc_ranges[idx].offset, 149 &sc->sc_ranges[idx].size, 150 &sc->sc_ranges[idx].flags); 151 idx++; 152 } 153 sc->sc_bars[(bar - 0x10) >> 2] = rom = 154 pci_conf_read(sc->sc_pc, sc->sc_pcitag, bar); 155 if ((bar == PCI_MAPREG_ROM) && (rom != 0)) { 156 pci_conf_write(sc->sc_pc, sc->sc_pcitag, bar, rom | 157 PCI_MAPREG_ROM_ENABLE); 158 } 159 bar += 4; 160 } 161 162 sc->sc_ranges_used = idx; 163 164 ops.genfb_ioctl = pci_genfb_ioctl; 165 ops.genfb_mmap = pci_genfb_mmap; 166 ops.genfb_borrow = pci_genfb_borrow; 167 168 if (genfb_attach(&sc->sc_gen, &ops) == 0) { 169 170 /* now try to attach a DRM */ 171 config_found_ia(self, "drm", aux, pci_genfb_drm_print); 172 } 173 } 174 175 static int 176 pci_genfb_drm_print(void *aux, const char *pnp) 177 { 178 if (pnp) 179 aprint_normal("drm at %s", pnp); 180 return (UNCONF); 181 } 182 183 184 static int 185 pci_genfb_ioctl(void *v, void *vs, u_long cmd, void *data, int flag, 186 struct lwp *l) 187 { 188 struct pci_genfb_softc *sc = v; 189 190 switch (cmd) { 191 case WSDISPLAYIO_GTYPE: 192 *(u_int *)data = WSDISPLAY_TYPE_PCIMISC; 193 return 0; 194 195 /* PCI config read/write passthrough. */ 196 case PCI_IOC_CFGREAD: 197 case PCI_IOC_CFGWRITE: 198 return pci_devioctl(sc->sc_pc, sc->sc_pcitag, 199 cmd, data, flag, l); 200 case WSDISPLAYIO_SMODE: { 201 int new_mode = *(int*)data, i; 202 if (new_mode == WSDISPLAYIO_MODE_EMUL) { 203 for (i = 0; i < 9; i++) 204 pci_conf_write(sc->sc_pc, 205 sc->sc_pcitag, 206 0x10 + (i << 2), 207 sc->sc_bars[i]); 208 } 209 } 210 return 0; 211 } 212 213 return EPASSTHROUGH; 214 } 215 216 static paddr_t 217 pci_genfb_mmap(void *v, void *vs, off_t offset, int prot) 218 { 219 struct pci_genfb_softc *sc = v; 220 struct range *r; 221 int i; 222 223 if (offset == 0) 224 sc->sc_want_wsfb = 1; 225 226 /* 227 * regular fb mapping at 0 228 * since some Sun firmware likes to put PCI resources low enough 229 * to collide with the wsfb mapping we only allow it after asking 230 * for offset 0 231 */ 232 DPRINTF("%s: %08x limit %08x\n", __func__, (uint32_t)offset, 233 (uint32_t)sc->sc_gen.sc_fbsize); 234 if ((offset >= 0) && (offset < sc->sc_gen.sc_fbsize) && 235 (sc->sc_want_wsfb == 1)) { 236 237 return bus_space_mmap(sc->sc_memt, sc->sc_gen.sc_fboffset, 238 offset, prot, BUS_SPACE_MAP_LINEAR); 239 } 240 241 /* 242 * restrict all other mappings to processes with superuser privileges 243 * or the kernel itself 244 */ 245 if (kauth_authorize_generic(kauth_cred_get(), KAUTH_GENERIC_ISSUSER, 246 NULL) != 0) { 247 aprint_normal_dev(sc->sc_gen.sc_dev, "mmap() rejected.\n"); 248 return -1; 249 } 250 251 #ifdef WSFB_FAKE_VGA_FB 252 if ((offset >= 0xa0000) && (offset < 0xbffff)) { 253 254 return bus_space_mmap(sc->sc_memt, sc->sc_gen.sc_fboffset, 255 offset - 0xa0000, prot, BUS_SPACE_MAP_LINEAR); 256 } 257 #endif 258 259 /* 260 * XXX this should be generalized, let's just 261 * #define PCI_IOAREA_PADDR 262 * #define PCI_IOAREA_OFFSET 263 * #define PCI_IOAREA_SIZE 264 * somewhere in a MD header and compile this code only if all are 265 * present 266 */ 267 /* 268 * no. 269 * PCI_IOAREA_PADDR would be completely, utterly wrong and completely 270 * useless for the following reasons: 271 * - it's a bus address, not a physical address 272 * - there's no guarantee it's the same for each host bridge 273 * - it's already taken care of by the IO tag 274 * PCI_IOAREA_OFFSET is the same as PCI_MAGIC_IO_RANGE 275 * PCI_IOAREA_SIZE is also useless: 276 * - many cards don't decode more than 16 bit IO anyway 277 * - even machines with more than 64kB IO space try to keep everything 278 * within 64kB for the reason above 279 * - IO ranges tend to be small so in most cases you can't cram enough 280 * cards into a single machine to exhaust 64kB IO space 281 * - machines which need this tend to prefer memory space anyway 282 * - the only use for this right now is to allow the Xserver to map 283 * VGA registers on macppc and a few other powerpc ports, shark uses 284 * a similar mechanism, and what they need is always within 64kB 285 */ 286 #ifdef PCI_MAGIC_IO_RANGE 287 /* allow to map our IO space */ 288 if ((offset >= PCI_MAGIC_IO_RANGE) && 289 (offset < PCI_MAGIC_IO_RANGE + 0x10000)) { 290 return bus_space_mmap(sc->sc_iot, offset - PCI_MAGIC_IO_RANGE, 291 0, prot, BUS_SPACE_MAP_LINEAR); 292 } 293 #endif 294 295 /* allow to mmap() our BARs */ 296 /* maybe the ROM BAR too? */ 297 for (i = 0; i < sc->sc_ranges_used; i++) { 298 299 r = &sc->sc_ranges[i]; 300 if ((offset >= r->offset) && (offset < (r->offset + r->size))) { 301 return bus_space_mmap(sc->sc_memt, offset, 0, prot, 302 r->flags); 303 } 304 } 305 306 return -1; 307 } 308 309 int 310 pci_genfb_borrow(void *opaque, bus_addr_t addr, bus_space_handle_t *hdlp) 311 { 312 struct pci_genfb_softc *sc = opaque; 313 314 if (sc == NULL) 315 return 0; 316 if (!sc->sc_gen.sc_fboffset) 317 return 0; 318 if (sc->sc_gen.sc_fboffset != addr) 319 return 0; 320 *hdlp = sc->sc_memh; 321 return 1; 322 } 323