1 /*- 2 * Copyright (c) 2000 The NetBSD Foundation, Inc. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to The NetBSD Foundation 6 * by Matt Thomas of 3am Software Foundry. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the NetBSD 19 * Foundation, Inc. and its contributors. 20 * 4. Neither the name of The NetBSD Foundation nor the names of its 21 * contributors may be used to endorse or promote products derived 22 * from this software without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 26 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34 * POSSIBILITY OF SUCH DAMAGE. 35 */ 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/types.h> 40 #include <sys/socket.h> 41 #include <sys/device.h> 42 43 #include <machine/bus.h> 44 #include <machine/intr.h> 45 46 #include <dev/pci/pcireg.h> 47 #include <dev/pci/pcivar.h> 48 #include <dev/ieee1394/ieee1394reg.h> 49 #include <dev/ieee1394/ieee1394var.h> 50 #include <dev/ieee1394/fwohcireg.h> 51 #include <dev/ieee1394/fwohcivar.h> 52 53 struct fwohci_pci_softc { 54 struct fwohci_softc psc_sc; 55 pci_chipset_tag_t psc_pc; 56 void *psc_ih; 57 }; 58 59 static int fwohci_pci_match __P((struct device *, struct cfdata *, void *)); 60 static void fwohci_pci_attach __P((struct device *, struct device *, void *)); 61 62 struct cfattach fwohci_pci_ca = { 63 sizeof(struct fwohci_pci_softc), fwohci_pci_match, fwohci_pci_attach, 64 #if 0 65 fwohci_pci_detach, fwohci_activate 66 #endif 67 }; 68 69 static int 70 fwohci_pci_match(struct device *parent, struct cfdata *match, void *aux) 71 { 72 struct pci_attach_args *pa = (struct pci_attach_args *) aux; 73 74 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_SERIALBUS && 75 PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_SERIALBUS_FIREWIRE && 76 PCI_INTERFACE(pa->pa_class) == PCI_INTERFACE_OHCI) 77 return 1; 78 79 return 0; 80 } 81 82 static void 83 fwohci_pci_attach(struct device *parent, struct device *self, void *aux) 84 { 85 struct pci_attach_args *pa = (struct pci_attach_args *) aux; 86 struct fwohci_pci_softc *psc = (struct fwohci_pci_softc *) self; 87 char devinfo[256]; 88 char const *intrstr; 89 pci_intr_handle_t ih; 90 u_int32_t csr; 91 92 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo); 93 printf(": %s (rev. 0x%02x)\n", devinfo, PCI_REVISION(pa->pa_class)); 94 95 psc->psc_sc.sc_dmat = pa->pa_dmat; 96 psc->psc_pc = pa->pa_pc; 97 98 /* Map I/O registers */ 99 if (pci_mapreg_map(pa, PCI_OHCI_MAP_REGISTER, PCI_MAPREG_TYPE_MEM, 0, 100 &psc->psc_sc.sc_memt, &psc->psc_sc.sc_memh, 101 NULL, &psc->psc_sc.sc_memsize)) { 102 printf("%s: can't map OCHI register space\n", self->dv_xname); 103 return; 104 } 105 106 /* Disable interrupts, so we don't get any spurious ones. */ 107 OHCI_CSR_WRITE(&psc->psc_sc, OHCI_REG_IntEventClear, OHCI_Int_MasterEnable); 108 109 /* Enable the device. */ 110 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 111 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 112 csr | PCI_COMMAND_MASTER_ENABLE); 113 114 /* Map and establish the interrupt. */ 115 if (pci_intr_map(pa->pa_pc, pa->pa_intrtag, pa->pa_intrpin, 116 pa->pa_intrline, &ih)) { 117 printf("%s: couldn't map interrupt\n", self->dv_xname); 118 return; 119 } 120 intrstr = pci_intr_string(pa->pa_pc, ih); 121 psc->psc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_BIO, fwohci_intr, &psc->psc_sc); 122 if (psc->psc_ih == NULL) { 123 printf("%s: couldn't establish interrupt", self->dv_xname); 124 if (intrstr != NULL) 125 printf(" at %s", intrstr); 126 printf("\n"); 127 return; 128 } 129 printf("%s: interrupting at %s\n", self->dv_xname, intrstr); 130 131 fwohci_init(&psc->psc_sc); 132 } 133