1 /* $NetBSD: fwohci_pci.c,v 1.16 2002/10/02 16:51:16 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Matt Thomas of 3am Software Foundry. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/cdefs.h> 40 __KERNEL_RCSID(0, "$NetBSD: fwohci_pci.c,v 1.16 2002/10/02 16:51:16 thorpej Exp $"); 41 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/socket.h> 45 #include <sys/device.h> 46 47 #include <machine/bus.h> 48 #include <machine/intr.h> 49 50 #include <dev/pci/pcireg.h> 51 #include <dev/pci/pcivar.h> 52 #include <dev/ieee1394/ieee1394reg.h> 53 #include <dev/ieee1394/ieee1394var.h> 54 #include <dev/ieee1394/fwohcireg.h> 55 #include <dev/ieee1394/fwohcivar.h> 56 57 struct fwohci_pci_softc { 58 struct fwohci_softc psc_sc; 59 pci_chipset_tag_t psc_pc; 60 void *psc_ih; 61 }; 62 63 static int fwohci_pci_match __P((struct device *, struct cfdata *, void *)); 64 static void fwohci_pci_attach __P((struct device *, struct device *, void *)); 65 66 CFATTACH_DECL(fwohci_pci, sizeof(struct fwohci_pci_softc), 67 fwohci_pci_match, fwohci_pci_attach, NULL, NULL); 68 69 static int 70 fwohci_pci_match(struct device *parent, struct cfdata *match, void *aux) 71 { 72 struct pci_attach_args *pa = (struct pci_attach_args *) aux; 73 74 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_SERIALBUS && 75 PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_SERIALBUS_FIREWIRE && 76 PCI_INTERFACE(pa->pa_class) == PCI_INTERFACE_OHCI) 77 return 1; 78 79 return 0; 80 } 81 82 static void 83 fwohci_pci_attach(struct device *parent, struct device *self, void *aux) 84 { 85 struct pci_attach_args *pa = (struct pci_attach_args *) aux; 86 struct fwohci_pci_softc *psc = (struct fwohci_pci_softc *) self; 87 char devinfo[256]; 88 char const *intrstr; 89 pci_intr_handle_t ih; 90 u_int32_t csr; 91 92 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo); 93 printf(": %s (rev. 0x%02x)\n", devinfo, PCI_REVISION(pa->pa_class)); 94 95 psc->psc_sc.sc_dmat = pa->pa_dmat; 96 psc->psc_pc = pa->pa_pc; 97 98 /* Map I/O registers */ 99 if (pci_mapreg_map(pa, PCI_OHCI_MAP_REGISTER, PCI_MAPREG_TYPE_MEM, 0, 100 &psc->psc_sc.sc_memt, &psc->psc_sc.sc_memh, 101 NULL, &psc->psc_sc.sc_memsize)) { 102 printf("%s: can't map OHCI register space\n", self->dv_xname); 103 return; 104 } 105 106 /* Disable interrupts, so we don't get any spurious ones. */ 107 OHCI_CSR_WRITE(&psc->psc_sc, OHCI_REG_IntMaskClear, 108 OHCI_Int_MasterEnable); 109 110 /* Enable the device. */ 111 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 112 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 113 csr | PCI_COMMAND_MASTER_ENABLE); 114 115 #if BYTE_ORDER == BIG_ENDIAN 116 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_OHCI_CONTROL_REGISTER); 117 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_OHCI_CONTROL_REGISTER, 118 csr | PCI_GLOBAL_SWAP_BE); 119 #endif 120 121 /* Map and establish the interrupt. */ 122 if (pci_intr_map(pa, &ih)) { 123 printf("%s: couldn't map interrupt\n", self->dv_xname); 124 return; 125 } 126 intrstr = pci_intr_string(pa->pa_pc, ih); 127 psc->psc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_BIO, fwohci_intr, 128 &psc->psc_sc); 129 if (psc->psc_ih == NULL) { 130 printf("%s: couldn't establish interrupt", self->dv_xname); 131 if (intrstr != NULL) 132 printf(" at %s", intrstr); 133 printf("\n"); 134 return; 135 } 136 printf("%s: interrupting at %s\n", self->dv_xname, intrstr); 137 138 if (fwohci_init(&psc->psc_sc, pci_intr_evcnt(pa->pa_pc, ih)) != 0) { 139 pci_intr_disestablish(pa->pa_pc, psc->psc_ih); 140 bus_space_unmap(psc->psc_sc.sc_memt, psc->psc_sc.sc_memh, 141 psc->psc_sc.sc_memsize); 142 } 143 } 144