1 /* $NetBSD: emuxki.c,v 1.70 2019/06/08 08:02:38 isaki Exp $ */ 2 3 /*- 4 * Copyright (c) 2001, 2007 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Yannick Montulet, and by Andrew Doran. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * EMU10K1 single voice driver 34 * o. only 1 voice playback, 1 recording 35 * o. only s16le 2ch 48k 36 * This makes it simple to control buffers and interrupts 37 * while satisfying playback and recording quality. 38 */ 39 40 #include <sys/cdefs.h> 41 __KERNEL_RCSID(0, "$NetBSD: emuxki.c,v 1.70 2019/06/08 08:02:38 isaki Exp $"); 42 43 #include <sys/param.h> 44 #include <sys/device.h> 45 #include <sys/errno.h> 46 #include <sys/systm.h> 47 #include <sys/audioio.h> 48 #include <sys/mutex.h> 49 #include <sys/kmem.h> 50 #include <sys/malloc.h> 51 #include <sys/fcntl.h> 52 53 #include <sys/bus.h> 54 #include <sys/intr.h> 55 56 #include <dev/audio/audio_if.h> 57 58 #include <dev/ic/ac97reg.h> 59 #include <dev/ic/ac97var.h> 60 61 #include <dev/pci/pcidevs.h> 62 #include <dev/pci/pcireg.h> 63 #include <dev/pci/pcivar.h> 64 65 #include <dev/pci/emuxkireg.h> 66 67 /* #define EMUXKI_DEBUG 1 */ 68 #ifdef EMUXKI_DEBUG 69 #define emudebug EMUXKI_DEBUG 70 # define DPRINTF(fmt...) do { if (emudebug) printf(fmt); } while (0) 71 # define DPRINTFN(n,fmt...) do { if (emudebug>=(n)) printf(fmt); } while (0) 72 #else 73 # define DPRINTF(fmt...) __nothing 74 # define DPRINTFN(n,fmt...) __nothing 75 #endif 76 77 /* 78 * PCI 79 * Note: emuxki's page table entry uses only 31bit addressing. 80 * (Maybe, later chip has 32bit mode, but it isn't used now.) 81 */ 82 83 #define EMU_PCI_CBIO (0x10) 84 #define EMU_SUBSYS_APS (0x40011102) 85 86 #define EMU_PTESIZE (4096) 87 #define EMU_MINPTE (3) 88 /* 89 * Hardware limit of PTE is 4096 entry but it's too big for single voice. 90 * Reasonable candidate is: 91 * 48kHz * 2ch * 2byte * 1sec * 3buf/EMU_PTESIZE = 141 92 * and then round it up to 2^n. 93 */ 94 #define EMU_MAXPTE (256) 95 #define EMU_NUMCHAN (64) 96 97 /* 98 * Internal recording DMA buffer 99 */ 100 /* Recommend the same size as EMU_PTESIZE to be symmetrical for play/rec */ 101 #define EMU_REC_DMABLKSIZE (4096) 102 /* must be EMU_REC_DMABLKSIZE * 2 */ 103 #define EMU_REC_DMASIZE (8192) 104 /* must be EMU_RECBS_BUFSIZE_(EMU_REC_DMASIZE) */ 105 #define EMU_REC_BUFSIZE_RECBS EMU_RECBS_BUFSIZE_8192 106 107 /* 108 * DMA memory management 109 */ 110 111 #define EMU_DMA_ALIGN (4096) 112 #define EMU_DMA_NSEGS (1) 113 114 struct dmamem { 115 bus_dma_tag_t dmat; 116 bus_size_t size; 117 bus_size_t align; 118 bus_size_t bound; 119 bus_dma_segment_t *segs; 120 int nsegs; 121 int rsegs; 122 void * kaddr; 123 bus_dmamap_t map; 124 }; 125 126 #define KERNADDR(ptr) ((void *)((ptr)->kaddr)) 127 /* 128 * (ptr)->segs[] is CPU's PA translated by CPU's MMU. 129 * (ptr)->map->dm_segs[] is PCI device's PA translated by PCI's MMU. 130 */ 131 #define DMASEGADDR(ptr, segno) ((ptr)->map->dm_segs[segno].ds_addr) 132 #define DMAADDR(ptr) DMASEGADDR(ptr, 0) 133 #define DMASIZE(ptr) ((ptr)->size) 134 135 struct emuxki_softc { 136 device_t sc_dev; 137 device_t sc_audev; 138 enum { 139 EMUXKI_SBLIVE = 0x00, 140 EMUXKI_AUDIGY = 0x01, 141 EMUXKI_AUDIGY2 = 0x02, 142 EMUXKI_LIVE_5_1 = 0x04, 143 EMUXKI_APS = 0x08 144 } sc_type; 145 audio_device_t sc_audv; /* for GETDEV */ 146 147 /* Autoconfig parameters */ 148 bus_space_tag_t sc_iot; 149 bus_space_handle_t sc_ioh; 150 bus_addr_t sc_iob; 151 bus_size_t sc_ios; 152 pci_chipset_tag_t sc_pc; /* PCI tag */ 153 bus_dma_tag_t sc_dmat; 154 void *sc_ih; /* interrupt handler */ 155 kmutex_t sc_intr_lock; 156 kmutex_t sc_lock; 157 kmutex_t sc_index_lock; 158 159 /* register parameters */ 160 struct dmamem *ptb; /* page table */ 161 162 struct dmamem *pmem; /* play memory */ 163 void (*pintr)(void *); 164 void *pintrarg; 165 audio_params_t play; 166 int pframesize; 167 int pblksize; 168 int plength; 169 int poffset; 170 171 struct dmamem *rmem; /* rec internal memory */ 172 void (*rintr)(void *); 173 void *rintrarg; 174 audio_params_t rec; 175 void *rptr; /* rec MI ptr */ 176 int rcurrent; /* rec software trans count */ 177 int rframesize; 178 int rblksize; 179 int rlength; 180 int roffset; 181 182 /* others */ 183 184 struct ac97_host_if hostif; 185 struct ac97_codec_if *codecif; 186 }; 187 188 /* blackmagic */ 189 #define X1(x) ((sc->sc_type & EMUXKI_AUDIGY) ? EMU_A_##x : EMU_##x) 190 #define X2(x, y) ((sc->sc_type & EMUXKI_AUDIGY) \ 191 ? EMU_A_##x(EMU_A_##y) : EMU_##x(EMU_##y)) 192 #define EMU_A_DSP_FX EMU_DSP_FX 193 #define EMU_A_DSP_IN_AC97 EMU_DSP_IN_AC97 194 195 /* prototypes */ 196 static struct dmamem *dmamem_alloc(struct emuxki_softc *, size_t); 197 static void dmamem_free(struct dmamem *); 198 static void dmamem_sync(struct dmamem *, int); 199 static uint8_t emuxki_readio_1(struct emuxki_softc *, int) __unused; 200 static uint16_t emuxki_readio_2(struct emuxki_softc *, int); 201 static uint32_t emuxki_readio_4(struct emuxki_softc *, int); 202 static void emuxki_writeio_1(struct emuxki_softc *, int, uint8_t); 203 static void emuxki_writeio_2(struct emuxki_softc *, int, uint16_t); 204 static void emuxki_writeio_4(struct emuxki_softc *, int, uint32_t); 205 static uint32_t emuxki_readptr(struct emuxki_softc *, int, int, int); 206 static void emuxki_writeptr(struct emuxki_softc *, int, int, int, uint32_t); 207 static uint32_t emuxki_read(struct emuxki_softc *, int, int); 208 static void emuxki_write(struct emuxki_softc *, int, int, uint32_t); 209 static int emuxki_match(device_t, cfdata_t, void *); 210 static void emuxki_attach(device_t, device_t, void *); 211 static int emuxki_detach(device_t, int); 212 static int emuxki_init(struct emuxki_softc *); 213 static void emuxki_dsp_addop(struct emuxki_softc *, uint16_t *, uint8_t, 214 uint16_t, uint16_t, uint16_t, uint16_t); 215 static void emuxki_initfx(struct emuxki_softc *); 216 static void emuxki_play_start(struct emuxki_softc *, int, uint32_t, 217 uint32_t); 218 static void emuxki_play_stop(struct emuxki_softc *, int); 219 220 static int emuxki_open(void *, int); 221 static void emuxki_close(void *); 222 static int emuxki_query_format(void *, audio_format_query_t *); 223 static int emuxki_set_format(void *, int, 224 const audio_params_t *, const audio_params_t *, 225 audio_filter_reg_t *, audio_filter_reg_t *); 226 static int emuxki_halt_output(void *); 227 static int emuxki_halt_input(void *); 228 static int emuxki_intr(void *); 229 static int emuxki_getdev(void *, struct audio_device *); 230 static int emuxki_set_port(void *, mixer_ctrl_t *); 231 static int emuxki_get_port(void *, mixer_ctrl_t *); 232 static int emuxki_query_devinfo(void *, mixer_devinfo_t *); 233 static void *emuxki_allocm(void *, int, size_t); 234 static void emuxki_freem(void *, void *, size_t); 235 static int emuxki_round_blocksize(void *, int, int, 236 const audio_params_t *); 237 static size_t emuxki_round_buffersize(void *, int, size_t); 238 static int emuxki_get_props(void *); 239 static int emuxki_trigger_output(void *, void *, void *, int, 240 void (*)(void *), void *, const audio_params_t *); 241 static int emuxki_trigger_input(void *, void *, void *, int, 242 void (*)(void *), void *, const audio_params_t *); 243 static void emuxki_get_locks(void *, kmutex_t **, kmutex_t **); 244 245 static int emuxki_ac97_init(struct emuxki_softc *); 246 static int emuxki_ac97_attach(void *, struct ac97_codec_if *); 247 static int emuxki_ac97_read(void *, uint8_t, uint16_t *); 248 static int emuxki_ac97_write(void *, uint8_t, uint16_t); 249 static int emuxki_ac97_reset(void *); 250 static enum ac97_host_flags emuxki_ac97_flags(void *); 251 252 253 CFATTACH_DECL_NEW(emuxki, sizeof(struct emuxki_softc), 254 emuxki_match, emuxki_attach, emuxki_detach, NULL); 255 256 static const struct audio_hw_if emuxki_hw_if = { 257 .open = emuxki_open, 258 .close = emuxki_close, 259 .query_format = emuxki_query_format, 260 .set_format = emuxki_set_format, 261 .round_blocksize = emuxki_round_blocksize, 262 .halt_output = emuxki_halt_output, 263 .halt_input = emuxki_halt_input, 264 .getdev = emuxki_getdev, 265 .set_port = emuxki_set_port, 266 .get_port = emuxki_get_port, 267 .query_devinfo = emuxki_query_devinfo, 268 .allocm = emuxki_allocm, 269 .freem = emuxki_freem, 270 .round_buffersize = emuxki_round_buffersize, 271 .get_props = emuxki_get_props, 272 .trigger_output = emuxki_trigger_output, 273 .trigger_input = emuxki_trigger_input, 274 .get_locks = emuxki_get_locks, 275 }; 276 277 static const struct audio_format emuxki_formats[] = { 278 { 279 .mode = AUMODE_PLAY | AUMODE_RECORD, 280 .encoding = AUDIO_ENCODING_SLINEAR_LE, 281 .validbits = 16, 282 .precision = 16, 283 .channels = 2, 284 .channel_mask = AUFMT_STEREO, 285 .frequency_type = 1, 286 .frequency = { 48000 }, 287 } 288 }; 289 #define EMUXKI_NFORMATS __arraycount(emuxki_formats) 290 291 /* 292 * dma memory 293 */ 294 295 static struct dmamem * 296 dmamem_alloc(struct emuxki_softc *sc, size_t size) 297 { 298 struct dmamem *mem; 299 300 KASSERT(!mutex_owned(&sc->sc_intr_lock)); 301 302 /* Allocate memory for structure */ 303 mem = kmem_alloc(sizeof(*mem), KM_SLEEP); 304 mem->dmat = sc->sc_dmat; 305 mem->size = size; 306 mem->align = EMU_DMA_ALIGN; 307 mem->nsegs = EMU_DMA_NSEGS; 308 mem->bound = 0; 309 310 mem->segs = kmem_alloc(mem->nsegs * sizeof(*(mem->segs)), KM_SLEEP); 311 312 if (bus_dmamem_alloc(mem->dmat, mem->size, mem->align, mem->bound, 313 mem->segs, mem->nsegs, &mem->rsegs, BUS_DMA_WAITOK)) { 314 device_printf(sc->sc_dev, 315 "%s bus_dmamem_alloc failed\n", __func__); 316 goto memfree; 317 } 318 319 if (bus_dmamem_map(mem->dmat, mem->segs, mem->nsegs, mem->size, 320 &mem->kaddr, BUS_DMA_WAITOK | BUS_DMA_COHERENT)) { 321 device_printf(sc->sc_dev, 322 "%s bus_dmamem_map failed\n", __func__); 323 goto free; 324 } 325 326 if (bus_dmamap_create(mem->dmat, mem->size, mem->nsegs, mem->size, 327 mem->bound, BUS_DMA_WAITOK, &mem->map)) { 328 device_printf(sc->sc_dev, 329 "%s bus_dmamap_create failed\n", __func__); 330 goto unmap; 331 } 332 333 if (bus_dmamap_load(mem->dmat, mem->map, mem->kaddr, 334 mem->size, NULL, BUS_DMA_WAITOK)) { 335 device_printf(sc->sc_dev, 336 "%s bus_dmamap_load failed\n", __func__); 337 goto destroy; 338 } 339 340 return mem; 341 342 destroy: 343 bus_dmamap_destroy(mem->dmat, mem->map); 344 unmap: 345 bus_dmamem_unmap(mem->dmat, mem->kaddr, mem->size); 346 free: 347 bus_dmamem_free(mem->dmat, mem->segs, mem->nsegs); 348 memfree: 349 kmem_free(mem->segs, mem->nsegs * sizeof(*(mem->segs))); 350 kmem_free(mem, sizeof(*mem)); 351 352 return NULL; 353 } 354 355 static void 356 dmamem_free(struct dmamem *mem) 357 { 358 359 bus_dmamap_unload(mem->dmat, mem->map); 360 bus_dmamap_destroy(mem->dmat, mem->map); 361 bus_dmamem_unmap(mem->dmat, mem->kaddr, mem->size); 362 bus_dmamem_free(mem->dmat, mem->segs, mem->nsegs); 363 364 kmem_free(mem->segs, mem->nsegs * sizeof(*(mem->segs))); 365 kmem_free(mem, sizeof(*mem)); 366 } 367 368 static void 369 dmamem_sync(struct dmamem *mem, int ops) 370 { 371 372 bus_dmamap_sync(mem->dmat, mem->map, 0, mem->size, ops); 373 } 374 375 376 /* 377 * I/O register access 378 */ 379 380 static uint8_t 381 emuxki_readio_1(struct emuxki_softc *sc, int addr) 382 { 383 384 return bus_space_read_1(sc->sc_iot, sc->sc_ioh, addr); 385 } 386 387 static void 388 emuxki_writeio_1(struct emuxki_softc *sc, int addr, uint8_t data) 389 { 390 391 bus_space_write_1(sc->sc_iot, sc->sc_ioh, addr, data); 392 } 393 394 static uint16_t 395 emuxki_readio_2(struct emuxki_softc *sc, int addr) 396 { 397 398 return bus_space_read_2(sc->sc_iot, sc->sc_ioh, addr); 399 } 400 401 static void 402 emuxki_writeio_2(struct emuxki_softc *sc, int addr, uint16_t data) 403 { 404 405 bus_space_write_2(sc->sc_iot, sc->sc_ioh, addr, data); 406 } 407 408 static uint32_t 409 emuxki_readio_4(struct emuxki_softc *sc, int addr) 410 { 411 412 return bus_space_read_4(sc->sc_iot, sc->sc_ioh, addr); 413 } 414 415 static void 416 emuxki_writeio_4(struct emuxki_softc *sc, int addr, uint32_t data) 417 { 418 419 bus_space_write_4(sc->sc_iot, sc->sc_ioh, addr, data); 420 } 421 422 static uint32_t 423 emuxki_readptr(struct emuxki_softc *sc, int aptr, int dptr, int addr) 424 { 425 uint32_t data; 426 427 mutex_spin_enter(&sc->sc_index_lock); 428 emuxki_writeio_4(sc, aptr, addr); 429 data = emuxki_readio_4(sc, dptr); 430 mutex_spin_exit(&sc->sc_index_lock); 431 return data; 432 } 433 434 static void 435 emuxki_writeptr(struct emuxki_softc *sc, int aptr, int dptr, int addr, 436 uint32_t data) 437 { 438 439 mutex_spin_enter(&sc->sc_index_lock); 440 emuxki_writeio_4(sc, aptr, addr); 441 emuxki_writeio_4(sc, dptr, data); 442 mutex_spin_exit(&sc->sc_index_lock); 443 } 444 445 static uint32_t 446 emuxki_read(struct emuxki_softc *sc, int ch, int addr) 447 { 448 449 /* Original HENTAI addressing is never supported. */ 450 KASSERT((addr & 0xff000000) == 0); 451 452 return emuxki_readptr(sc, EMU_PTR, EMU_DATA, (addr << 16) + ch); 453 } 454 455 static void 456 emuxki_write(struct emuxki_softc *sc, int ch, int addr, uint32_t data) 457 { 458 459 /* Original HENTAI addressing is never supported. */ 460 KASSERT((addr & 0xff000000) == 0); 461 462 emuxki_writeptr(sc, EMU_PTR, EMU_DATA, (addr << 16) + ch, data); 463 } 464 465 /* 466 * MD driver 467 */ 468 469 static int 470 emuxki_match(device_t parent, cfdata_t match, void *aux) 471 { 472 struct pci_attach_args *pa; 473 474 pa = aux; 475 if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_CREATIVELABS) 476 return 0; 477 478 switch (PCI_PRODUCT(pa->pa_id)) { 479 case PCI_PRODUCT_CREATIVELABS_SBLIVE: 480 case PCI_PRODUCT_CREATIVELABS_SBLIVE2: 481 case PCI_PRODUCT_CREATIVELABS_AUDIGY: 482 return 1; 483 default: 484 return 0; 485 } 486 } 487 488 static void 489 emuxki_attach(device_t parent, device_t self, void *aux) 490 { 491 struct emuxki_softc *sc; 492 struct pci_attach_args *pa; 493 pci_intr_handle_t ih; 494 const char *intrstr; 495 char intrbuf[PCI_INTRSTR_LEN]; 496 pcireg_t reg; 497 498 sc = device_private(self); 499 sc->sc_dev = self; 500 pa = aux; 501 502 pci_aprint_devinfo(pa, "Audio controller"); 503 DPRINTF("dmat=%p\n", (char *)pa->pa_dmat); 504 505 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_NONE); 506 mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_AUDIO); 507 mutex_init(&sc->sc_index_lock, MUTEX_DEFAULT, IPL_AUDIO); 508 509 sc->sc_pc = pa->pa_pc; 510 sc->sc_dmat = pa->pa_dmat; 511 512 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 513 reg |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MASTER_ENABLE | 514 PCI_COMMAND_MEM_ENABLE; 515 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, reg); 516 517 if (pci_mapreg_map(pa, EMU_PCI_CBIO, PCI_MAPREG_TYPE_IO, 0, 518 &sc->sc_iot, &sc->sc_ioh, &sc->sc_iob, &sc->sc_ios)) { 519 aprint_error(": can't map iospace\n"); 520 return; 521 } 522 523 if (pci_intr_map(pa, &ih)) { 524 aprint_error_dev(self, "couldn't map interrupt\n"); 525 goto unmap; 526 } 527 528 intrstr = pci_intr_string(pa->pa_pc, ih, intrbuf, sizeof(intrbuf)); 529 sc->sc_ih = pci_intr_establish_xname(pa->pa_pc, ih, IPL_AUDIO, 530 emuxki_intr, sc, device_xname(self)); 531 if (sc->sc_ih == NULL) { 532 aprint_error_dev(self, "couldn't establish interrupt"); 533 if (intrstr != NULL) 534 aprint_error(" at %s", intrstr); 535 aprint_error("\n"); 536 goto unmap; 537 } 538 aprint_normal_dev(self, "interrupting at %s\n", intrstr); 539 540 /* XXX it's unknown whether APS is made from Audigy as well */ 541 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CREATIVELABS_AUDIGY) { 542 sc->sc_type = EMUXKI_AUDIGY; 543 if (PCI_REVISION(pa->pa_class) == 0x04) { 544 sc->sc_type |= EMUXKI_AUDIGY2; 545 strlcpy(sc->sc_audv.name, "Audigy2", 546 sizeof(sc->sc_audv.name)); 547 } else { 548 strlcpy(sc->sc_audv.name, "Audigy", 549 sizeof(sc->sc_audv.name)); 550 } 551 } else if (pci_conf_read(pa->pa_pc, pa->pa_tag, 552 PCI_SUBSYS_ID_REG) == EMU_SUBSYS_APS) { 553 sc->sc_type = EMUXKI_APS; 554 strlcpy(sc->sc_audv.name, "E-mu APS", sizeof(sc->sc_audv.name)); 555 } else { 556 sc->sc_type = EMUXKI_SBLIVE; 557 strlcpy(sc->sc_audv.name, "SB Live!", sizeof(sc->sc_audv.name)); 558 } 559 snprintf(sc->sc_audv.version, sizeof(sc->sc_audv.version), "0x%02x", 560 PCI_REVISION(pa->pa_class)); 561 strlcpy(sc->sc_audv.config, "emuxki", sizeof(sc->sc_audv.config)); 562 563 if (emuxki_init(sc)) { 564 aprint_error("emuxki_init error\n"); 565 goto intrdis; 566 } 567 if (emuxki_ac97_init(sc)) { 568 aprint_error("emuxki_ac97_init error\n"); 569 goto intrdis; 570 } 571 572 sc->sc_audev = audio_attach_mi(&emuxki_hw_if, sc, self); 573 if (sc->sc_audev == NULL) { 574 aprint_error("audio_attach_mi error\n"); 575 goto intrdis; 576 } 577 578 return; 579 580 intrdis: 581 pci_intr_disestablish(sc->sc_pc, sc->sc_ih); 582 unmap: 583 bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios); 584 return; 585 } 586 587 static int 588 emuxki_detach(device_t self, int flags) 589 { 590 struct emuxki_softc *sc; 591 592 sc = device_private(self); 593 if (sc->sc_audev != NULL) /* Test in case audio didn't attach */ 594 config_detach(sc->sc_audev, 0); 595 596 /* All voices should be stopped now but add some code here if not */ 597 emuxki_writeio_4(sc, EMU_HCFG, 598 EMU_HCFG_LOCKSOUNDCACHE | 599 EMU_HCFG_LOCKTANKCACHE_MASK | 600 EMU_HCFG_MUTEBUTTONENABLE); 601 emuxki_writeio_4(sc, EMU_INTE, 0); 602 603 /* Disable any Channels interrupts */ 604 emuxki_write(sc, 0, EMU_CLIEL, 0); 605 emuxki_write(sc, 0, EMU_CLIEH, 0); 606 emuxki_write(sc, 0, EMU_SOLEL, 0); 607 emuxki_write(sc, 0, EMU_SOLEH, 0); 608 609 /* stop DSP */ 610 emuxki_write(sc, 0, X1(DBG), X1(DBG_SINGLE_STEP)); 611 612 dmamem_free(sc->ptb); 613 614 pci_intr_disestablish(sc->sc_pc, sc->sc_ih); 615 bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios); 616 617 mutex_destroy(&sc->sc_lock); 618 mutex_destroy(&sc->sc_intr_lock); 619 mutex_destroy(&sc->sc_index_lock); 620 621 return 0; 622 } 623 624 static int 625 emuxki_init(struct emuxki_softc *sc) 626 { 627 int i; 628 uint32_t spcs; 629 uint32_t hcfg; 630 631 /* clear AUDIO bit */ 632 emuxki_writeio_4(sc, EMU_HCFG, 633 EMU_HCFG_LOCKSOUNDCACHE | 634 EMU_HCFG_LOCKTANKCACHE_MASK | 635 EMU_HCFG_MUTEBUTTONENABLE); 636 637 /* mask interrupt without PCIERR */ 638 emuxki_writeio_4(sc, EMU_INTE, 639 EMU_INTE_SAMPLERATER | /* always on this bit */ 640 EMU_INTE_PCIERRENABLE); 641 642 /* disable all channel interrupt */ 643 emuxki_write(sc, 0, EMU_CLIEL, 0); 644 emuxki_write(sc, 0, EMU_CLIEH, 0); 645 emuxki_write(sc, 0, EMU_SOLEL, 0); 646 emuxki_write(sc, 0, EMU_SOLEH, 0); 647 648 /* Set recording buffers sizes to zero */ 649 emuxki_write(sc, 0, EMU_MICBS, EMU_RECBS_BUFSIZE_NONE); 650 emuxki_write(sc, 0, EMU_MICBA, 0); 651 emuxki_write(sc, 0, EMU_FXBS, EMU_RECBS_BUFSIZE_NONE); 652 emuxki_write(sc, 0, EMU_FXBA, 0); 653 emuxki_write(sc, 0, EMU_ADCBS, EMU_RECBS_BUFSIZE_NONE); 654 emuxki_write(sc, 0, EMU_ADCBA, 0); 655 656 if(sc->sc_type & EMUXKI_AUDIGY) { 657 emuxki_write(sc, 0, EMU_SPBYPASS, EMU_SPBYPASS_24_BITS); 658 emuxki_write(sc, 0, EMU_AC97SLOT, 659 EMU_AC97SLOT_CENTER | EMU_AC97SLOT_LFE); 660 } 661 662 /* Initialize all channels to stopped and no effects */ 663 for (i = 0; i < EMU_NUMCHAN; i++) { 664 emuxki_write(sc, i, EMU_CHAN_DCYSUSV, 0x7f7f); 665 emuxki_write(sc, i, EMU_CHAN_IP, EMU_CHAN_IP_UNITY); 666 emuxki_write(sc, i, EMU_CHAN_VTFT, 0xffff); 667 emuxki_write(sc, i, EMU_CHAN_CVCF, 0xffff); 668 emuxki_write(sc, i, EMU_CHAN_PTRX, 0); 669 emuxki_write(sc, i, EMU_CHAN_CPF, 0); 670 emuxki_write(sc, i, EMU_CHAN_CCR, 0); 671 emuxki_write(sc, i, EMU_CHAN_PSST, 0); 672 emuxki_write(sc, i, EMU_CHAN_DSL, 0); 673 emuxki_write(sc, i, EMU_CHAN_CCCA, EMU_CHAN_CCCA_INTERPROM_1); 674 emuxki_write(sc, i, EMU_CHAN_Z1, 0); 675 emuxki_write(sc, i, EMU_CHAN_Z2, 0); 676 emuxki_write(sc, i, EMU_CHAN_MAPA, 0xffffffff); 677 emuxki_write(sc, i, EMU_CHAN_MAPB, 0xffffffff); 678 emuxki_write(sc, i, EMU_CHAN_FXRT, 0x32100000); 679 emuxki_write(sc, i, EMU_CHAN_ATKHLDM, 0); 680 emuxki_write(sc, i, EMU_CHAN_DCYSUSM, 0); 681 emuxki_write(sc, i, EMU_CHAN_IFATN, 0xffff); 682 emuxki_write(sc, i, EMU_CHAN_PEFE, 0x007f); 683 emuxki_write(sc, i, EMU_CHAN_FMMOD, 0); 684 emuxki_write(sc, i, EMU_CHAN_TREMFRQ, 0); 685 emuxki_write(sc, i, EMU_CHAN_FM2FRQ2, 0); 686 emuxki_write(sc, i, EMU_CHAN_TEMPENV, 0); 687 688 /* these are last so OFF prevents writing */ 689 emuxki_write(sc, i, EMU_CHAN_LFOVAL2, 0x8000); 690 emuxki_write(sc, i, EMU_CHAN_LFOVAL1, 0x8000); 691 emuxki_write(sc, i, EMU_CHAN_ATKHLDV, 0x7f7f); 692 emuxki_write(sc, i, EMU_CHAN_ENVVOL, 0); 693 emuxki_write(sc, i, EMU_CHAN_ENVVAL, 0x8000); 694 } 695 696 /* set digital outputs format */ 697 spcs = EMU_SPCS_CLKACCY_1000PPM | 698 EMU_SPCS_SAMPLERATE_48 | 699 EMU_SPCS_CHANNELNUM_LEFT | 700 EMU_SPCS_SOURCENUM_UNSPEC | 701 EMU_SPCS_GENERATIONSTATUS | 702 0x00001200 /* Cat code. */ | 703 0x00000000 /* IEC-958 Mode */ | 704 EMU_SPCS_EMPHASIS_NONE | 705 EMU_SPCS_COPYRIGHT; 706 emuxki_write(sc, 0, EMU_SPCS0, spcs); 707 emuxki_write(sc, 0, EMU_SPCS1, spcs); 708 emuxki_write(sc, 0, EMU_SPCS2, spcs); 709 710 if (sc->sc_type & EMUXKI_AUDIGY2) { 711 emuxki_write(sc, 0, EMU_A2_SPDIF_SAMPLERATE, 712 EMU_A2_SPDIF_UNKNOWN); 713 714 emuxki_writeptr(sc, EMU_A2_PTR, EMU_A2_DATA, EMU_A2_SRCSEL, 715 EMU_A2_SRCSEL_ENABLE_SPDIF | EMU_A2_SRCSEL_ENABLE_SRCMULTI); 716 717 emuxki_writeptr(sc, EMU_A2_PTR, EMU_A2_DATA, EMU_A2_SRCMULTI, 718 EMU_A2_SRCMULTI_ENABLE_INPUT); 719 } 720 721 /* page table */ 722 sc->ptb = dmamem_alloc(sc, EMU_MAXPTE * sizeof(uint32_t)); 723 if (sc->ptb == NULL) { 724 device_printf(sc->sc_dev, "ptb allocation error\n"); 725 return ENOMEM; 726 } 727 emuxki_write(sc, 0, EMU_PTB, DMAADDR(sc->ptb)); 728 729 emuxki_write(sc, 0, EMU_TCBS, 0); /* This means 16K TCB */ 730 emuxki_write(sc, 0, EMU_TCB, 0); /* No TCB use for now */ 731 732 /* Let's play with sound processor */ 733 emuxki_initfx(sc); 734 735 /* enable interrupt */ 736 emuxki_writeio_4(sc, EMU_INTE, 737 emuxki_readio_4(sc, EMU_INTE) | 738 EMU_INTE_VOLINCRENABLE | 739 EMU_INTE_VOLDECRENABLE | 740 EMU_INTE_MUTEENABLE); 741 742 if (sc->sc_type & EMUXKI_AUDIGY2) { 743 emuxki_writeio_4(sc, EMU_A_IOCFG, 744 emuxki_readio_4(sc, EMU_A_IOCFG) | 745 EMU_A_IOCFG_GPOUT0); 746 } 747 748 /* enable AUDIO bit */ 749 hcfg = EMU_HCFG_AUDIOENABLE | EMU_HCFG_AUTOMUTE; 750 751 if (sc->sc_type & EMUXKI_AUDIGY2) { 752 hcfg |= EMU_HCFG_AC3ENABLE_CDSPDIF | 753 EMU_HCFG_AC3ENABLE_GPSPDIF; 754 } else if (sc->sc_type & EMUXKI_AUDIGY) { 755 } else { 756 hcfg |= EMU_HCFG_LOCKTANKCACHE_MASK; 757 } 758 /* joystick not supported now */ 759 emuxki_writeio_4(sc, EMU_HCFG, hcfg); 760 761 return 0; 762 } 763 764 /* 765 * dsp programming 766 */ 767 768 static void 769 emuxki_dsp_addop(struct emuxki_softc *sc, uint16_t *pc, uint8_t op, 770 uint16_t r, uint16_t a, uint16_t x, uint16_t y) 771 { 772 uint32_t loword; 773 uint32_t hiword; 774 int reg; 775 776 if (sc->sc_type & EMUXKI_AUDIGY) { 777 reg = EMU_A_MICROCODEBASE; 778 loword = (x << 12) & EMU_A_DSP_LOWORD_OPX_MASK; 779 loword |= y & EMU_A_DSP_LOWORD_OPY_MASK; 780 hiword = (op << 24) & EMU_A_DSP_HIWORD_OPCODE_MASK; 781 hiword |= (r << 12) & EMU_A_DSP_HIWORD_RESULT_MASK; 782 hiword |= a & EMU_A_DSP_HIWORD_OPA_MASK; 783 } else { 784 reg = EMU_MICROCODEBASE; 785 loword = (x << 10) & EMU_DSP_LOWORD_OPX_MASK; 786 loword |= y & EMU_DSP_LOWORD_OPY_MASK; 787 hiword = (op << 20) & EMU_DSP_HIWORD_OPCODE_MASK; 788 hiword |= (r << 10) & EMU_DSP_HIWORD_RESULT_MASK; 789 hiword |= a & EMU_DSP_HIWORD_OPA_MASK; 790 } 791 792 reg += (*pc) * 2; 793 /* must ordering; lo, hi */ 794 emuxki_write(sc, 0, reg, loword); 795 emuxki_write(sc, 0, reg + 1, hiword); 796 797 (*pc)++; 798 } 799 800 static void 801 emuxki_initfx(struct emuxki_softc *sc) 802 { 803 uint16_t pc; 804 805 /* Set all GPRs to 0 */ 806 for (pc = 0; pc < 256; pc++) 807 emuxki_write(sc, 0, EMU_DSP_GPR(pc), 0); 808 for (pc = 0; pc < 160; pc++) { 809 emuxki_write(sc, 0, EMU_TANKMEMDATAREGBASE + pc, 0); 810 emuxki_write(sc, 0, EMU_TANKMEMADDRREGBASE + pc, 0); 811 } 812 813 /* stop DSP, single step mode */ 814 emuxki_write(sc, 0, X1(DBG), X1(DBG_SINGLE_STEP)); 815 816 /* XXX: delay (48kHz equiv. 21us) if needed */ 817 818 /* start DSP programming */ 819 pc = 0; 820 821 /* OUT[L/R] = 0 + FX[L/R] * 1 */ 822 emuxki_dsp_addop(sc, &pc, EMU_DSP_OP_MACINTS, 823 X2(DSP_OUTL, DSP_OUT_A_FRONT), 824 X1(DSP_CST(0)), 825 X1(DSP_FX(0)), 826 X1(DSP_CST(1))); 827 emuxki_dsp_addop(sc, &pc, EMU_DSP_OP_MACINTS, 828 X2(DSP_OUTR, DSP_OUT_A_FRONT), 829 X1(DSP_CST(0)), 830 X1(DSP_FX(1)), 831 X1(DSP_CST(1))); 832 #if 0 833 /* XXX: rear feature??? */ 834 /* Rear OUT[L/R] = 0 + FX[L/R] * 1 */ 835 emuxki_dsp_addop(sc, &pc, EMU_DSP_OP_MACINTS, 836 X2(DSP_OUTL, DSP_OUT_A_REAR), 837 X1(DSP_CST(0)), 838 X1(DSP_FX(0)), 839 X1(DSP_CST(1))); 840 emuxki_dsp_addop(sc, &pc, EMU_DSP_OP_MACINTS, 841 X2(DSP_OUTR, DSP_OUT_A_REAR), 842 X1(DSP_CST(0)), 843 X1(DSP_FX(1)), 844 X1(DSP_CST(1))); 845 #endif 846 /* ADC recording[L/R] = AC97 In[L/R] */ 847 emuxki_dsp_addop(sc, &pc, EMU_DSP_OP_ACC3, 848 X2(DSP_OUTL, DSP_OUT_ADC), 849 X2(DSP_INL, DSP_IN_AC97), 850 X1(DSP_CST(0)), 851 X1(DSP_CST(0))); 852 emuxki_dsp_addop(sc, &pc, EMU_DSP_OP_ACC3, 853 X2(DSP_OUTR, DSP_OUT_ADC), 854 X2(DSP_INR, DSP_IN_AC97), 855 X1(DSP_CST(0)), 856 X1(DSP_CST(0))); 857 858 /* fill NOP the rest of the microcode */ 859 while (pc < 512) { 860 emuxki_dsp_addop(sc, &pc, EMU_DSP_OP_ACC3, 861 X1(DSP_CST(0)), 862 X1(DSP_CST(0)), 863 X1(DSP_CST(0)), 864 X1(DSP_CST(0))); 865 } 866 867 /* clear single step flag, run DSP */ 868 emuxki_write(sc, 0, X1(DBG), 0); 869 } 870 871 /* 872 * operations 873 */ 874 875 static void 876 emuxki_play_start(struct emuxki_softc *sc, int ch, uint32_t start, uint32_t end) 877 { 878 uint32_t pitch; 879 uint32_t volume; 880 881 /* 48kHz:16384 = 128/375 */ 882 pitch = sc->play.sample_rate * 128 / 375; 883 volume = 32767; 884 885 emuxki_write(sc, ch, EMU_CHAN_DSL, 886 (0 << 24) | /* send amound D = 0 */ 887 end); 888 889 emuxki_write(sc, ch, EMU_CHAN_PSST, 890 (0 << 24) | /* send amount C = 0 */ 891 start); 892 893 emuxki_write(sc, ch, EMU_CHAN_VTFT, 894 (volume << 16) | 895 (0xffff)); /* cutoff filter = none */ 896 897 emuxki_write(sc, ch, EMU_CHAN_CVCF, 898 (volume << 16) | 899 (0xffff)); /* cutoff filter = none */ 900 901 emuxki_write(sc, ch, EMU_CHAN_PTRX, 902 (pitch << 16) | 903 ((ch == 0 ? 0x7f : 0) << 8) | /* send amount A = 255,0(L) */ 904 ((ch == 0 ? 0 : 0x7f))); /* send amount B = 0,255(R) */ 905 906 /* set the pitch to start */ 907 emuxki_write(sc, ch, EMU_CHAN_CPF, 908 (pitch << 16) | 909 EMU_CHAN_CPF_STEREO_MASK); /* stereo only */ 910 } 911 912 static void 913 emuxki_play_stop(struct emuxki_softc *sc, int ch) 914 { 915 916 /* pitch = 0 to stop playing */ 917 emuxki_write(sc, ch, EMU_CHAN_CPF, EMU_CHAN_CPF_STOP_MASK); 918 /* volume = 0 */ 919 emuxki_write(sc, ch, EMU_CHAN_CVCF, 0); 920 } 921 922 static void 923 emuxki_timer_start(struct emuxki_softc *sc) 924 { 925 uint32_t timer; 926 927 /* frame count of half PTE at 16bit, 2ch, 48kHz */ 928 timer = EMU_PTESIZE / 4 / 2; 929 930 /* EMU_TIMER is 16bit register */ 931 emuxki_writeio_2(sc, EMU_TIMER, timer); 932 emuxki_writeio_4(sc, EMU_INTE, 933 emuxki_readio_4(sc, EMU_INTE) | 934 EMU_INTE_INTERTIMERENB); 935 DPRINTF("timer start\n"); 936 } 937 938 static void 939 emuxki_timer_stop(struct emuxki_softc *sc) 940 { 941 942 emuxki_writeio_4(sc, EMU_INTE, 943 emuxki_readio_4(sc, EMU_INTE) & 944 ~EMU_INTE_INTERTIMERENB); 945 /* EMU_TIMER is 16bit register */ 946 emuxki_writeio_2(sc, EMU_TIMER, 0); 947 DPRINTF("timer stop\n"); 948 } 949 950 /* 951 * audio interface 952 */ 953 954 static int 955 emuxki_open(void *hdl, int flags) 956 { 957 958 DPRINTF("%s for %s%s\n", __func__, 959 (flags & FWRITE) ? "P" : "", 960 (flags & FREAD) ? "R" : ""); 961 962 return 0; 963 } 964 965 static void 966 emuxki_close(void *hdl) 967 { 968 969 DPRINTF("%s\n", __func__); 970 } 971 972 static int 973 emuxki_query_format(void *hdl, audio_format_query_t *afp) 974 { 975 976 return audio_query_format(emuxki_formats, EMUXKI_NFORMATS, afp); 977 } 978 979 static int 980 emuxki_set_format(void *hdl, int setmode, 981 const audio_params_t *play, const audio_params_t *rec, 982 audio_filter_reg_t *pfil, audio_filter_reg_t *rfil) 983 { 984 struct emuxki_softc *sc = hdl; 985 986 if ((setmode & AUMODE_PLAY)) 987 sc->play = *play; 988 if ((setmode & AUMODE_RECORD)) 989 sc->rec = *rec; 990 return 0; 991 } 992 993 static int 994 emuxki_halt_output(void *hdl) 995 { 996 struct emuxki_softc *sc = hdl; 997 998 emuxki_timer_stop(sc); 999 emuxki_play_stop(sc, 0); 1000 emuxki_play_stop(sc, 1); 1001 return 0; 1002 } 1003 1004 static int 1005 emuxki_halt_input(void *hdl) 1006 { 1007 struct emuxki_softc *sc = hdl; 1008 1009 /* stop ADC */ 1010 emuxki_write(sc, 0, EMU_ADCCR, 0); 1011 1012 /* disable interrupt */ 1013 emuxki_writeio_4(sc, EMU_INTE, 1014 emuxki_readio_4(sc, EMU_INTE) & 1015 ~EMU_INTE_ADCBUFENABLE); 1016 1017 return 0; 1018 } 1019 1020 static int 1021 emuxki_intr(void *hdl) 1022 { 1023 struct emuxki_softc *sc = hdl; 1024 uint32_t ipr; 1025 uint32_t curaddr; 1026 int handled = 0; 1027 1028 mutex_spin_enter(&sc->sc_intr_lock); 1029 1030 ipr = emuxki_readio_4(sc, EMU_IPR); 1031 DPRINTFN(3, "emuxki: ipr=%08x\n", ipr); 1032 if (sc->pintr && (ipr & EMU_IPR_INTERVALTIMER)) { 1033 /* read ch 0 */ 1034 curaddr = emuxki_read(sc, 0, EMU_CHAN_CCCA) & 1035 EMU_CHAN_CCCA_CURRADDR_MASK; 1036 DPRINTFN(3, "curaddr=%08x\n", curaddr); 1037 curaddr *= sc->pframesize; 1038 1039 if (curaddr < sc->poffset) 1040 curaddr += sc->plength; 1041 if (curaddr >= sc->poffset + sc->pblksize) { 1042 dmamem_sync(sc->pmem, BUS_DMASYNC_POSTWRITE); 1043 sc->pintr(sc->pintrarg); 1044 sc->poffset += sc->pblksize; 1045 if (sc->poffset >= sc->plength) { 1046 sc->poffset -= sc->plength; 1047 } 1048 dmamem_sync(sc->pmem, BUS_DMASYNC_PREWRITE); 1049 } 1050 handled = 1; 1051 } 1052 1053 if (sc->rintr && 1054 (ipr & (EMU_IPR_ADCBUFHALFFULL | EMU_IPR_ADCBUFFULL))) { 1055 char *src; 1056 char *dst; 1057 1058 /* Record DMA buffer has just 2 blocks */ 1059 src = KERNADDR(sc->rmem); 1060 if (ipr & EMU_IPR_ADCBUFFULL) { 1061 /* 2nd block */ 1062 src += EMU_REC_DMABLKSIZE; 1063 } 1064 dst = (char *)sc->rptr + sc->rcurrent; 1065 1066 dmamem_sync(sc->rmem, BUS_DMASYNC_POSTREAD); 1067 memcpy(dst, src, EMU_REC_DMABLKSIZE); 1068 /* for next trans */ 1069 dmamem_sync(sc->rmem, BUS_DMASYNC_PREREAD); 1070 sc->rcurrent += EMU_REC_DMABLKSIZE; 1071 1072 if (sc->rcurrent >= sc->roffset + sc->rblksize) { 1073 sc->rintr(sc->rintrarg); 1074 sc->roffset += sc->rblksize; 1075 if (sc->roffset >= sc->rlength) { 1076 sc->roffset = 0; 1077 sc->rcurrent = 0; 1078 } 1079 } 1080 1081 handled = 1; 1082 } 1083 1084 #if defined(EMUXKI_DEBUG) 1085 if (!handled) { 1086 char buf[1024]; 1087 snprintb(buf, sizeof(buf), 1088 "\20" 1089 "\x19""RATETRCHANGE" 1090 "\x18""FXDSP" 1091 "\x17""FORCEINT" 1092 "\x16""PCIERROR" 1093 "\x15""VOLINCR" 1094 "\x14""VOLDECR" 1095 "\x13""MUTE" 1096 "\x12""MICBUFFULL" 1097 "\x11""MICBUFHALFFULL" 1098 "\x10""ADCBUFFULL" 1099 "\x0f""ADCBUFHALFFULL" 1100 "\x0e""EFXBUFFULL" 1101 "\x0d""EFXBUFHALFFULL" 1102 "\x0c""GPSPDIFSTCHANGE" 1103 "\x0b""CDROMSTCHANGE" 1104 /* INTERVALTIMER */ 1105 "\x09""MIDITRANSBUFE" 1106 "\x08""MIDIRECVBUFE" 1107 "\x07""CHANNELLOOP" 1108 , ipr); 1109 DPRINTF("unexpected intr: %s\n", buf); 1110 1111 /* for debugging (must not handle if !DEBUG) */ 1112 handled = 1; 1113 } 1114 #endif 1115 1116 /* Reset interrupt bit */ 1117 emuxki_writeio_4(sc, EMU_IPR, ipr); 1118 1119 mutex_spin_exit(&sc->sc_intr_lock); 1120 1121 /* Interrupt handler must return !=0 if handled */ 1122 return handled; 1123 } 1124 1125 static int 1126 emuxki_getdev(void *hdl, struct audio_device *dev) 1127 { 1128 struct emuxki_softc *sc = hdl; 1129 1130 *dev = sc->sc_audv; 1131 return 0; 1132 } 1133 1134 static int 1135 emuxki_set_port(void *hdl, mixer_ctrl_t *mctl) 1136 { 1137 struct emuxki_softc *sc = hdl; 1138 1139 return sc->codecif->vtbl->mixer_set_port(sc->codecif, mctl); 1140 } 1141 1142 static int 1143 emuxki_get_port(void *hdl, mixer_ctrl_t *mctl) 1144 { 1145 struct emuxki_softc *sc = hdl; 1146 1147 return sc->codecif->vtbl->mixer_get_port(sc->codecif, mctl); 1148 } 1149 1150 static int 1151 emuxki_query_devinfo(void *hdl, mixer_devinfo_t *minfo) 1152 { 1153 struct emuxki_softc *sc = hdl; 1154 1155 return sc->codecif->vtbl->query_devinfo(sc->codecif, minfo); 1156 } 1157 1158 static void * 1159 emuxki_allocm(void *hdl, int direction, size_t size) 1160 { 1161 struct emuxki_softc *sc = hdl; 1162 1163 if (direction == AUMODE_PLAY) { 1164 if (sc->pmem) { 1165 panic("pmem already allocated\n"); 1166 return NULL; 1167 } 1168 sc->pmem = dmamem_alloc(sc, size); 1169 return KERNADDR(sc->pmem); 1170 } else { 1171 /* rmem is fixed size internal DMA buffer */ 1172 if (sc->rmem) { 1173 panic("rmem already allocated\n"); 1174 return NULL; 1175 } 1176 /* rmem fixed size */ 1177 sc->rmem = dmamem_alloc(sc, EMU_REC_DMASIZE); 1178 1179 /* recording MI buffer is normal kmem, software trans. */ 1180 sc->rptr = kmem_alloc(size, KM_SLEEP); 1181 return sc->rptr; 1182 } 1183 } 1184 1185 static void 1186 emuxki_freem(void *hdl, void *ptr, size_t size) 1187 { 1188 struct emuxki_softc *sc = hdl; 1189 1190 if (sc->pmem && ptr == KERNADDR(sc->pmem)) { 1191 dmamem_free(sc->pmem); 1192 sc->pmem = NULL; 1193 } 1194 if (sc->rmem && ptr == sc->rptr) { 1195 dmamem_free(sc->rmem); 1196 sc->rmem = NULL; 1197 kmem_free(sc->rptr, size); 1198 sc->rptr = NULL; 1199 } 1200 } 1201 1202 /* 1203 * blocksize rounding to EMU_PTESIZE. It is for easy to drive. 1204 */ 1205 static int 1206 emuxki_round_blocksize(void *hdl, int blksize, 1207 int mode, const audio_params_t* param) 1208 { 1209 1210 /* 1211 * This is not necessary for recording, but symmetric for easy. 1212 * For recording buffer/block size requirements of hardware, 1213 * see EMU_RECBS_BUFSIZE_* 1214 */ 1215 if (blksize < EMU_PTESIZE) 1216 blksize = EMU_PTESIZE; 1217 return rounddown(blksize, EMU_PTESIZE); 1218 } 1219 1220 static size_t 1221 emuxki_round_buffersize(void *hdl, int direction, size_t bsize) 1222 { 1223 1224 /* This is not necessary for recording, but symmetric for easy */ 1225 if (bsize < EMU_MINPTE * EMU_PTESIZE) { 1226 bsize = EMU_MINPTE * EMU_PTESIZE; 1227 } else if (bsize > EMU_MAXPTE * EMU_PTESIZE) { 1228 bsize = EMU_MAXPTE * EMU_PTESIZE; 1229 } 1230 return roundup(bsize, EMU_PTESIZE); 1231 } 1232 1233 static int 1234 emuxki_get_props(void *hdl) 1235 { 1236 1237 return AUDIO_PROP_PLAYBACK | AUDIO_PROP_CAPTURE | 1238 AUDIO_PROP_INDEPENDENT | AUDIO_PROP_FULLDUPLEX; 1239 } 1240 1241 static int 1242 emuxki_trigger_output(void *hdl, void *start, void *end, int blksize, 1243 void (*intr)(void *), void *arg, const audio_params_t *params) 1244 { 1245 struct emuxki_softc *sc = hdl; 1246 int npage; 1247 uint32_t *kptb; 1248 bus_addr_t dpmem; 1249 int i; 1250 uint32_t hwstart; 1251 uint32_t hwend; 1252 1253 if (sc->pmem == NULL) 1254 panic("pmem == NULL\n"); 1255 if (start != KERNADDR(sc->pmem)) 1256 panic("start != KERNADDR(sc->pmem)\n"); 1257 1258 sc->pframesize = 4; /* channels * bit / 8 = 2*16/8=4 */ 1259 sc->pblksize = blksize; 1260 sc->plength = (char *)end - (char *)start; 1261 sc->poffset = 0; 1262 npage = roundup(sc->plength, EMU_PTESIZE); 1263 1264 kptb = KERNADDR(sc->ptb); 1265 dpmem = DMAADDR(sc->pmem); 1266 for (i = 0; i < npage; i++) { 1267 kptb[i] = htole32(dpmem << 1); 1268 dpmem += EMU_PTESIZE; 1269 } 1270 dmamem_sync(sc->ptb, BUS_DMASYNC_PREWRITE); 1271 1272 hwstart = 0; 1273 hwend = hwstart + sc->plength / sc->pframesize; 1274 1275 sc->pintr = intr; 1276 sc->pintrarg = arg; 1277 1278 dmamem_sync(sc->pmem, BUS_DMASYNC_PREWRITE); 1279 1280 emuxki_play_start(sc, 0, hwstart, hwend); 1281 emuxki_play_start(sc, 1, hwstart, hwend); 1282 1283 emuxki_timer_start(sc); 1284 1285 return 0; 1286 } 1287 1288 /* 1289 * Recording uses temporary buffer. Because it can use ADC_HALF/FULL 1290 * interrupts and this method doesn't conflict with playback. 1291 */ 1292 1293 static int 1294 emuxki_trigger_input(void *hdl, void *start, void *end, int blksize, 1295 void (*intr)(void *), void *arg, const audio_params_t *params) 1296 { 1297 struct emuxki_softc *sc = hdl; 1298 1299 if (sc->rmem == NULL) 1300 panic("rmem == NULL\n"); 1301 if (start != sc->rptr) 1302 panic("start != sc->rptr\n"); 1303 1304 sc->rframesize = 4; /* channels * bit / 8 = 2*16/8=4 */ 1305 sc->rblksize = blksize; 1306 sc->rlength = (char *)end - (char *)start; 1307 sc->roffset = 0; 1308 sc->rcurrent = 0; 1309 1310 sc->rintr = intr; 1311 sc->rintrarg = arg; 1312 1313 /* 1314 * Memo: 1315 * recording source is selected by AC97 1316 * AC97 input source routes to ADC by FX(DSP) 1317 * 1318 * Must keep following sequence order 1319 */ 1320 1321 /* first, stop ADC */ 1322 emuxki_write(sc, 0, EMU_ADCCR, 0); 1323 emuxki_write(sc, 0, EMU_ADCBA, 0); 1324 emuxki_write(sc, 0, EMU_ADCBS, 0); 1325 1326 dmamem_sync(sc->rmem, BUS_DMASYNC_PREREAD); 1327 1328 /* ADC interrupt enable */ 1329 emuxki_writeio_4(sc, EMU_INTE, 1330 emuxki_readio_4(sc, EMU_INTE) | 1331 EMU_INTE_ADCBUFENABLE); 1332 1333 /* ADC Enable */ 1334 /* stereo, 48kHz, enable */ 1335 emuxki_write(sc, 0, EMU_ADCCR, 1336 X1(ADCCR_LCHANENABLE) | X1(ADCCR_RCHANENABLE)); 1337 1338 /* ADC buffer address */ 1339 emuxki_write(sc, 0, X1(ADCIDX), 0); 1340 emuxki_write(sc, 0, EMU_ADCBA, DMAADDR(sc->rmem)); 1341 1342 /* ADC buffer size, to start */ 1343 emuxki_write(sc, 0, EMU_ADCBS, EMU_REC_BUFSIZE_RECBS); 1344 1345 return 0; 1346 } 1347 1348 static void 1349 emuxki_get_locks(void *hdl, kmutex_t **intr, kmutex_t **proc) 1350 { 1351 struct emuxki_softc *sc = hdl; 1352 1353 *intr = &sc->sc_intr_lock; 1354 *proc = &sc->sc_lock; 1355 } 1356 1357 /* 1358 * AC97 1359 */ 1360 1361 static int 1362 emuxki_ac97_init(struct emuxki_softc *sc) 1363 { 1364 1365 sc->hostif.arg = sc; 1366 sc->hostif.attach = emuxki_ac97_attach; 1367 sc->hostif.read = emuxki_ac97_read; 1368 sc->hostif.write = emuxki_ac97_write; 1369 sc->hostif.reset = emuxki_ac97_reset; 1370 sc->hostif.flags = emuxki_ac97_flags; 1371 return ac97_attach(&sc->hostif, sc->sc_dev, &sc->sc_lock); 1372 } 1373 1374 /* 1375 * AC97 callbacks 1376 */ 1377 1378 static int 1379 emuxki_ac97_attach(void *hdl, struct ac97_codec_if *codecif) 1380 { 1381 struct emuxki_softc *sc = hdl; 1382 1383 sc->codecif = codecif; 1384 return 0; 1385 } 1386 1387 static int 1388 emuxki_ac97_read(void *hdl, uint8_t reg, uint16_t *val) 1389 { 1390 struct emuxki_softc *sc = hdl; 1391 1392 mutex_spin_enter(&sc->sc_index_lock); 1393 emuxki_writeio_1(sc, EMU_AC97ADDR, reg); 1394 *val = emuxki_readio_2(sc, EMU_AC97DATA); 1395 mutex_spin_exit(&sc->sc_index_lock); 1396 1397 return 0; 1398 } 1399 1400 static int 1401 emuxki_ac97_write(void *hdl, uint8_t reg, uint16_t val) 1402 { 1403 struct emuxki_softc *sc = hdl; 1404 1405 mutex_spin_enter(&sc->sc_index_lock); 1406 emuxki_writeio_1(sc, EMU_AC97ADDR, reg); 1407 emuxki_writeio_2(sc, EMU_AC97DATA, val); 1408 mutex_spin_exit(&sc->sc_index_lock); 1409 1410 return 0; 1411 } 1412 1413 static int 1414 emuxki_ac97_reset(void *hdl) 1415 { 1416 1417 return 0; 1418 } 1419 1420 static enum ac97_host_flags 1421 emuxki_ac97_flags(void *hdl) 1422 { 1423 1424 return AC97_HOST_SWAPPED_CHANNELS; 1425 } 1426