1 /* $NetBSD: emuxki.c,v 1.71 2021/02/06 05:15:03 isaki Exp $ */ 2 3 /*- 4 * Copyright (c) 2001, 2007 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Yannick Montulet, and by Andrew Doran. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * EMU10K1 single voice driver 34 * o. only 1 voice playback, 1 recording 35 * o. only s16le 2ch 48k 36 * This makes it simple to control buffers and interrupts 37 * while satisfying playback and recording quality. 38 */ 39 40 #include <sys/cdefs.h> 41 __KERNEL_RCSID(0, "$NetBSD: emuxki.c,v 1.71 2021/02/06 05:15:03 isaki Exp $"); 42 43 #include <sys/param.h> 44 #include <sys/device.h> 45 #include <sys/errno.h> 46 #include <sys/systm.h> 47 #include <sys/audioio.h> 48 #include <sys/mutex.h> 49 #include <sys/kmem.h> 50 #include <sys/malloc.h> 51 #include <sys/fcntl.h> 52 53 #include <sys/bus.h> 54 #include <sys/intr.h> 55 56 #include <dev/audio/audio_if.h> 57 58 #include <dev/ic/ac97reg.h> 59 #include <dev/ic/ac97var.h> 60 61 #include <dev/pci/pcidevs.h> 62 #include <dev/pci/pcireg.h> 63 #include <dev/pci/pcivar.h> 64 65 #include <dev/pci/emuxkireg.h> 66 67 /* #define EMUXKI_DEBUG 1 */ 68 #ifdef EMUXKI_DEBUG 69 #define emudebug EMUXKI_DEBUG 70 # define DPRINTF(fmt...) do { if (emudebug) printf(fmt); } while (0) 71 # define DPRINTFN(n,fmt...) do { if (emudebug>=(n)) printf(fmt); } while (0) 72 #else 73 # define DPRINTF(fmt...) __nothing 74 # define DPRINTFN(n,fmt...) __nothing 75 #endif 76 77 /* 78 * PCI 79 * Note: emuxki's page table entry uses only 31bit addressing. 80 * (Maybe, later chip has 32bit mode, but it isn't used now.) 81 */ 82 83 #define EMU_PCI_CBIO (0x10) 84 #define EMU_SUBSYS_APS (0x40011102) 85 86 #define EMU_PTESIZE (4096) 87 #define EMU_MINPTE (3) 88 /* 89 * Hardware limit of PTE is 4096 entry but it's too big for single voice. 90 * Reasonable candidate is: 91 * 48kHz * 2ch * 2byte * 1sec * 3buf/EMU_PTESIZE = 141 92 * and then round it up to 2^n. 93 */ 94 #define EMU_MAXPTE (256) 95 #define EMU_NUMCHAN (64) 96 97 /* 98 * Internal recording DMA buffer 99 */ 100 /* Recommend the same size as EMU_PTESIZE to be symmetrical for play/rec */ 101 #define EMU_REC_DMABLKSIZE (4096) 102 /* must be EMU_REC_DMABLKSIZE * 2 */ 103 #define EMU_REC_DMASIZE (8192) 104 /* must be EMU_RECBS_BUFSIZE_(EMU_REC_DMASIZE) */ 105 #define EMU_REC_BUFSIZE_RECBS EMU_RECBS_BUFSIZE_8192 106 107 /* 108 * DMA memory management 109 */ 110 111 #define EMU_DMA_ALIGN (4096) 112 #define EMU_DMA_NSEGS (1) 113 114 struct dmamem { 115 bus_dma_tag_t dmat; 116 bus_size_t size; 117 bus_size_t align; 118 bus_size_t bound; 119 bus_dma_segment_t *segs; 120 int nsegs; 121 int rsegs; 122 void * kaddr; 123 bus_dmamap_t map; 124 }; 125 126 #define KERNADDR(ptr) ((void *)((ptr)->kaddr)) 127 /* 128 * (ptr)->segs[] is CPU's PA translated by CPU's MMU. 129 * (ptr)->map->dm_segs[] is PCI device's PA translated by PCI's MMU. 130 */ 131 #define DMASEGADDR(ptr, segno) ((ptr)->map->dm_segs[segno].ds_addr) 132 #define DMAADDR(ptr) DMASEGADDR(ptr, 0) 133 #define DMASIZE(ptr) ((ptr)->size) 134 135 struct emuxki_softc { 136 device_t sc_dev; 137 device_t sc_audev; 138 enum { 139 EMUXKI_SBLIVE = 0x00, 140 EMUXKI_AUDIGY = 0x01, 141 EMUXKI_AUDIGY2 = 0x02, 142 EMUXKI_LIVE_5_1 = 0x04, 143 EMUXKI_APS = 0x08 144 } sc_type; 145 audio_device_t sc_audv; /* for GETDEV */ 146 147 /* Autoconfig parameters */ 148 bus_space_tag_t sc_iot; 149 bus_space_handle_t sc_ioh; 150 bus_addr_t sc_iob; 151 bus_size_t sc_ios; 152 pci_chipset_tag_t sc_pc; /* PCI tag */ 153 bus_dma_tag_t sc_dmat; 154 void *sc_ih; /* interrupt handler */ 155 kmutex_t sc_intr_lock; 156 kmutex_t sc_lock; 157 kmutex_t sc_index_lock; 158 159 /* register parameters */ 160 struct dmamem *ptb; /* page table */ 161 162 struct dmamem *pmem; /* play memory */ 163 void (*pintr)(void *); 164 void *pintrarg; 165 audio_params_t play; 166 int pframesize; 167 int pblksize; 168 int plength; 169 int poffset; 170 171 struct dmamem *rmem; /* rec internal memory */ 172 void (*rintr)(void *); 173 void *rintrarg; 174 audio_params_t rec; 175 void *rptr; /* rec MI ptr */ 176 int rcurrent; /* rec software trans count */ 177 int rframesize; 178 int rblksize; 179 int rlength; 180 int roffset; 181 182 /* others */ 183 184 struct ac97_host_if hostif; 185 struct ac97_codec_if *codecif; 186 }; 187 188 /* blackmagic */ 189 #define X1(x) ((sc->sc_type & EMUXKI_AUDIGY) ? EMU_A_##x : EMU_##x) 190 #define X2(x, y) ((sc->sc_type & EMUXKI_AUDIGY) \ 191 ? EMU_A_##x(EMU_A_##y) : EMU_##x(EMU_##y)) 192 #define EMU_A_DSP_FX EMU_DSP_FX 193 #define EMU_A_DSP_IN_AC97 EMU_DSP_IN_AC97 194 195 /* prototypes */ 196 static struct dmamem *dmamem_alloc(struct emuxki_softc *, size_t); 197 static void dmamem_free(struct dmamem *); 198 static void dmamem_sync(struct dmamem *, int); 199 static uint8_t emuxki_readio_1(struct emuxki_softc *, int) __unused; 200 static uint16_t emuxki_readio_2(struct emuxki_softc *, int); 201 static uint32_t emuxki_readio_4(struct emuxki_softc *, int); 202 static void emuxki_writeio_1(struct emuxki_softc *, int, uint8_t); 203 static void emuxki_writeio_2(struct emuxki_softc *, int, uint16_t); 204 static void emuxki_writeio_4(struct emuxki_softc *, int, uint32_t); 205 static uint32_t emuxki_readptr(struct emuxki_softc *, int, int, int); 206 static void emuxki_writeptr(struct emuxki_softc *, int, int, int, uint32_t); 207 static uint32_t emuxki_read(struct emuxki_softc *, int, int); 208 static void emuxki_write(struct emuxki_softc *, int, int, uint32_t); 209 static int emuxki_match(device_t, cfdata_t, void *); 210 static void emuxki_attach(device_t, device_t, void *); 211 static int emuxki_detach(device_t, int); 212 static int emuxki_init(struct emuxki_softc *); 213 static void emuxki_dsp_addop(struct emuxki_softc *, uint16_t *, uint8_t, 214 uint16_t, uint16_t, uint16_t, uint16_t); 215 static void emuxki_initfx(struct emuxki_softc *); 216 static void emuxki_play_start(struct emuxki_softc *, int, uint32_t, 217 uint32_t); 218 static void emuxki_play_stop(struct emuxki_softc *, int); 219 220 static int emuxki_query_format(void *, audio_format_query_t *); 221 static int emuxki_set_format(void *, int, 222 const audio_params_t *, const audio_params_t *, 223 audio_filter_reg_t *, audio_filter_reg_t *); 224 static int emuxki_halt_output(void *); 225 static int emuxki_halt_input(void *); 226 static int emuxki_intr(void *); 227 static int emuxki_getdev(void *, struct audio_device *); 228 static int emuxki_set_port(void *, mixer_ctrl_t *); 229 static int emuxki_get_port(void *, mixer_ctrl_t *); 230 static int emuxki_query_devinfo(void *, mixer_devinfo_t *); 231 static void *emuxki_allocm(void *, int, size_t); 232 static void emuxki_freem(void *, void *, size_t); 233 static int emuxki_round_blocksize(void *, int, int, 234 const audio_params_t *); 235 static size_t emuxki_round_buffersize(void *, int, size_t); 236 static int emuxki_get_props(void *); 237 static int emuxki_trigger_output(void *, void *, void *, int, 238 void (*)(void *), void *, const audio_params_t *); 239 static int emuxki_trigger_input(void *, void *, void *, int, 240 void (*)(void *), void *, const audio_params_t *); 241 static void emuxki_get_locks(void *, kmutex_t **, kmutex_t **); 242 243 static int emuxki_ac97_init(struct emuxki_softc *); 244 static int emuxki_ac97_attach(void *, struct ac97_codec_if *); 245 static int emuxki_ac97_read(void *, uint8_t, uint16_t *); 246 static int emuxki_ac97_write(void *, uint8_t, uint16_t); 247 static int emuxki_ac97_reset(void *); 248 static enum ac97_host_flags emuxki_ac97_flags(void *); 249 250 251 CFATTACH_DECL_NEW(emuxki, sizeof(struct emuxki_softc), 252 emuxki_match, emuxki_attach, emuxki_detach, NULL); 253 254 static const struct audio_hw_if emuxki_hw_if = { 255 .query_format = emuxki_query_format, 256 .set_format = emuxki_set_format, 257 .round_blocksize = emuxki_round_blocksize, 258 .halt_output = emuxki_halt_output, 259 .halt_input = emuxki_halt_input, 260 .getdev = emuxki_getdev, 261 .set_port = emuxki_set_port, 262 .get_port = emuxki_get_port, 263 .query_devinfo = emuxki_query_devinfo, 264 .allocm = emuxki_allocm, 265 .freem = emuxki_freem, 266 .round_buffersize = emuxki_round_buffersize, 267 .get_props = emuxki_get_props, 268 .trigger_output = emuxki_trigger_output, 269 .trigger_input = emuxki_trigger_input, 270 .get_locks = emuxki_get_locks, 271 }; 272 273 static const struct audio_format emuxki_formats[] = { 274 { 275 .mode = AUMODE_PLAY | AUMODE_RECORD, 276 .encoding = AUDIO_ENCODING_SLINEAR_LE, 277 .validbits = 16, 278 .precision = 16, 279 .channels = 2, 280 .channel_mask = AUFMT_STEREO, 281 .frequency_type = 1, 282 .frequency = { 48000 }, 283 } 284 }; 285 #define EMUXKI_NFORMATS __arraycount(emuxki_formats) 286 287 /* 288 * dma memory 289 */ 290 291 static struct dmamem * 292 dmamem_alloc(struct emuxki_softc *sc, size_t size) 293 { 294 struct dmamem *mem; 295 296 KASSERT(!mutex_owned(&sc->sc_intr_lock)); 297 298 /* Allocate memory for structure */ 299 mem = kmem_alloc(sizeof(*mem), KM_SLEEP); 300 mem->dmat = sc->sc_dmat; 301 mem->size = size; 302 mem->align = EMU_DMA_ALIGN; 303 mem->nsegs = EMU_DMA_NSEGS; 304 mem->bound = 0; 305 306 mem->segs = kmem_alloc(mem->nsegs * sizeof(*(mem->segs)), KM_SLEEP); 307 308 if (bus_dmamem_alloc(mem->dmat, mem->size, mem->align, mem->bound, 309 mem->segs, mem->nsegs, &mem->rsegs, BUS_DMA_WAITOK)) { 310 device_printf(sc->sc_dev, 311 "%s bus_dmamem_alloc failed\n", __func__); 312 goto memfree; 313 } 314 315 if (bus_dmamem_map(mem->dmat, mem->segs, mem->nsegs, mem->size, 316 &mem->kaddr, BUS_DMA_WAITOK | BUS_DMA_COHERENT)) { 317 device_printf(sc->sc_dev, 318 "%s bus_dmamem_map failed\n", __func__); 319 goto free; 320 } 321 322 if (bus_dmamap_create(mem->dmat, mem->size, mem->nsegs, mem->size, 323 mem->bound, BUS_DMA_WAITOK, &mem->map)) { 324 device_printf(sc->sc_dev, 325 "%s bus_dmamap_create failed\n", __func__); 326 goto unmap; 327 } 328 329 if (bus_dmamap_load(mem->dmat, mem->map, mem->kaddr, 330 mem->size, NULL, BUS_DMA_WAITOK)) { 331 device_printf(sc->sc_dev, 332 "%s bus_dmamap_load failed\n", __func__); 333 goto destroy; 334 } 335 336 return mem; 337 338 destroy: 339 bus_dmamap_destroy(mem->dmat, mem->map); 340 unmap: 341 bus_dmamem_unmap(mem->dmat, mem->kaddr, mem->size); 342 free: 343 bus_dmamem_free(mem->dmat, mem->segs, mem->nsegs); 344 memfree: 345 kmem_free(mem->segs, mem->nsegs * sizeof(*(mem->segs))); 346 kmem_free(mem, sizeof(*mem)); 347 348 return NULL; 349 } 350 351 static void 352 dmamem_free(struct dmamem *mem) 353 { 354 355 bus_dmamap_unload(mem->dmat, mem->map); 356 bus_dmamap_destroy(mem->dmat, mem->map); 357 bus_dmamem_unmap(mem->dmat, mem->kaddr, mem->size); 358 bus_dmamem_free(mem->dmat, mem->segs, mem->nsegs); 359 360 kmem_free(mem->segs, mem->nsegs * sizeof(*(mem->segs))); 361 kmem_free(mem, sizeof(*mem)); 362 } 363 364 static void 365 dmamem_sync(struct dmamem *mem, int ops) 366 { 367 368 bus_dmamap_sync(mem->dmat, mem->map, 0, mem->size, ops); 369 } 370 371 372 /* 373 * I/O register access 374 */ 375 376 static uint8_t 377 emuxki_readio_1(struct emuxki_softc *sc, int addr) 378 { 379 380 return bus_space_read_1(sc->sc_iot, sc->sc_ioh, addr); 381 } 382 383 static void 384 emuxki_writeio_1(struct emuxki_softc *sc, int addr, uint8_t data) 385 { 386 387 bus_space_write_1(sc->sc_iot, sc->sc_ioh, addr, data); 388 } 389 390 static uint16_t 391 emuxki_readio_2(struct emuxki_softc *sc, int addr) 392 { 393 394 return bus_space_read_2(sc->sc_iot, sc->sc_ioh, addr); 395 } 396 397 static void 398 emuxki_writeio_2(struct emuxki_softc *sc, int addr, uint16_t data) 399 { 400 401 bus_space_write_2(sc->sc_iot, sc->sc_ioh, addr, data); 402 } 403 404 static uint32_t 405 emuxki_readio_4(struct emuxki_softc *sc, int addr) 406 { 407 408 return bus_space_read_4(sc->sc_iot, sc->sc_ioh, addr); 409 } 410 411 static void 412 emuxki_writeio_4(struct emuxki_softc *sc, int addr, uint32_t data) 413 { 414 415 bus_space_write_4(sc->sc_iot, sc->sc_ioh, addr, data); 416 } 417 418 static uint32_t 419 emuxki_readptr(struct emuxki_softc *sc, int aptr, int dptr, int addr) 420 { 421 uint32_t data; 422 423 mutex_spin_enter(&sc->sc_index_lock); 424 emuxki_writeio_4(sc, aptr, addr); 425 data = emuxki_readio_4(sc, dptr); 426 mutex_spin_exit(&sc->sc_index_lock); 427 return data; 428 } 429 430 static void 431 emuxki_writeptr(struct emuxki_softc *sc, int aptr, int dptr, int addr, 432 uint32_t data) 433 { 434 435 mutex_spin_enter(&sc->sc_index_lock); 436 emuxki_writeio_4(sc, aptr, addr); 437 emuxki_writeio_4(sc, dptr, data); 438 mutex_spin_exit(&sc->sc_index_lock); 439 } 440 441 static uint32_t 442 emuxki_read(struct emuxki_softc *sc, int ch, int addr) 443 { 444 445 /* Original HENTAI addressing is never supported. */ 446 KASSERT((addr & 0xff000000) == 0); 447 448 return emuxki_readptr(sc, EMU_PTR, EMU_DATA, (addr << 16) + ch); 449 } 450 451 static void 452 emuxki_write(struct emuxki_softc *sc, int ch, int addr, uint32_t data) 453 { 454 455 /* Original HENTAI addressing is never supported. */ 456 KASSERT((addr & 0xff000000) == 0); 457 458 emuxki_writeptr(sc, EMU_PTR, EMU_DATA, (addr << 16) + ch, data); 459 } 460 461 /* 462 * MD driver 463 */ 464 465 static int 466 emuxki_match(device_t parent, cfdata_t match, void *aux) 467 { 468 struct pci_attach_args *pa; 469 470 pa = aux; 471 if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_CREATIVELABS) 472 return 0; 473 474 switch (PCI_PRODUCT(pa->pa_id)) { 475 case PCI_PRODUCT_CREATIVELABS_SBLIVE: 476 case PCI_PRODUCT_CREATIVELABS_SBLIVE2: 477 case PCI_PRODUCT_CREATIVELABS_AUDIGY: 478 return 1; 479 default: 480 return 0; 481 } 482 } 483 484 static void 485 emuxki_attach(device_t parent, device_t self, void *aux) 486 { 487 struct emuxki_softc *sc; 488 struct pci_attach_args *pa; 489 pci_intr_handle_t ih; 490 const char *intrstr; 491 char intrbuf[PCI_INTRSTR_LEN]; 492 pcireg_t reg; 493 494 sc = device_private(self); 495 sc->sc_dev = self; 496 pa = aux; 497 498 pci_aprint_devinfo(pa, "Audio controller"); 499 DPRINTF("dmat=%p\n", (char *)pa->pa_dmat); 500 501 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_NONE); 502 mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_AUDIO); 503 mutex_init(&sc->sc_index_lock, MUTEX_DEFAULT, IPL_AUDIO); 504 505 sc->sc_pc = pa->pa_pc; 506 sc->sc_dmat = pa->pa_dmat; 507 508 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 509 reg |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MASTER_ENABLE | 510 PCI_COMMAND_MEM_ENABLE; 511 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, reg); 512 513 if (pci_mapreg_map(pa, EMU_PCI_CBIO, PCI_MAPREG_TYPE_IO, 0, 514 &sc->sc_iot, &sc->sc_ioh, &sc->sc_iob, &sc->sc_ios)) { 515 aprint_error(": can't map iospace\n"); 516 return; 517 } 518 519 if (pci_intr_map(pa, &ih)) { 520 aprint_error_dev(self, "couldn't map interrupt\n"); 521 goto unmap; 522 } 523 524 intrstr = pci_intr_string(pa->pa_pc, ih, intrbuf, sizeof(intrbuf)); 525 sc->sc_ih = pci_intr_establish_xname(pa->pa_pc, ih, IPL_AUDIO, 526 emuxki_intr, sc, device_xname(self)); 527 if (sc->sc_ih == NULL) { 528 aprint_error_dev(self, "couldn't establish interrupt"); 529 if (intrstr != NULL) 530 aprint_error(" at %s", intrstr); 531 aprint_error("\n"); 532 goto unmap; 533 } 534 aprint_normal_dev(self, "interrupting at %s\n", intrstr); 535 536 /* XXX it's unknown whether APS is made from Audigy as well */ 537 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CREATIVELABS_AUDIGY) { 538 sc->sc_type = EMUXKI_AUDIGY; 539 if (PCI_REVISION(pa->pa_class) == 0x04) { 540 sc->sc_type |= EMUXKI_AUDIGY2; 541 strlcpy(sc->sc_audv.name, "Audigy2", 542 sizeof(sc->sc_audv.name)); 543 } else { 544 strlcpy(sc->sc_audv.name, "Audigy", 545 sizeof(sc->sc_audv.name)); 546 } 547 } else if (pci_conf_read(pa->pa_pc, pa->pa_tag, 548 PCI_SUBSYS_ID_REG) == EMU_SUBSYS_APS) { 549 sc->sc_type = EMUXKI_APS; 550 strlcpy(sc->sc_audv.name, "E-mu APS", sizeof(sc->sc_audv.name)); 551 } else { 552 sc->sc_type = EMUXKI_SBLIVE; 553 strlcpy(sc->sc_audv.name, "SB Live!", sizeof(sc->sc_audv.name)); 554 } 555 snprintf(sc->sc_audv.version, sizeof(sc->sc_audv.version), "0x%02x", 556 PCI_REVISION(pa->pa_class)); 557 strlcpy(sc->sc_audv.config, "emuxki", sizeof(sc->sc_audv.config)); 558 559 if (emuxki_init(sc)) { 560 aprint_error("emuxki_init error\n"); 561 goto intrdis; 562 } 563 if (emuxki_ac97_init(sc)) { 564 aprint_error("emuxki_ac97_init error\n"); 565 goto intrdis; 566 } 567 568 sc->sc_audev = audio_attach_mi(&emuxki_hw_if, sc, self); 569 if (sc->sc_audev == NULL) { 570 aprint_error("audio_attach_mi error\n"); 571 goto intrdis; 572 } 573 574 return; 575 576 intrdis: 577 pci_intr_disestablish(sc->sc_pc, sc->sc_ih); 578 unmap: 579 bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios); 580 return; 581 } 582 583 static int 584 emuxki_detach(device_t self, int flags) 585 { 586 struct emuxki_softc *sc; 587 588 sc = device_private(self); 589 if (sc->sc_audev != NULL) /* Test in case audio didn't attach */ 590 config_detach(sc->sc_audev, 0); 591 592 /* All voices should be stopped now but add some code here if not */ 593 emuxki_writeio_4(sc, EMU_HCFG, 594 EMU_HCFG_LOCKSOUNDCACHE | 595 EMU_HCFG_LOCKTANKCACHE_MASK | 596 EMU_HCFG_MUTEBUTTONENABLE); 597 emuxki_writeio_4(sc, EMU_INTE, 0); 598 599 /* Disable any Channels interrupts */ 600 emuxki_write(sc, 0, EMU_CLIEL, 0); 601 emuxki_write(sc, 0, EMU_CLIEH, 0); 602 emuxki_write(sc, 0, EMU_SOLEL, 0); 603 emuxki_write(sc, 0, EMU_SOLEH, 0); 604 605 /* stop DSP */ 606 emuxki_write(sc, 0, X1(DBG), X1(DBG_SINGLE_STEP)); 607 608 dmamem_free(sc->ptb); 609 610 pci_intr_disestablish(sc->sc_pc, sc->sc_ih); 611 bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_ios); 612 613 mutex_destroy(&sc->sc_lock); 614 mutex_destroy(&sc->sc_intr_lock); 615 mutex_destroy(&sc->sc_index_lock); 616 617 return 0; 618 } 619 620 static int 621 emuxki_init(struct emuxki_softc *sc) 622 { 623 int i; 624 uint32_t spcs; 625 uint32_t hcfg; 626 627 /* clear AUDIO bit */ 628 emuxki_writeio_4(sc, EMU_HCFG, 629 EMU_HCFG_LOCKSOUNDCACHE | 630 EMU_HCFG_LOCKTANKCACHE_MASK | 631 EMU_HCFG_MUTEBUTTONENABLE); 632 633 /* mask interrupt without PCIERR */ 634 emuxki_writeio_4(sc, EMU_INTE, 635 EMU_INTE_SAMPLERATER | /* always on this bit */ 636 EMU_INTE_PCIERRENABLE); 637 638 /* disable all channel interrupt */ 639 emuxki_write(sc, 0, EMU_CLIEL, 0); 640 emuxki_write(sc, 0, EMU_CLIEH, 0); 641 emuxki_write(sc, 0, EMU_SOLEL, 0); 642 emuxki_write(sc, 0, EMU_SOLEH, 0); 643 644 /* Set recording buffers sizes to zero */ 645 emuxki_write(sc, 0, EMU_MICBS, EMU_RECBS_BUFSIZE_NONE); 646 emuxki_write(sc, 0, EMU_MICBA, 0); 647 emuxki_write(sc, 0, EMU_FXBS, EMU_RECBS_BUFSIZE_NONE); 648 emuxki_write(sc, 0, EMU_FXBA, 0); 649 emuxki_write(sc, 0, EMU_ADCBS, EMU_RECBS_BUFSIZE_NONE); 650 emuxki_write(sc, 0, EMU_ADCBA, 0); 651 652 if(sc->sc_type & EMUXKI_AUDIGY) { 653 emuxki_write(sc, 0, EMU_SPBYPASS, EMU_SPBYPASS_24_BITS); 654 emuxki_write(sc, 0, EMU_AC97SLOT, 655 EMU_AC97SLOT_CENTER | EMU_AC97SLOT_LFE); 656 } 657 658 /* Initialize all channels to stopped and no effects */ 659 for (i = 0; i < EMU_NUMCHAN; i++) { 660 emuxki_write(sc, i, EMU_CHAN_DCYSUSV, 0x7f7f); 661 emuxki_write(sc, i, EMU_CHAN_IP, EMU_CHAN_IP_UNITY); 662 emuxki_write(sc, i, EMU_CHAN_VTFT, 0xffff); 663 emuxki_write(sc, i, EMU_CHAN_CVCF, 0xffff); 664 emuxki_write(sc, i, EMU_CHAN_PTRX, 0); 665 emuxki_write(sc, i, EMU_CHAN_CPF, 0); 666 emuxki_write(sc, i, EMU_CHAN_CCR, 0); 667 emuxki_write(sc, i, EMU_CHAN_PSST, 0); 668 emuxki_write(sc, i, EMU_CHAN_DSL, 0); 669 emuxki_write(sc, i, EMU_CHAN_CCCA, EMU_CHAN_CCCA_INTERPROM_1); 670 emuxki_write(sc, i, EMU_CHAN_Z1, 0); 671 emuxki_write(sc, i, EMU_CHAN_Z2, 0); 672 emuxki_write(sc, i, EMU_CHAN_MAPA, 0xffffffff); 673 emuxki_write(sc, i, EMU_CHAN_MAPB, 0xffffffff); 674 emuxki_write(sc, i, EMU_CHAN_FXRT, 0x32100000); 675 emuxki_write(sc, i, EMU_CHAN_ATKHLDM, 0); 676 emuxki_write(sc, i, EMU_CHAN_DCYSUSM, 0); 677 emuxki_write(sc, i, EMU_CHAN_IFATN, 0xffff); 678 emuxki_write(sc, i, EMU_CHAN_PEFE, 0x007f); 679 emuxki_write(sc, i, EMU_CHAN_FMMOD, 0); 680 emuxki_write(sc, i, EMU_CHAN_TREMFRQ, 0); 681 emuxki_write(sc, i, EMU_CHAN_FM2FRQ2, 0); 682 emuxki_write(sc, i, EMU_CHAN_TEMPENV, 0); 683 684 /* these are last so OFF prevents writing */ 685 emuxki_write(sc, i, EMU_CHAN_LFOVAL2, 0x8000); 686 emuxki_write(sc, i, EMU_CHAN_LFOVAL1, 0x8000); 687 emuxki_write(sc, i, EMU_CHAN_ATKHLDV, 0x7f7f); 688 emuxki_write(sc, i, EMU_CHAN_ENVVOL, 0); 689 emuxki_write(sc, i, EMU_CHAN_ENVVAL, 0x8000); 690 } 691 692 /* set digital outputs format */ 693 spcs = EMU_SPCS_CLKACCY_1000PPM | 694 EMU_SPCS_SAMPLERATE_48 | 695 EMU_SPCS_CHANNELNUM_LEFT | 696 EMU_SPCS_SOURCENUM_UNSPEC | 697 EMU_SPCS_GENERATIONSTATUS | 698 0x00001200 /* Cat code. */ | 699 0x00000000 /* IEC-958 Mode */ | 700 EMU_SPCS_EMPHASIS_NONE | 701 EMU_SPCS_COPYRIGHT; 702 emuxki_write(sc, 0, EMU_SPCS0, spcs); 703 emuxki_write(sc, 0, EMU_SPCS1, spcs); 704 emuxki_write(sc, 0, EMU_SPCS2, spcs); 705 706 if (sc->sc_type & EMUXKI_AUDIGY2) { 707 emuxki_write(sc, 0, EMU_A2_SPDIF_SAMPLERATE, 708 EMU_A2_SPDIF_UNKNOWN); 709 710 emuxki_writeptr(sc, EMU_A2_PTR, EMU_A2_DATA, EMU_A2_SRCSEL, 711 EMU_A2_SRCSEL_ENABLE_SPDIF | EMU_A2_SRCSEL_ENABLE_SRCMULTI); 712 713 emuxki_writeptr(sc, EMU_A2_PTR, EMU_A2_DATA, EMU_A2_SRCMULTI, 714 EMU_A2_SRCMULTI_ENABLE_INPUT); 715 } 716 717 /* page table */ 718 sc->ptb = dmamem_alloc(sc, EMU_MAXPTE * sizeof(uint32_t)); 719 if (sc->ptb == NULL) { 720 device_printf(sc->sc_dev, "ptb allocation error\n"); 721 return ENOMEM; 722 } 723 emuxki_write(sc, 0, EMU_PTB, DMAADDR(sc->ptb)); 724 725 emuxki_write(sc, 0, EMU_TCBS, 0); /* This means 16K TCB */ 726 emuxki_write(sc, 0, EMU_TCB, 0); /* No TCB use for now */ 727 728 /* Let's play with sound processor */ 729 emuxki_initfx(sc); 730 731 /* enable interrupt */ 732 emuxki_writeio_4(sc, EMU_INTE, 733 emuxki_readio_4(sc, EMU_INTE) | 734 EMU_INTE_VOLINCRENABLE | 735 EMU_INTE_VOLDECRENABLE | 736 EMU_INTE_MUTEENABLE); 737 738 if (sc->sc_type & EMUXKI_AUDIGY2) { 739 emuxki_writeio_4(sc, EMU_A_IOCFG, 740 emuxki_readio_4(sc, EMU_A_IOCFG) | 741 EMU_A_IOCFG_GPOUT0); 742 } 743 744 /* enable AUDIO bit */ 745 hcfg = EMU_HCFG_AUDIOENABLE | EMU_HCFG_AUTOMUTE; 746 747 if (sc->sc_type & EMUXKI_AUDIGY2) { 748 hcfg |= EMU_HCFG_AC3ENABLE_CDSPDIF | 749 EMU_HCFG_AC3ENABLE_GPSPDIF; 750 } else if (sc->sc_type & EMUXKI_AUDIGY) { 751 } else { 752 hcfg |= EMU_HCFG_LOCKTANKCACHE_MASK; 753 } 754 /* joystick not supported now */ 755 emuxki_writeio_4(sc, EMU_HCFG, hcfg); 756 757 return 0; 758 } 759 760 /* 761 * dsp programming 762 */ 763 764 static void 765 emuxki_dsp_addop(struct emuxki_softc *sc, uint16_t *pc, uint8_t op, 766 uint16_t r, uint16_t a, uint16_t x, uint16_t y) 767 { 768 uint32_t loword; 769 uint32_t hiword; 770 int reg; 771 772 if (sc->sc_type & EMUXKI_AUDIGY) { 773 reg = EMU_A_MICROCODEBASE; 774 loword = (x << 12) & EMU_A_DSP_LOWORD_OPX_MASK; 775 loword |= y & EMU_A_DSP_LOWORD_OPY_MASK; 776 hiword = (op << 24) & EMU_A_DSP_HIWORD_OPCODE_MASK; 777 hiword |= (r << 12) & EMU_A_DSP_HIWORD_RESULT_MASK; 778 hiword |= a & EMU_A_DSP_HIWORD_OPA_MASK; 779 } else { 780 reg = EMU_MICROCODEBASE; 781 loword = (x << 10) & EMU_DSP_LOWORD_OPX_MASK; 782 loword |= y & EMU_DSP_LOWORD_OPY_MASK; 783 hiword = (op << 20) & EMU_DSP_HIWORD_OPCODE_MASK; 784 hiword |= (r << 10) & EMU_DSP_HIWORD_RESULT_MASK; 785 hiword |= a & EMU_DSP_HIWORD_OPA_MASK; 786 } 787 788 reg += (*pc) * 2; 789 /* must ordering; lo, hi */ 790 emuxki_write(sc, 0, reg, loword); 791 emuxki_write(sc, 0, reg + 1, hiword); 792 793 (*pc)++; 794 } 795 796 static void 797 emuxki_initfx(struct emuxki_softc *sc) 798 { 799 uint16_t pc; 800 801 /* Set all GPRs to 0 */ 802 for (pc = 0; pc < 256; pc++) 803 emuxki_write(sc, 0, EMU_DSP_GPR(pc), 0); 804 for (pc = 0; pc < 160; pc++) { 805 emuxki_write(sc, 0, EMU_TANKMEMDATAREGBASE + pc, 0); 806 emuxki_write(sc, 0, EMU_TANKMEMADDRREGBASE + pc, 0); 807 } 808 809 /* stop DSP, single step mode */ 810 emuxki_write(sc, 0, X1(DBG), X1(DBG_SINGLE_STEP)); 811 812 /* XXX: delay (48kHz equiv. 21us) if needed */ 813 814 /* start DSP programming */ 815 pc = 0; 816 817 /* OUT[L/R] = 0 + FX[L/R] * 1 */ 818 emuxki_dsp_addop(sc, &pc, EMU_DSP_OP_MACINTS, 819 X2(DSP_OUTL, DSP_OUT_A_FRONT), 820 X1(DSP_CST(0)), 821 X1(DSP_FX(0)), 822 X1(DSP_CST(1))); 823 emuxki_dsp_addop(sc, &pc, EMU_DSP_OP_MACINTS, 824 X2(DSP_OUTR, DSP_OUT_A_FRONT), 825 X1(DSP_CST(0)), 826 X1(DSP_FX(1)), 827 X1(DSP_CST(1))); 828 #if 0 829 /* XXX: rear feature??? */ 830 /* Rear OUT[L/R] = 0 + FX[L/R] * 1 */ 831 emuxki_dsp_addop(sc, &pc, EMU_DSP_OP_MACINTS, 832 X2(DSP_OUTL, DSP_OUT_A_REAR), 833 X1(DSP_CST(0)), 834 X1(DSP_FX(0)), 835 X1(DSP_CST(1))); 836 emuxki_dsp_addop(sc, &pc, EMU_DSP_OP_MACINTS, 837 X2(DSP_OUTR, DSP_OUT_A_REAR), 838 X1(DSP_CST(0)), 839 X1(DSP_FX(1)), 840 X1(DSP_CST(1))); 841 #endif 842 /* ADC recording[L/R] = AC97 In[L/R] */ 843 emuxki_dsp_addop(sc, &pc, EMU_DSP_OP_ACC3, 844 X2(DSP_OUTL, DSP_OUT_ADC), 845 X2(DSP_INL, DSP_IN_AC97), 846 X1(DSP_CST(0)), 847 X1(DSP_CST(0))); 848 emuxki_dsp_addop(sc, &pc, EMU_DSP_OP_ACC3, 849 X2(DSP_OUTR, DSP_OUT_ADC), 850 X2(DSP_INR, DSP_IN_AC97), 851 X1(DSP_CST(0)), 852 X1(DSP_CST(0))); 853 854 /* fill NOP the rest of the microcode */ 855 while (pc < 512) { 856 emuxki_dsp_addop(sc, &pc, EMU_DSP_OP_ACC3, 857 X1(DSP_CST(0)), 858 X1(DSP_CST(0)), 859 X1(DSP_CST(0)), 860 X1(DSP_CST(0))); 861 } 862 863 /* clear single step flag, run DSP */ 864 emuxki_write(sc, 0, X1(DBG), 0); 865 } 866 867 /* 868 * operations 869 */ 870 871 static void 872 emuxki_play_start(struct emuxki_softc *sc, int ch, uint32_t start, uint32_t end) 873 { 874 uint32_t pitch; 875 uint32_t volume; 876 877 /* 48kHz:16384 = 128/375 */ 878 pitch = sc->play.sample_rate * 128 / 375; 879 volume = 32767; 880 881 emuxki_write(sc, ch, EMU_CHAN_DSL, 882 (0 << 24) | /* send amound D = 0 */ 883 end); 884 885 emuxki_write(sc, ch, EMU_CHAN_PSST, 886 (0 << 24) | /* send amount C = 0 */ 887 start); 888 889 emuxki_write(sc, ch, EMU_CHAN_VTFT, 890 (volume << 16) | 891 (0xffff)); /* cutoff filter = none */ 892 893 emuxki_write(sc, ch, EMU_CHAN_CVCF, 894 (volume << 16) | 895 (0xffff)); /* cutoff filter = none */ 896 897 emuxki_write(sc, ch, EMU_CHAN_PTRX, 898 (pitch << 16) | 899 ((ch == 0 ? 0x7f : 0) << 8) | /* send amount A = 255,0(L) */ 900 ((ch == 0 ? 0 : 0x7f))); /* send amount B = 0,255(R) */ 901 902 /* set the pitch to start */ 903 emuxki_write(sc, ch, EMU_CHAN_CPF, 904 (pitch << 16) | 905 EMU_CHAN_CPF_STEREO_MASK); /* stereo only */ 906 } 907 908 static void 909 emuxki_play_stop(struct emuxki_softc *sc, int ch) 910 { 911 912 /* pitch = 0 to stop playing */ 913 emuxki_write(sc, ch, EMU_CHAN_CPF, EMU_CHAN_CPF_STOP_MASK); 914 /* volume = 0 */ 915 emuxki_write(sc, ch, EMU_CHAN_CVCF, 0); 916 } 917 918 static void 919 emuxki_timer_start(struct emuxki_softc *sc) 920 { 921 uint32_t timer; 922 923 /* frame count of half PTE at 16bit, 2ch, 48kHz */ 924 timer = EMU_PTESIZE / 4 / 2; 925 926 /* EMU_TIMER is 16bit register */ 927 emuxki_writeio_2(sc, EMU_TIMER, timer); 928 emuxki_writeio_4(sc, EMU_INTE, 929 emuxki_readio_4(sc, EMU_INTE) | 930 EMU_INTE_INTERTIMERENB); 931 DPRINTF("timer start\n"); 932 } 933 934 static void 935 emuxki_timer_stop(struct emuxki_softc *sc) 936 { 937 938 emuxki_writeio_4(sc, EMU_INTE, 939 emuxki_readio_4(sc, EMU_INTE) & 940 ~EMU_INTE_INTERTIMERENB); 941 /* EMU_TIMER is 16bit register */ 942 emuxki_writeio_2(sc, EMU_TIMER, 0); 943 DPRINTF("timer stop\n"); 944 } 945 946 /* 947 * audio interface 948 */ 949 950 static int 951 emuxki_query_format(void *hdl, audio_format_query_t *afp) 952 { 953 954 return audio_query_format(emuxki_formats, EMUXKI_NFORMATS, afp); 955 } 956 957 static int 958 emuxki_set_format(void *hdl, int setmode, 959 const audio_params_t *play, const audio_params_t *rec, 960 audio_filter_reg_t *pfil, audio_filter_reg_t *rfil) 961 { 962 struct emuxki_softc *sc = hdl; 963 964 if ((setmode & AUMODE_PLAY)) 965 sc->play = *play; 966 if ((setmode & AUMODE_RECORD)) 967 sc->rec = *rec; 968 return 0; 969 } 970 971 static int 972 emuxki_halt_output(void *hdl) 973 { 974 struct emuxki_softc *sc = hdl; 975 976 emuxki_timer_stop(sc); 977 emuxki_play_stop(sc, 0); 978 emuxki_play_stop(sc, 1); 979 return 0; 980 } 981 982 static int 983 emuxki_halt_input(void *hdl) 984 { 985 struct emuxki_softc *sc = hdl; 986 987 /* stop ADC */ 988 emuxki_write(sc, 0, EMU_ADCCR, 0); 989 990 /* disable interrupt */ 991 emuxki_writeio_4(sc, EMU_INTE, 992 emuxki_readio_4(sc, EMU_INTE) & 993 ~EMU_INTE_ADCBUFENABLE); 994 995 return 0; 996 } 997 998 static int 999 emuxki_intr(void *hdl) 1000 { 1001 struct emuxki_softc *sc = hdl; 1002 uint32_t ipr; 1003 uint32_t curaddr; 1004 int handled = 0; 1005 1006 mutex_spin_enter(&sc->sc_intr_lock); 1007 1008 ipr = emuxki_readio_4(sc, EMU_IPR); 1009 DPRINTFN(3, "emuxki: ipr=%08x\n", ipr); 1010 if (sc->pintr && (ipr & EMU_IPR_INTERVALTIMER)) { 1011 /* read ch 0 */ 1012 curaddr = emuxki_read(sc, 0, EMU_CHAN_CCCA) & 1013 EMU_CHAN_CCCA_CURRADDR_MASK; 1014 DPRINTFN(3, "curaddr=%08x\n", curaddr); 1015 curaddr *= sc->pframesize; 1016 1017 if (curaddr < sc->poffset) 1018 curaddr += sc->plength; 1019 if (curaddr >= sc->poffset + sc->pblksize) { 1020 dmamem_sync(sc->pmem, BUS_DMASYNC_POSTWRITE); 1021 sc->pintr(sc->pintrarg); 1022 sc->poffset += sc->pblksize; 1023 if (sc->poffset >= sc->plength) { 1024 sc->poffset -= sc->plength; 1025 } 1026 dmamem_sync(sc->pmem, BUS_DMASYNC_PREWRITE); 1027 } 1028 handled = 1; 1029 } 1030 1031 if (sc->rintr && 1032 (ipr & (EMU_IPR_ADCBUFHALFFULL | EMU_IPR_ADCBUFFULL))) { 1033 char *src; 1034 char *dst; 1035 1036 /* Record DMA buffer has just 2 blocks */ 1037 src = KERNADDR(sc->rmem); 1038 if (ipr & EMU_IPR_ADCBUFFULL) { 1039 /* 2nd block */ 1040 src += EMU_REC_DMABLKSIZE; 1041 } 1042 dst = (char *)sc->rptr + sc->rcurrent; 1043 1044 dmamem_sync(sc->rmem, BUS_DMASYNC_POSTREAD); 1045 memcpy(dst, src, EMU_REC_DMABLKSIZE); 1046 /* for next trans */ 1047 dmamem_sync(sc->rmem, BUS_DMASYNC_PREREAD); 1048 sc->rcurrent += EMU_REC_DMABLKSIZE; 1049 1050 if (sc->rcurrent >= sc->roffset + sc->rblksize) { 1051 sc->rintr(sc->rintrarg); 1052 sc->roffset += sc->rblksize; 1053 if (sc->roffset >= sc->rlength) { 1054 sc->roffset = 0; 1055 sc->rcurrent = 0; 1056 } 1057 } 1058 1059 handled = 1; 1060 } 1061 1062 #if defined(EMUXKI_DEBUG) 1063 if (!handled) { 1064 char buf[1024]; 1065 snprintb(buf, sizeof(buf), 1066 "\20" 1067 "\x19""RATETRCHANGE" 1068 "\x18""FXDSP" 1069 "\x17""FORCEINT" 1070 "\x16""PCIERROR" 1071 "\x15""VOLINCR" 1072 "\x14""VOLDECR" 1073 "\x13""MUTE" 1074 "\x12""MICBUFFULL" 1075 "\x11""MICBUFHALFFULL" 1076 "\x10""ADCBUFFULL" 1077 "\x0f""ADCBUFHALFFULL" 1078 "\x0e""EFXBUFFULL" 1079 "\x0d""EFXBUFHALFFULL" 1080 "\x0c""GPSPDIFSTCHANGE" 1081 "\x0b""CDROMSTCHANGE" 1082 /* INTERVALTIMER */ 1083 "\x09""MIDITRANSBUFE" 1084 "\x08""MIDIRECVBUFE" 1085 "\x07""CHANNELLOOP" 1086 , ipr); 1087 DPRINTF("unexpected intr: %s\n", buf); 1088 1089 /* for debugging (must not handle if !DEBUG) */ 1090 handled = 1; 1091 } 1092 #endif 1093 1094 /* Reset interrupt bit */ 1095 emuxki_writeio_4(sc, EMU_IPR, ipr); 1096 1097 mutex_spin_exit(&sc->sc_intr_lock); 1098 1099 /* Interrupt handler must return !=0 if handled */ 1100 return handled; 1101 } 1102 1103 static int 1104 emuxki_getdev(void *hdl, struct audio_device *dev) 1105 { 1106 struct emuxki_softc *sc = hdl; 1107 1108 *dev = sc->sc_audv; 1109 return 0; 1110 } 1111 1112 static int 1113 emuxki_set_port(void *hdl, mixer_ctrl_t *mctl) 1114 { 1115 struct emuxki_softc *sc = hdl; 1116 1117 return sc->codecif->vtbl->mixer_set_port(sc->codecif, mctl); 1118 } 1119 1120 static int 1121 emuxki_get_port(void *hdl, mixer_ctrl_t *mctl) 1122 { 1123 struct emuxki_softc *sc = hdl; 1124 1125 return sc->codecif->vtbl->mixer_get_port(sc->codecif, mctl); 1126 } 1127 1128 static int 1129 emuxki_query_devinfo(void *hdl, mixer_devinfo_t *minfo) 1130 { 1131 struct emuxki_softc *sc = hdl; 1132 1133 return sc->codecif->vtbl->query_devinfo(sc->codecif, minfo); 1134 } 1135 1136 static void * 1137 emuxki_allocm(void *hdl, int direction, size_t size) 1138 { 1139 struct emuxki_softc *sc = hdl; 1140 1141 if (direction == AUMODE_PLAY) { 1142 if (sc->pmem) { 1143 panic("pmem already allocated\n"); 1144 return NULL; 1145 } 1146 sc->pmem = dmamem_alloc(sc, size); 1147 return KERNADDR(sc->pmem); 1148 } else { 1149 /* rmem is fixed size internal DMA buffer */ 1150 if (sc->rmem) { 1151 panic("rmem already allocated\n"); 1152 return NULL; 1153 } 1154 /* rmem fixed size */ 1155 sc->rmem = dmamem_alloc(sc, EMU_REC_DMASIZE); 1156 1157 /* recording MI buffer is normal kmem, software trans. */ 1158 sc->rptr = kmem_alloc(size, KM_SLEEP); 1159 return sc->rptr; 1160 } 1161 } 1162 1163 static void 1164 emuxki_freem(void *hdl, void *ptr, size_t size) 1165 { 1166 struct emuxki_softc *sc = hdl; 1167 1168 if (sc->pmem && ptr == KERNADDR(sc->pmem)) { 1169 dmamem_free(sc->pmem); 1170 sc->pmem = NULL; 1171 } 1172 if (sc->rmem && ptr == sc->rptr) { 1173 dmamem_free(sc->rmem); 1174 sc->rmem = NULL; 1175 kmem_free(sc->rptr, size); 1176 sc->rptr = NULL; 1177 } 1178 } 1179 1180 /* 1181 * blocksize rounding to EMU_PTESIZE. It is for easy to drive. 1182 */ 1183 static int 1184 emuxki_round_blocksize(void *hdl, int blksize, 1185 int mode, const audio_params_t* param) 1186 { 1187 1188 /* 1189 * This is not necessary for recording, but symmetric for easy. 1190 * For recording buffer/block size requirements of hardware, 1191 * see EMU_RECBS_BUFSIZE_* 1192 */ 1193 if (blksize < EMU_PTESIZE) 1194 blksize = EMU_PTESIZE; 1195 return rounddown(blksize, EMU_PTESIZE); 1196 } 1197 1198 static size_t 1199 emuxki_round_buffersize(void *hdl, int direction, size_t bsize) 1200 { 1201 1202 /* This is not necessary for recording, but symmetric for easy */ 1203 if (bsize < EMU_MINPTE * EMU_PTESIZE) { 1204 bsize = EMU_MINPTE * EMU_PTESIZE; 1205 } else if (bsize > EMU_MAXPTE * EMU_PTESIZE) { 1206 bsize = EMU_MAXPTE * EMU_PTESIZE; 1207 } 1208 return roundup(bsize, EMU_PTESIZE); 1209 } 1210 1211 static int 1212 emuxki_get_props(void *hdl) 1213 { 1214 1215 return AUDIO_PROP_PLAYBACK | AUDIO_PROP_CAPTURE | 1216 AUDIO_PROP_INDEPENDENT | AUDIO_PROP_FULLDUPLEX; 1217 } 1218 1219 static int 1220 emuxki_trigger_output(void *hdl, void *start, void *end, int blksize, 1221 void (*intr)(void *), void *arg, const audio_params_t *params) 1222 { 1223 struct emuxki_softc *sc = hdl; 1224 int npage; 1225 uint32_t *kptb; 1226 bus_addr_t dpmem; 1227 int i; 1228 uint32_t hwstart; 1229 uint32_t hwend; 1230 1231 if (sc->pmem == NULL) 1232 panic("pmem == NULL\n"); 1233 if (start != KERNADDR(sc->pmem)) 1234 panic("start != KERNADDR(sc->pmem)\n"); 1235 1236 sc->pframesize = 4; /* channels * bit / 8 = 2*16/8=4 */ 1237 sc->pblksize = blksize; 1238 sc->plength = (char *)end - (char *)start; 1239 sc->poffset = 0; 1240 npage = roundup(sc->plength, EMU_PTESIZE); 1241 1242 kptb = KERNADDR(sc->ptb); 1243 dpmem = DMAADDR(sc->pmem); 1244 for (i = 0; i < npage; i++) { 1245 kptb[i] = htole32(dpmem << 1); 1246 dpmem += EMU_PTESIZE; 1247 } 1248 dmamem_sync(sc->ptb, BUS_DMASYNC_PREWRITE); 1249 1250 hwstart = 0; 1251 hwend = hwstart + sc->plength / sc->pframesize; 1252 1253 sc->pintr = intr; 1254 sc->pintrarg = arg; 1255 1256 dmamem_sync(sc->pmem, BUS_DMASYNC_PREWRITE); 1257 1258 emuxki_play_start(sc, 0, hwstart, hwend); 1259 emuxki_play_start(sc, 1, hwstart, hwend); 1260 1261 emuxki_timer_start(sc); 1262 1263 return 0; 1264 } 1265 1266 /* 1267 * Recording uses temporary buffer. Because it can use ADC_HALF/FULL 1268 * interrupts and this method doesn't conflict with playback. 1269 */ 1270 1271 static int 1272 emuxki_trigger_input(void *hdl, void *start, void *end, int blksize, 1273 void (*intr)(void *), void *arg, const audio_params_t *params) 1274 { 1275 struct emuxki_softc *sc = hdl; 1276 1277 if (sc->rmem == NULL) 1278 panic("rmem == NULL\n"); 1279 if (start != sc->rptr) 1280 panic("start != sc->rptr\n"); 1281 1282 sc->rframesize = 4; /* channels * bit / 8 = 2*16/8=4 */ 1283 sc->rblksize = blksize; 1284 sc->rlength = (char *)end - (char *)start; 1285 sc->roffset = 0; 1286 sc->rcurrent = 0; 1287 1288 sc->rintr = intr; 1289 sc->rintrarg = arg; 1290 1291 /* 1292 * Memo: 1293 * recording source is selected by AC97 1294 * AC97 input source routes to ADC by FX(DSP) 1295 * 1296 * Must keep following sequence order 1297 */ 1298 1299 /* first, stop ADC */ 1300 emuxki_write(sc, 0, EMU_ADCCR, 0); 1301 emuxki_write(sc, 0, EMU_ADCBA, 0); 1302 emuxki_write(sc, 0, EMU_ADCBS, 0); 1303 1304 dmamem_sync(sc->rmem, BUS_DMASYNC_PREREAD); 1305 1306 /* ADC interrupt enable */ 1307 emuxki_writeio_4(sc, EMU_INTE, 1308 emuxki_readio_4(sc, EMU_INTE) | 1309 EMU_INTE_ADCBUFENABLE); 1310 1311 /* ADC Enable */ 1312 /* stereo, 48kHz, enable */ 1313 emuxki_write(sc, 0, EMU_ADCCR, 1314 X1(ADCCR_LCHANENABLE) | X1(ADCCR_RCHANENABLE)); 1315 1316 /* ADC buffer address */ 1317 emuxki_write(sc, 0, X1(ADCIDX), 0); 1318 emuxki_write(sc, 0, EMU_ADCBA, DMAADDR(sc->rmem)); 1319 1320 /* ADC buffer size, to start */ 1321 emuxki_write(sc, 0, EMU_ADCBS, EMU_REC_BUFSIZE_RECBS); 1322 1323 return 0; 1324 } 1325 1326 static void 1327 emuxki_get_locks(void *hdl, kmutex_t **intr, kmutex_t **proc) 1328 { 1329 struct emuxki_softc *sc = hdl; 1330 1331 *intr = &sc->sc_intr_lock; 1332 *proc = &sc->sc_lock; 1333 } 1334 1335 /* 1336 * AC97 1337 */ 1338 1339 static int 1340 emuxki_ac97_init(struct emuxki_softc *sc) 1341 { 1342 1343 sc->hostif.arg = sc; 1344 sc->hostif.attach = emuxki_ac97_attach; 1345 sc->hostif.read = emuxki_ac97_read; 1346 sc->hostif.write = emuxki_ac97_write; 1347 sc->hostif.reset = emuxki_ac97_reset; 1348 sc->hostif.flags = emuxki_ac97_flags; 1349 return ac97_attach(&sc->hostif, sc->sc_dev, &sc->sc_lock); 1350 } 1351 1352 /* 1353 * AC97 callbacks 1354 */ 1355 1356 static int 1357 emuxki_ac97_attach(void *hdl, struct ac97_codec_if *codecif) 1358 { 1359 struct emuxki_softc *sc = hdl; 1360 1361 sc->codecif = codecif; 1362 return 0; 1363 } 1364 1365 static int 1366 emuxki_ac97_read(void *hdl, uint8_t reg, uint16_t *val) 1367 { 1368 struct emuxki_softc *sc = hdl; 1369 1370 mutex_spin_enter(&sc->sc_index_lock); 1371 emuxki_writeio_1(sc, EMU_AC97ADDR, reg); 1372 *val = emuxki_readio_2(sc, EMU_AC97DATA); 1373 mutex_spin_exit(&sc->sc_index_lock); 1374 1375 return 0; 1376 } 1377 1378 static int 1379 emuxki_ac97_write(void *hdl, uint8_t reg, uint16_t val) 1380 { 1381 struct emuxki_softc *sc = hdl; 1382 1383 mutex_spin_enter(&sc->sc_index_lock); 1384 emuxki_writeio_1(sc, EMU_AC97ADDR, reg); 1385 emuxki_writeio_2(sc, EMU_AC97DATA, val); 1386 mutex_spin_exit(&sc->sc_index_lock); 1387 1388 return 0; 1389 } 1390 1391 static int 1392 emuxki_ac97_reset(void *hdl) 1393 { 1394 1395 return 0; 1396 } 1397 1398 static enum ac97_host_flags 1399 emuxki_ac97_flags(void *hdl) 1400 { 1401 1402 return AC97_HOST_SWAPPED_CHANNELS; 1403 } 1404