1 /* $NetBSD: cz.c,v 1.59 2014/03/29 19:28:24 christos Exp $ */ 2 3 /*- 4 * Copyright (c) 2000 Zembu Labs, Inc. 5 * All rights reserved. 6 * 7 * Authors: Jason R. Thorpe <thorpej@zembu.com> 8 * Bill Studenmund <wrstuden@zembu.com> 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Zembu Labs, Inc. 21 * 4. Neither the name of Zembu Labs nor the names of its employees may 22 * be used to endorse or promote products derived from this software 23 * without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY ZEMBU LABS, INC. ``AS IS'' AND ANY EXPRESS 26 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WAR- 27 * RANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DIS- 28 * CLAIMED. IN NO EVENT SHALL ZEMBU LABS BE LIABLE FOR ANY DIRECT, INDIRECT, 29 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 30 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 31 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 32 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 34 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 */ 36 37 /* 38 * Cyclades-Z series multi-port serial adapter driver for NetBSD. 39 * 40 * Some notes: 41 * 42 * - The Cyclades-Z has fully automatic hardware (and software!) 43 * flow control. We only use RTS/CTS flow control here, 44 * and it is implemented in a very simplistic manner. This 45 * may be an area of future work. 46 * 47 * - The PLX can map the either the board's RAM or host RAM 48 * into the MIPS's memory window. This would enable us to 49 * use less expensive (for us) memory reads/writes to host 50 * RAM, rather than time-consuming reads/writes to PCI 51 * memory space. However, the PLX can only map a 0-128M 52 * window, so we would have to ensure that the DMA address 53 * of the host RAM fits there. This is kind of a pain, 54 * so we just don't bother right now. 55 * 56 * - In a perfect world, we would use the autoconfiguration 57 * mechanism to attach the TTYs that we find. However, 58 * that leads to somewhat icky looking autoconfiguration 59 * messages (one for every TTY, up to 64 per board!). So 60 * we don't do it that way, but assign minors as if there 61 * were the max of 64 ports per board. 62 * 63 * - We don't bother with PPS support here. There are so many 64 * ports, each with a large amount of buffer space, that the 65 * normal mode of operation is to poll the boards regularly 66 * (generally, every 20ms or so). This makes this driver 67 * unsuitable for PPS, as the latency will be generally too 68 * high. 69 */ 70 /* 71 * This driver inspired by the FreeBSD driver written by Brian J. McGovern 72 * for FreeBSD 3.2. 73 */ 74 75 #include <sys/cdefs.h> 76 __KERNEL_RCSID(0, "$NetBSD: cz.c,v 1.59 2014/03/29 19:28:24 christos Exp $"); 77 78 #include <sys/param.h> 79 #include <sys/systm.h> 80 #include <sys/proc.h> 81 #include <sys/device.h> 82 #include <sys/malloc.h> 83 #include <sys/tty.h> 84 #include <sys/conf.h> 85 #include <sys/time.h> 86 #include <sys/kernel.h> 87 #include <sys/fcntl.h> 88 #include <sys/syslog.h> 89 #include <sys/kauth.h> 90 91 #include <sys/callout.h> 92 93 #include <dev/pci/pcireg.h> 94 #include <dev/pci/pcivar.h> 95 #include <dev/pci/pcidevs.h> 96 #include <dev/pci/czreg.h> 97 98 #include <dev/pci/plx9060reg.h> 99 #include <dev/pci/plx9060var.h> 100 101 #include <dev/microcode/cyclades-z/cyzfirm.h> 102 103 #define CZ_DRIVER_VERSION 0x20000411 104 105 #define CZ_POLL_MS 20 106 107 /* These are the interrupts we always use. */ 108 #define CZ_INTERRUPTS \ 109 (C_IN_MDSR | C_IN_MRI | C_IN_MRTS | C_IN_MCTS | C_IN_TXBEMPTY | \ 110 C_IN_TXFEMPTY | C_IN_TXLOWWM | C_IN_RXHIWM | C_IN_RXNNDT | \ 111 C_IN_MDCD | C_IN_PR_ERROR | C_IN_FR_ERROR | C_IN_OVR_ERROR | \ 112 C_IN_RXOFL | C_IN_IOCTLW | C_IN_RXBRK) 113 114 /* 115 * cztty_softc: 116 * 117 * Per-channel (TTY) state. 118 */ 119 struct cztty_softc { 120 struct cz_softc *sc_parent; 121 struct tty *sc_tty; 122 123 callout_t sc_diag_ch; 124 125 int sc_channel; /* Also used to flag unattached chan */ 126 #define CZTTY_CHANNEL_DEAD -1 127 128 bus_space_tag_t sc_chan_st; /* channel space tag */ 129 bus_space_handle_t sc_chan_sh; /* channel space handle */ 130 bus_space_handle_t sc_buf_sh; /* buffer space handle */ 131 132 u_int sc_overflows, 133 sc_parity_errors, 134 sc_framing_errors, 135 sc_errors; 136 137 int sc_swflags; 138 139 u_int32_t sc_rs_control_dtr, 140 sc_chanctl_hw_flow, 141 sc_chanctl_comm_baud, 142 sc_chanctl_rs_control, 143 sc_chanctl_comm_data_l, 144 sc_chanctl_comm_parity; 145 }; 146 147 /* 148 * cz_softc: 149 * 150 * Per-board state. 151 */ 152 struct cz_softc { 153 device_t cz_dev; /* generic device info */ 154 struct plx9060_config cz_plx; /* PLX 9060 config info */ 155 bus_space_tag_t cz_win_st; /* window space tag */ 156 bus_space_handle_t cz_win_sh; /* window space handle */ 157 callout_t cz_callout; /* callout for polling-mode */ 158 159 void *cz_ih; /* interrupt handle */ 160 161 u_int32_t cz_mailbox0; /* our MAILBOX0 value */ 162 int cz_nchannels; /* number of channels */ 163 int cz_nopenchan; /* number of open channels */ 164 struct cztty_softc *cz_ports; /* our array of ports */ 165 166 bus_addr_t cz_fwctl; /* offset of firmware control */ 167 }; 168 169 static int cz_wait_pci_doorbell(struct cz_softc *, const char *); 170 171 static int cz_load_firmware(struct cz_softc *); 172 173 static int cz_intr(void *); 174 static void cz_poll(void *); 175 static int cztty_transmit(struct cztty_softc *, struct tty *); 176 static int cztty_receive(struct cztty_softc *, struct tty *); 177 178 static struct cztty_softc *cztty_getttysoftc(dev_t dev); 179 static int cztty_attached_ttys; 180 static int cz_timeout_ticks; 181 182 static void czttystart(struct tty *tp); 183 static int czttyparam(struct tty *tp, struct termios *t); 184 static void cztty_shutdown(struct cztty_softc *sc); 185 static void cztty_modem(struct cztty_softc *sc, int onoff); 186 static void cztty_break(struct cztty_softc *sc, int onoff); 187 static void tiocm_to_cztty(struct cztty_softc *sc, u_long how, int ttybits); 188 static int cztty_to_tiocm(struct cztty_softc *sc); 189 static void cztty_diag(void *arg); 190 191 extern struct cfdriver cz_cd; 192 193 /* 194 * Macros to read and write the PLX. 195 */ 196 #define CZ_PLX_READ(cz, reg) \ 197 bus_space_read_4((cz)->cz_plx.plx_st, (cz)->cz_plx.plx_sh, (reg)) 198 #define CZ_PLX_WRITE(cz, reg, val) \ 199 bus_space_write_4((cz)->cz_plx.plx_st, (cz)->cz_plx.plx_sh, \ 200 (reg), (val)) 201 202 /* 203 * Macros to read and write the FPGA. We must already be in the FPGA 204 * window for this. 205 */ 206 #define CZ_FPGA_READ(cz, reg) \ 207 bus_space_read_4((cz)->cz_win_st, (cz)->cz_win_sh, (reg)) 208 #define CZ_FPGA_WRITE(cz, reg, val) \ 209 bus_space_write_4((cz)->cz_win_st, (cz)->cz_win_sh, (reg), (val)) 210 211 /* 212 * Macros to read and write the firmware control structures in board RAM. 213 */ 214 #define CZ_FWCTL_READ(cz, off) \ 215 bus_space_read_4((cz)->cz_win_st, (cz)->cz_win_sh, \ 216 (cz)->cz_fwctl + (off)) 217 218 #define CZ_FWCTL_WRITE(cz, off, val) \ 219 bus_space_write_4((cz)->cz_win_st, (cz)->cz_win_sh, \ 220 (cz)->cz_fwctl + (off), (val)) 221 222 /* 223 * Convenience macros for cztty routines. PLX window MUST be to RAM. 224 */ 225 #define CZTTY_CHAN_READ(sc, off) \ 226 bus_space_read_4((sc)->sc_chan_st, (sc)->sc_chan_sh, (off)) 227 228 #define CZTTY_CHAN_WRITE(sc, off, val) \ 229 bus_space_write_4((sc)->sc_chan_st, (sc)->sc_chan_sh, \ 230 (off), (val)) 231 232 #define CZTTY_BUF_READ(sc, off) \ 233 bus_space_read_4((sc)->sc_chan_st, (sc)->sc_buf_sh, (off)) 234 235 #define CZTTY_BUF_WRITE(sc, off, val) \ 236 bus_space_write_4((sc)->sc_chan_st, (sc)->sc_buf_sh, \ 237 (off), (val)) 238 239 /* 240 * Convenience macros. 241 */ 242 #define CZ_WIN_RAM(cz) \ 243 do { \ 244 CZ_PLX_WRITE((cz), PLX_LAS0BA, LOCAL_ADDR0_RAM); \ 245 delay(100); \ 246 } while (0) 247 248 #define CZ_WIN_FPGA(cz) \ 249 do { \ 250 CZ_PLX_WRITE((cz), PLX_LAS0BA, LOCAL_ADDR0_FPGA); \ 251 delay(100); \ 252 } while (0) 253 254 /***************************************************************************** 255 * Cyclades-Z controller code starts here... 256 *****************************************************************************/ 257 258 /* 259 * cz_match: 260 * 261 * Determine if the given PCI device is a Cyclades-Z board. 262 */ 263 static int 264 cz_match(device_t parent, cfdata_t match, void *aux) 265 { 266 struct pci_attach_args *pa = aux; 267 268 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_CYCLADES) { 269 switch (PCI_PRODUCT(pa->pa_id)) { 270 case PCI_PRODUCT_CYCLADES_CYCLOMZ_2: 271 return (1); 272 } 273 } 274 275 return (0); 276 } 277 278 /* 279 * cz_attach: 280 * 281 * A Cyclades-Z board was found; attach it. 282 */ 283 static void 284 cz_attach(device_t parent, device_t self, void *aux) 285 { 286 extern const struct cdevsw cz_cdevsw; /* XXX */ 287 struct cz_softc *cz = device_private(self); 288 struct pci_attach_args *pa = aux; 289 pci_intr_handle_t ih; 290 const char *intrstr = NULL; 291 struct cztty_softc *sc; 292 struct tty *tp; 293 int i; 294 char intrbuf[PCI_INTRSTR_LEN]; 295 296 aprint_naive(": Multi-port serial controller\n"); 297 aprint_normal(": Cyclades-Z multiport serial\n"); 298 299 cz->cz_dev = self; 300 cz->cz_plx.plx_pc = pa->pa_pc; 301 cz->cz_plx.plx_tag = pa->pa_tag; 302 303 if (pci_mapreg_map(pa, PLX_PCI_RUNTIME_MEMADDR, 304 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 305 &cz->cz_plx.plx_st, &cz->cz_plx.plx_sh, NULL, NULL) != 0) { 306 aprint_error_dev(cz->cz_dev, "unable to map PLX registers\n"); 307 return; 308 } 309 if (pci_mapreg_map(pa, PLX_PCI_LOCAL_ADDR0, 310 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 311 &cz->cz_win_st, &cz->cz_win_sh, NULL, NULL) != 0) { 312 aprint_error_dev(cz->cz_dev, "unable to map device window\n"); 313 return; 314 } 315 316 cz->cz_mailbox0 = CZ_PLX_READ(cz, PLX_MAILBOX0); 317 cz->cz_nopenchan = 0; 318 319 /* 320 * Make sure that the board is completely stopped. 321 */ 322 CZ_WIN_FPGA(cz); 323 CZ_FPGA_WRITE(cz, FPGA_CPU_STOP, 0); 324 325 /* 326 * Load the board's firmware. 327 */ 328 if (cz_load_firmware(cz) != 0) 329 return; 330 331 /* 332 * Now that we're ready to roll, map and establish the interrupt 333 * handler. 334 */ 335 if (pci_intr_map(pa, &ih) != 0) { 336 /* 337 * The common case is for Cyclades-Z boards to run 338 * in polling mode, and thus not have an interrupt 339 * mapped for them. Don't bother reporting that 340 * the interrupt is not mappable, since this isn't 341 * really an error. 342 */ 343 cz->cz_ih = NULL; 344 goto polling_mode; 345 } else { 346 intrstr = pci_intr_string(pa->pa_pc, ih, intrbuf, sizeof(intrbuf)); 347 cz->cz_ih = pci_intr_establish(pa->pa_pc, ih, IPL_TTY, 348 cz_intr, cz); 349 } 350 if (cz->cz_ih == NULL) { 351 aprint_error_dev(cz->cz_dev, "unable to establish interrupt"); 352 if (intrstr != NULL) 353 aprint_error(" at %s", intrstr); 354 aprint_error("\n"); 355 /* We will fall-back on polling mode. */ 356 } else 357 aprint_normal_dev(cz->cz_dev, "interrupting at %s\n", 358 intrstr); 359 360 polling_mode: 361 if (cz->cz_ih == NULL) { 362 callout_init(&cz->cz_callout, 0); 363 if (cz_timeout_ticks == 0) 364 cz_timeout_ticks = max(1, hz * CZ_POLL_MS / 1000); 365 aprint_normal_dev(cz->cz_dev, "polling mode, %d ms interval (%d tick%s)\n", 366 CZ_POLL_MS, cz_timeout_ticks, 367 cz_timeout_ticks == 1 ? "" : "s"); 368 } 369 370 /* 371 * Allocate sufficient pointers for the children and 372 * attach them. Set all ports to a reasonable initial 373 * configuration while we're at it: 374 * 375 * disabled 376 * 8N1 377 * default baud rate 378 * hardware flow control. 379 */ 380 CZ_WIN_RAM(cz); 381 382 if (cz->cz_nchannels == 0) { 383 /* No channels? No more work to do! */ 384 return; 385 } 386 387 cz->cz_ports = malloc(sizeof(struct cztty_softc) * cz->cz_nchannels, 388 M_DEVBUF, M_WAITOK|M_ZERO); 389 cztty_attached_ttys += cz->cz_nchannels; 390 391 for (i = 0; i < cz->cz_nchannels; i++) { 392 sc = &cz->cz_ports[i]; 393 394 sc->sc_channel = i; 395 sc->sc_chan_st = cz->cz_win_st; 396 sc->sc_parent = cz; 397 398 if (bus_space_subregion(cz->cz_win_st, cz->cz_win_sh, 399 cz->cz_fwctl + ZFIRM_CHNCTL_OFF(i, 0), 400 ZFIRM_CHNCTL_SIZE, &sc->sc_chan_sh)) { 401 aprint_error_dev(cz->cz_dev, 402 "unable to subregion channel %d control\n", i); 403 sc->sc_channel = CZTTY_CHANNEL_DEAD; 404 continue; 405 } 406 if (bus_space_subregion(cz->cz_win_st, cz->cz_win_sh, 407 cz->cz_fwctl + ZFIRM_BUFCTL_OFF(i, 0), 408 ZFIRM_BUFCTL_SIZE, &sc->sc_buf_sh)) { 409 aprint_error_dev(cz->cz_dev, 410 "unable to subregion channel %d buffer\n", i); 411 sc->sc_channel = CZTTY_CHANNEL_DEAD; 412 continue; 413 } 414 415 callout_init(&sc->sc_diag_ch, 0); 416 417 tp = tty_alloc(); 418 tp->t_dev = makedev(cdevsw_lookup_major(&cz_cdevsw), 419 (device_unit(cz->cz_dev) * ZFIRM_MAX_CHANNELS) + i); 420 tp->t_oproc = czttystart; 421 tp->t_param = czttyparam; 422 tty_attach(tp); 423 424 sc->sc_tty = tp; 425 426 CZTTY_CHAN_WRITE(sc, CHNCTL_OP_MODE, C_CH_DISABLE); 427 CZTTY_CHAN_WRITE(sc, CHNCTL_INTR_ENABLE, CZ_INTERRUPTS); 428 CZTTY_CHAN_WRITE(sc, CHNCTL_SW_FLOW, 0); 429 CZTTY_CHAN_WRITE(sc, CHNCTL_FLOW_XON, 0x11); 430 CZTTY_CHAN_WRITE(sc, CHNCTL_FLOW_XOFF, 0x13); 431 CZTTY_CHAN_WRITE(sc, CHNCTL_COMM_BAUD, TTYDEF_SPEED); 432 CZTTY_CHAN_WRITE(sc, CHNCTL_COMM_PARITY, C_PR_NONE); 433 CZTTY_CHAN_WRITE(sc, CHNCTL_COMM_DATA_L, C_DL_CS8 | C_DL_1STOP); 434 CZTTY_CHAN_WRITE(sc, CHNCTL_COMM_FLAGS, 0); 435 CZTTY_CHAN_WRITE(sc, CHNCTL_HW_FLOW, C_RS_CTS | C_RS_RTS); 436 CZTTY_CHAN_WRITE(sc, CHNCTL_RS_CONTROL, 0); 437 } 438 } 439 440 CFATTACH_DECL_NEW(cz, sizeof(struct cz_softc), 441 cz_match, cz_attach, NULL, NULL); 442 443 #if 0 444 /* 445 * cz_reset_board: 446 * 447 * Reset the board via the PLX. 448 */ 449 static void 450 cz_reset_board(struct cz_softc *cz) 451 { 452 u_int32_t reg; 453 454 reg = CZ_PLX_READ(cz, PLX_CONTROL); 455 CZ_PLX_WRITE(cz, PLX_CONTROL, reg | CONTROL_SWR); 456 delay(1000); 457 458 CZ_PLX_WRITE(cz, PLX_CONTROL, reg); 459 delay(1000); 460 461 /* Now reload the PLX from its EEPROM. */ 462 reg = CZ_PLX_READ(cz, PLX_CONTROL); 463 CZ_PLX_WRITE(cz, PLX_CONTROL, reg | CONTROL_RELOADCFG); 464 delay(1000); 465 CZ_PLX_WRITE(cz, PLX_CONTROL, reg); 466 } 467 #endif 468 469 /* 470 * cz_load_firmware: 471 * 472 * Load the ZFIRM firmware into the board's RAM and start it 473 * running. 474 */ 475 static int 476 cz_load_firmware(struct cz_softc *cz) 477 { 478 const struct zfirm_header *zfh; 479 const struct zfirm_config *zfc; 480 const struct zfirm_block *zfb, *zblocks; 481 const u_int8_t *cp; 482 const char *board; 483 u_int32_t fid; 484 int i, j, nconfigs, nblocks, nbytes; 485 486 zfh = (const struct zfirm_header *) cycladesz_firmware; 487 488 /* Find the config header. */ 489 if (le32toh(zfh->zfh_configoff) & (sizeof(u_int32_t) - 1)) { 490 aprint_error_dev(cz->cz_dev, "bad ZFIRM config offset: 0x%x\n", 491 le32toh(zfh->zfh_configoff)); 492 return (EIO); 493 } 494 zfc = (const struct zfirm_config *)(cycladesz_firmware + 495 le32toh(zfh->zfh_configoff)); 496 nconfigs = le32toh(zfh->zfh_nconfig); 497 498 /* Locate the correct configuration for our board. */ 499 for (i = 0; i < nconfigs; i++, zfc++) { 500 if (le32toh(zfc->zfc_mailbox) == cz->cz_mailbox0 && 501 le32toh(zfc->zfc_function) == ZFC_FUNCTION_NORMAL) 502 break; 503 } 504 if (i == nconfigs) { 505 aprint_error_dev(cz->cz_dev, "unable to locate config header\n"); 506 return (EIO); 507 } 508 509 nblocks = le32toh(zfc->zfc_nblocks); 510 zblocks = (const struct zfirm_block *)(cycladesz_firmware + 511 le32toh(zfh->zfh_blockoff)); 512 513 /* 514 * 8Zo ver. 1 doesn't have an FPGA. Load it on all others if 515 * necessary. 516 */ 517 if (cz->cz_mailbox0 != MAILBOX0_8Zo_V1 518 #if 0 519 && ((CZ_PLX_READ(cz, PLX_CONTROL) & CONTROL_FPGA_LOADED) == 0) 520 #endif 521 ) { 522 #ifdef CZ_DEBUG 523 aprint_debug_dev(cz->cz_dev, "Loading FPGA..."); 524 #endif 525 CZ_WIN_FPGA(cz); 526 for (i = 0; i < nblocks; i++) { 527 /* zfb = zblocks + le32toh(zfc->zfc_blocklist[i]) ?? */ 528 zfb = &zblocks[le32toh(zfc->zfc_blocklist[i])]; 529 if (le32toh(zfb->zfb_type) == ZFB_TYPE_FPGA) { 530 nbytes = le32toh(zfb->zfb_size); 531 cp = &cycladesz_firmware[ 532 le32toh(zfb->zfb_fileoff)]; 533 for (j = 0; j < nbytes; j++, cp++) { 534 bus_space_write_1(cz->cz_win_st, 535 cz->cz_win_sh, 0, *cp); 536 /* FPGA needs 30-100us to settle. */ 537 delay(10); 538 } 539 } 540 } 541 #ifdef CZ_DEBUG 542 aprint_debug("done\n"); 543 #endif 544 } 545 546 /* Now load the firmware. */ 547 CZ_WIN_RAM(cz); 548 549 for (i = 0; i < nblocks; i++) { 550 /* zfb = zblocks + le32toh(zfc->zfc_blocklist[i]) ?? */ 551 zfb = &zblocks[le32toh(zfc->zfc_blocklist[i])]; 552 if (le32toh(zfb->zfb_type) == ZFB_TYPE_FIRMWARE) { 553 const u_int32_t *lp; 554 u_int32_t ro = le32toh(zfb->zfb_ramoff); 555 nbytes = le32toh(zfb->zfb_size); 556 lp = (const u_int32_t *) 557 &cycladesz_firmware[le32toh(zfb->zfb_fileoff)]; 558 for (j = 0; j < nbytes; j += 4, lp++) { 559 bus_space_write_4(cz->cz_win_st, cz->cz_win_sh, 560 ro + j, le32toh(*lp)); 561 delay(10); 562 } 563 } 564 } 565 566 /* Now restart the MIPS. */ 567 CZ_WIN_FPGA(cz); 568 CZ_FPGA_WRITE(cz, FPGA_CPU_START, 0); 569 570 /* Wait for the MIPS to start, then report the results. */ 571 CZ_WIN_RAM(cz); 572 573 #ifdef CZ_DEBUG 574 aprint_debug_dev(cz->cz_dev, "waiting for MIPS to start"); 575 #endif 576 for (i = 0; i < 100; i++) { 577 fid = bus_space_read_4(cz->cz_win_st, cz->cz_win_sh, 578 ZFIRM_SIG_OFF); 579 if (fid == ZFIRM_SIG) { 580 /* MIPS has booted. */ 581 break; 582 } else if (fid == ZFIRM_HLT) { 583 /* 584 * The MIPS has halted, usually due to a power 585 * shortage on the expansion module. 586 */ 587 aprint_error_dev(cz->cz_dev, "MIPS halted; possible power supply " 588 "problem\n"); 589 return (EIO); 590 } else { 591 #ifdef CZ_DEBUG 592 if ((i % 8) == 0) 593 aprint_debug("."); 594 #endif 595 delay(250000); 596 } 597 } 598 #ifdef CZ_DEBUG 599 aprint_debug("\n"); 600 #endif 601 if (i == 100) { 602 CZ_WIN_FPGA(cz); 603 aprint_error_dev(cz->cz_dev, 604 "MIPS failed to start; wanted 0x%08x got 0x%08x\n", 605 ZFIRM_SIG, fid); 606 aprint_error_dev(cz->cz_dev, "FPGA ID 0x%08x, FPGA version 0x%08x\n", 607 CZ_FPGA_READ(cz, FPGA_ID), 608 CZ_FPGA_READ(cz, FPGA_VERSION)); 609 return (EIO); 610 } 611 612 /* 613 * Locate the firmware control structures. 614 */ 615 cz->cz_fwctl = bus_space_read_4(cz->cz_win_st, cz->cz_win_sh, 616 ZFIRM_CTRLADDR_OFF); 617 #ifdef CZ_DEBUG 618 aprint_debug_dev(cz->cz_dev, "FWCTL structure at offset " 619 "%#08" PRIxPADDR "\n", cz->cz_fwctl); 620 #endif 621 622 CZ_FWCTL_WRITE(cz, BRDCTL_C_OS, C_OS_BSD); 623 CZ_FWCTL_WRITE(cz, BRDCTL_DRVERSION, CZ_DRIVER_VERSION); 624 625 cz->cz_nchannels = CZ_FWCTL_READ(cz, BRDCTL_NCHANNEL); 626 627 switch (cz->cz_mailbox0) { 628 case MAILBOX0_8Zo_V1: 629 board = "Cyclades-8Zo ver. 1"; 630 break; 631 632 case MAILBOX0_8Zo_V2: 633 board = "Cyclades-8Zo ver. 2"; 634 break; 635 636 case MAILBOX0_Ze_V1: 637 board = "Cyclades-Ze"; 638 break; 639 640 default: 641 board = "unknown Cyclades Z-series"; 642 break; 643 } 644 645 fid = CZ_FWCTL_READ(cz, BRDCTL_FWVERSION); 646 aprint_normal_dev(cz->cz_dev, "%s, ", board); 647 if (cz->cz_nchannels == 0) 648 aprint_normal("no channels attached, "); 649 else 650 aprint_normal("%d channels (ttyCZ%04d..ttyCZ%04d), ", 651 cz->cz_nchannels, cztty_attached_ttys, 652 cztty_attached_ttys + (cz->cz_nchannels - 1)); 653 aprint_normal("firmware %x.%x.%x\n", 654 (fid >> 8) & 0xf, (fid >> 4) & 0xf, fid & 0xf); 655 656 return (0); 657 } 658 659 /* 660 * cz_poll: 661 * 662 * This card doesn't do interrupts, so scan it for activity every CZ_POLL_MS 663 * ms. 664 */ 665 static void 666 cz_poll(void *arg) 667 { 668 int s = spltty(); 669 struct cz_softc *cz = arg; 670 671 cz_intr(cz); 672 callout_reset(&cz->cz_callout, cz_timeout_ticks, cz_poll, cz); 673 674 splx(s); 675 } 676 677 /* 678 * cz_intr: 679 * 680 * Interrupt service routine. 681 * 682 * We either are receiving an interrupt directly from the board, or we are 683 * in polling mode and it's time to poll. 684 */ 685 static int 686 cz_intr(void *arg) 687 { 688 int rval = 0; 689 u_int command, channel; 690 struct cz_softc *cz = arg; 691 struct cztty_softc *sc; 692 struct tty *tp; 693 694 while ((command = (CZ_PLX_READ(cz, PLX_LOCAL_PCI_DOORBELL) & 0xff))) { 695 rval = 1; 696 channel = CZ_FWCTL_READ(cz, BRDCTL_FWCMD_CHANNEL); 697 /* XXX - is this needed? */ 698 (void)CZ_FWCTL_READ(cz, BRDCTL_FWCMD_PARAM); 699 700 /* now clear this interrupt, posslibly enabling another */ 701 CZ_PLX_WRITE(cz, PLX_LOCAL_PCI_DOORBELL, command); 702 703 if (cz->cz_ports == NULL) { 704 #ifdef CZ_DEBUG 705 printf("%s: interrupt on channel %d, but no channels\n", 706 device_xname(cz->cz_dev), channel); 707 #endif 708 continue; 709 } 710 711 sc = &cz->cz_ports[channel]; 712 713 if (sc->sc_channel == CZTTY_CHANNEL_DEAD) 714 break; 715 716 tp = sc->sc_tty; 717 718 switch (command) { 719 case C_CM_TXFEMPTY: /* transmit cases */ 720 case C_CM_TXBEMPTY: 721 case C_CM_TXLOWWM: 722 case C_CM_INTBACK: 723 if (!ISSET(tp->t_state, TS_ISOPEN)) { 724 #ifdef CZ_DEBUG 725 printf("%s: tx intr on closed channel %d\n", 726 device_xname(cz->cz_dev), channel); 727 #endif 728 break; 729 } 730 731 if (cztty_transmit(sc, tp)) { 732 /* 733 * Do wakeup stuff here. 734 */ 735 mutex_spin_enter(&tty_lock); /* XXX */ 736 ttwakeup(tp); 737 mutex_spin_exit(&tty_lock); /* XXX */ 738 wakeup(tp); 739 } 740 break; 741 742 case C_CM_RXNNDT: /* receive cases */ 743 case C_CM_RXHIWM: 744 case C_CM_INTBACK2: /* from restart ?? */ 745 #if 0 746 case C_CM_ICHAR: 747 #endif 748 if (!ISSET(tp->t_state, TS_ISOPEN)) { 749 CZTTY_BUF_WRITE(sc, BUFCTL_RX_GET, 750 CZTTY_BUF_READ(sc, BUFCTL_RX_PUT)); 751 break; 752 } 753 754 if (cztty_receive(sc, tp)) { 755 /* 756 * Do wakeup stuff here. 757 */ 758 mutex_spin_enter(&tty_lock); /* XXX */ 759 ttwakeup(tp); 760 mutex_spin_exit(&tty_lock); /* XXX */ 761 wakeup(tp); 762 } 763 break; 764 765 case C_CM_MDCD: 766 if (!ISSET(tp->t_state, TS_ISOPEN)) 767 break; 768 769 (void) (*tp->t_linesw->l_modem)(tp, 770 ISSET(C_RS_DCD, CZTTY_CHAN_READ(sc, 771 CHNCTL_RS_STATUS))); 772 break; 773 774 case C_CM_MDSR: 775 case C_CM_MRI: 776 case C_CM_MCTS: 777 case C_CM_MRTS: 778 break; 779 780 case C_CM_IOCTLW: 781 break; 782 783 case C_CM_PR_ERROR: 784 sc->sc_parity_errors++; 785 goto error_common; 786 787 case C_CM_FR_ERROR: 788 sc->sc_framing_errors++; 789 goto error_common; 790 791 case C_CM_OVR_ERROR: 792 sc->sc_overflows++; 793 error_common: 794 if (sc->sc_errors++ == 0) 795 callout_reset(&sc->sc_diag_ch, 60 * hz, 796 cztty_diag, sc); 797 break; 798 799 case C_CM_RXBRK: 800 if (!ISSET(tp->t_state, TS_ISOPEN)) 801 break; 802 803 /* 804 * A break is a \000 character with TTY_FE error 805 * flags set. So TTY_FE by itself works. 806 */ 807 (*tp->t_linesw->l_rint)(TTY_FE, tp); 808 mutex_spin_enter(&tty_lock); /* XXX */ 809 ttwakeup(tp); 810 mutex_spin_exit(&tty_lock); /* XXX */ 811 wakeup(tp); 812 break; 813 814 default: 815 #ifdef CZ_DEBUG 816 printf("%s: channel %d: Unknown interrupt 0x%x\n", 817 device_xname(cz->cz_dev), sc->sc_channel, command); 818 #endif 819 break; 820 } 821 } 822 823 return (rval); 824 } 825 826 /* 827 * cz_wait_pci_doorbell: 828 * 829 * Wait for the pci doorbell to be clear - wait for pending 830 * activity to drain. 831 */ 832 static int 833 cz_wait_pci_doorbell(struct cz_softc *cz, const char *wstring) 834 { 835 int error; 836 837 while (CZ_PLX_READ(cz, PLX_PCI_LOCAL_DOORBELL)) { 838 error = tsleep(cz, TTIPRI | PCATCH, wstring, max(1, hz/100)); 839 if ((error != 0) && (error != EWOULDBLOCK)) 840 return (error); 841 } 842 return (0); 843 } 844 845 /***************************************************************************** 846 * Cyclades-Z TTY code starts here... 847 *****************************************************************************/ 848 849 #define CZTTYDIALOUT_MASK 0x80000 850 851 #define CZTTY_DIALOUT(dev) (minor((dev)) & CZTTYDIALOUT_MASK) 852 #define CZTTY_CZ(sc) ((sc)->sc_parent) 853 854 #define CZTTY_SOFTC(dev) cztty_getttysoftc(dev) 855 856 static struct cztty_softc * 857 cztty_getttysoftc(dev_t dev) 858 { 859 int i, j, k = 0, u = minor(dev) & ~CZTTYDIALOUT_MASK; 860 struct cz_softc *cz = NULL; 861 862 for (i = 0, j = 0; i < cz_cd.cd_ndevs; i++) { 863 k = j; 864 cz = device_lookup_private(&cz_cd, i); 865 if (cz == NULL) 866 continue; 867 if (cz->cz_ports == NULL) 868 continue; 869 j += cz->cz_nchannels; 870 if (j > u) 871 break; 872 } 873 874 if (i >= cz_cd.cd_ndevs) 875 return (NULL); 876 else 877 return (&cz->cz_ports[u - k]); 878 } 879 880 /* 881 * czttytty: 882 * 883 * Return a pointer to our tty. 884 */ 885 static struct tty * 886 czttytty(dev_t dev) 887 { 888 struct cztty_softc *sc = CZTTY_SOFTC(dev); 889 890 #ifdef DIAGNOSTIC 891 if (sc == NULL) 892 panic("czttytty"); 893 #endif 894 895 return (sc->sc_tty); 896 } 897 898 /* 899 * cztty_shutdown: 900 * 901 * Shut down a port. 902 */ 903 static void 904 cztty_shutdown(struct cztty_softc *sc) 905 { 906 struct cz_softc *cz = CZTTY_CZ(sc); 907 struct tty *tp = sc->sc_tty; 908 int s; 909 910 s = spltty(); 911 912 /* Clear any break condition set with TIOCSBRK. */ 913 cztty_break(sc, 0); 914 915 /* 916 * Hang up if necessary. Wait a bit, so the other side has time to 917 * notice even if we immediately open the port again. 918 */ 919 if (ISSET(tp->t_cflag, HUPCL)) { 920 cztty_modem(sc, 0); 921 (void) tsleep(tp, TTIPRI, ttclos, hz); 922 } 923 924 /* Disable the channel. */ 925 cz_wait_pci_doorbell(cz, "czdis"); 926 CZTTY_CHAN_WRITE(sc, CHNCTL_OP_MODE, C_CH_DISABLE); 927 CZ_FWCTL_WRITE(cz, BRDCTL_HCMD_CHANNEL, sc->sc_channel); 928 CZ_PLX_WRITE(cz, PLX_PCI_LOCAL_DOORBELL, C_CM_IOCTL); 929 930 if ((--cz->cz_nopenchan == 0) && (cz->cz_ih == NULL)) { 931 #ifdef CZ_DEBUG 932 printf("%s: Disabling polling\n", device_xname(cz->cz_dev)); 933 #endif 934 callout_stop(&cz->cz_callout); 935 } 936 937 splx(s); 938 } 939 940 /* 941 * czttyopen: 942 * 943 * Open a Cyclades-Z serial port. 944 */ 945 static int 946 czttyopen(dev_t dev, int flags, int mode, struct lwp *l) 947 { 948 struct cztty_softc *sc = CZTTY_SOFTC(dev); 949 struct cz_softc *cz; 950 struct tty *tp; 951 int s, error; 952 953 if (sc == NULL) 954 return (ENXIO); 955 956 if (sc->sc_channel == CZTTY_CHANNEL_DEAD) 957 return (ENXIO); 958 959 cz = CZTTY_CZ(sc); 960 tp = sc->sc_tty; 961 962 if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp)) 963 return (EBUSY); 964 965 s = spltty(); 966 967 /* 968 * Do the following iff this is a first open. 969 */ 970 if (!ISSET(tp->t_state, TS_ISOPEN) && (tp->t_wopen == 0)) { 971 struct termios t; 972 973 tp->t_dev = dev; 974 975 /* If we're turning things on, enable interrupts */ 976 if ((cz->cz_nopenchan++ == 0) && (cz->cz_ih == NULL)) { 977 #ifdef CZ_DEBUG 978 printf("%s: Enabling polling.\n", 979 device_xname(cz->cz_dev)); 980 #endif 981 callout_reset(&cz->cz_callout, cz_timeout_ticks, 982 cz_poll, cz); 983 } 984 985 /* 986 * Enable the channel. Don't actually ring the 987 * doorbell here; czttyparam() will do it for us. 988 */ 989 cz_wait_pci_doorbell(cz, "czopen"); 990 991 CZTTY_CHAN_WRITE(sc, CHNCTL_OP_MODE, C_CH_ENABLE); 992 993 /* 994 * Initialize the termios status to the defaults. Add in the 995 * sticky bits from TIOCSFLAGS. 996 */ 997 t.c_ispeed = 0; 998 t.c_ospeed = TTYDEF_SPEED; 999 t.c_cflag = TTYDEF_CFLAG; 1000 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 1001 SET(t.c_cflag, CLOCAL); 1002 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 1003 SET(t.c_cflag, CRTSCTS); 1004 1005 /* 1006 * Reset the input and output rings. Do this before 1007 * we call czttyparam(), as that function enables 1008 * the channel. 1009 */ 1010 CZTTY_BUF_WRITE(sc, BUFCTL_RX_GET, 1011 CZTTY_BUF_READ(sc, BUFCTL_RX_PUT)); 1012 CZTTY_BUF_WRITE(sc, BUFCTL_TX_PUT, 1013 CZTTY_BUF_READ(sc, BUFCTL_TX_GET)); 1014 1015 /* Make sure czttyparam() will see changes. */ 1016 tp->t_ospeed = 0; 1017 (void) czttyparam(tp, &t); 1018 tp->t_iflag = TTYDEF_IFLAG; 1019 tp->t_oflag = TTYDEF_OFLAG; 1020 tp->t_lflag = TTYDEF_LFLAG; 1021 ttychars(tp); 1022 ttsetwater(tp); 1023 1024 /* 1025 * Turn on DTR. We must always do this, even if carrier is not 1026 * present, because otherwise we'd have to use TIOCSDTR 1027 * immediately after setting CLOCAL, which applications do not 1028 * expect. We always assert DTR while the device is open 1029 * unless explicitly requested to deassert it. 1030 */ 1031 cztty_modem(sc, 1); 1032 } 1033 1034 splx(s); 1035 1036 error = ttyopen(tp, CZTTY_DIALOUT(dev), ISSET(flags, O_NONBLOCK)); 1037 if (error) 1038 goto bad; 1039 1040 error = (*tp->t_linesw->l_open)(dev, tp); 1041 if (error) 1042 goto bad; 1043 1044 return (0); 1045 1046 bad: 1047 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 1048 /* 1049 * We failed to open the device, and nobody else had it opened. 1050 * Clean up the state as appropriate. 1051 */ 1052 cztty_shutdown(sc); 1053 } 1054 1055 return (error); 1056 } 1057 1058 /* 1059 * czttyclose: 1060 * 1061 * Close a Cyclades-Z serial port. 1062 */ 1063 static int 1064 czttyclose(dev_t dev, int flags, int mode, struct lwp *l) 1065 { 1066 struct cztty_softc *sc = CZTTY_SOFTC(dev); 1067 struct tty *tp = sc->sc_tty; 1068 1069 /* XXX This is for cons.c. */ 1070 if (!ISSET(tp->t_state, TS_ISOPEN)) 1071 return (0); 1072 1073 (*tp->t_linesw->l_close)(tp, flags); 1074 ttyclose(tp); 1075 1076 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 1077 /* 1078 * Although we got a last close, the device may still be in 1079 * use; e.g. if this was the dialout node, and there are still 1080 * processes waiting for carrier on the non-dialout node. 1081 */ 1082 cztty_shutdown(sc); 1083 } 1084 1085 return (0); 1086 } 1087 1088 /* 1089 * czttyread: 1090 * 1091 * Read from a Cyclades-Z serial port. 1092 */ 1093 static int 1094 czttyread(dev_t dev, struct uio *uio, int flags) 1095 { 1096 struct cztty_softc *sc = CZTTY_SOFTC(dev); 1097 struct tty *tp = sc->sc_tty; 1098 1099 return ((*tp->t_linesw->l_read)(tp, uio, flags)); 1100 } 1101 1102 /* 1103 * czttywrite: 1104 * 1105 * Write to a Cyclades-Z serial port. 1106 */ 1107 static int 1108 czttywrite(dev_t dev, struct uio *uio, int flags) 1109 { 1110 struct cztty_softc *sc = CZTTY_SOFTC(dev); 1111 struct tty *tp = sc->sc_tty; 1112 1113 return ((*tp->t_linesw->l_write)(tp, uio, flags)); 1114 } 1115 1116 /* 1117 * czttypoll: 1118 * 1119 * Poll a Cyclades-Z serial port. 1120 */ 1121 static int 1122 czttypoll(dev_t dev, int events, struct lwp *l) 1123 { 1124 struct cztty_softc *sc = CZTTY_SOFTC(dev); 1125 struct tty *tp = sc->sc_tty; 1126 1127 return ((*tp->t_linesw->l_poll)(tp, events, l)); 1128 } 1129 1130 /* 1131 * czttyioctl: 1132 * 1133 * Perform a control operation on a Cyclades-Z serial port. 1134 */ 1135 static int 1136 czttyioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l) 1137 { 1138 struct cztty_softc *sc = CZTTY_SOFTC(dev); 1139 struct tty *tp = sc->sc_tty; 1140 int s, error; 1141 1142 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l); 1143 if (error != EPASSTHROUGH) 1144 return (error); 1145 1146 error = ttioctl(tp, cmd, data, flag, l); 1147 if (error != EPASSTHROUGH) 1148 return (error); 1149 1150 error = 0; 1151 1152 s = spltty(); 1153 1154 switch (cmd) { 1155 case TIOCSBRK: 1156 cztty_break(sc, 1); 1157 break; 1158 1159 case TIOCCBRK: 1160 cztty_break(sc, 0); 1161 break; 1162 1163 case TIOCGFLAGS: 1164 *(int *)data = sc->sc_swflags; 1165 break; 1166 1167 case TIOCSFLAGS: 1168 error = kauth_authorize_device_tty(l->l_cred, 1169 KAUTH_DEVICE_TTY_PRIVSET, tp); 1170 if (error) 1171 break; 1172 sc->sc_swflags = *(int *)data; 1173 break; 1174 1175 case TIOCSDTR: 1176 cztty_modem(sc, 1); 1177 break; 1178 1179 case TIOCCDTR: 1180 cztty_modem(sc, 0); 1181 break; 1182 1183 case TIOCMSET: 1184 case TIOCMBIS: 1185 case TIOCMBIC: 1186 tiocm_to_cztty(sc, cmd, *(int *)data); 1187 break; 1188 1189 case TIOCMGET: 1190 *(int *)data = cztty_to_tiocm(sc); 1191 break; 1192 1193 default: 1194 error = EPASSTHROUGH; 1195 break; 1196 } 1197 1198 splx(s); 1199 1200 return (error); 1201 } 1202 1203 /* 1204 * cztty_break: 1205 * 1206 * Set or clear BREAK on a port. 1207 */ 1208 static void 1209 cztty_break(struct cztty_softc *sc, int onoff) 1210 { 1211 struct cz_softc *cz = CZTTY_CZ(sc); 1212 1213 cz_wait_pci_doorbell(cz, "czbreak"); 1214 1215 CZ_FWCTL_WRITE(cz, BRDCTL_HCMD_CHANNEL, sc->sc_channel); 1216 CZ_PLX_WRITE(cz, PLX_PCI_LOCAL_DOORBELL, 1217 onoff ? C_CM_SET_BREAK : C_CM_CLR_BREAK); 1218 } 1219 1220 /* 1221 * cztty_modem: 1222 * 1223 * Set or clear DTR on a port. 1224 */ 1225 static void 1226 cztty_modem(struct cztty_softc *sc, int onoff) 1227 { 1228 struct cz_softc *cz = CZTTY_CZ(sc); 1229 1230 if (sc->sc_rs_control_dtr == 0) 1231 return; 1232 1233 cz_wait_pci_doorbell(cz, "czmod"); 1234 1235 if (onoff) 1236 sc->sc_chanctl_rs_control |= sc->sc_rs_control_dtr; 1237 else 1238 sc->sc_chanctl_rs_control &= ~sc->sc_rs_control_dtr; 1239 CZTTY_CHAN_WRITE(sc, CHNCTL_RS_CONTROL, sc->sc_chanctl_rs_control); 1240 1241 CZ_FWCTL_WRITE(cz, BRDCTL_HCMD_CHANNEL, sc->sc_channel); 1242 CZ_PLX_WRITE(cz, PLX_PCI_LOCAL_DOORBELL, C_CM_IOCTLM); 1243 } 1244 1245 /* 1246 * tiocm_to_cztty: 1247 * 1248 * Process TIOCM* ioctls. 1249 */ 1250 static void 1251 tiocm_to_cztty(struct cztty_softc *sc, u_long how, int ttybits) 1252 { 1253 struct cz_softc *cz = CZTTY_CZ(sc); 1254 u_int32_t czttybits; 1255 1256 czttybits = 0; 1257 if (ISSET(ttybits, TIOCM_DTR)) 1258 SET(czttybits, C_RS_DTR); 1259 if (ISSET(ttybits, TIOCM_RTS)) 1260 SET(czttybits, C_RS_RTS); 1261 1262 cz_wait_pci_doorbell(cz, "cztiocm"); 1263 1264 switch (how) { 1265 case TIOCMBIC: 1266 CLR(sc->sc_chanctl_rs_control, czttybits); 1267 break; 1268 1269 case TIOCMBIS: 1270 SET(sc->sc_chanctl_rs_control, czttybits); 1271 break; 1272 1273 case TIOCMSET: 1274 CLR(sc->sc_chanctl_rs_control, C_RS_DTR | C_RS_RTS); 1275 SET(sc->sc_chanctl_rs_control, czttybits); 1276 break; 1277 } 1278 1279 CZTTY_CHAN_WRITE(sc, CHNCTL_RS_CONTROL, sc->sc_chanctl_rs_control); 1280 1281 CZ_FWCTL_WRITE(cz, BRDCTL_HCMD_CHANNEL, sc->sc_channel); 1282 CZ_PLX_WRITE(cz, PLX_PCI_LOCAL_DOORBELL, C_CM_IOCTLM); 1283 } 1284 1285 /* 1286 * cztty_to_tiocm: 1287 * 1288 * Process the TIOCMGET ioctl. 1289 */ 1290 static int 1291 cztty_to_tiocm(struct cztty_softc *sc) 1292 { 1293 struct cz_softc *cz = CZTTY_CZ(sc); 1294 u_int32_t rs_status, op_mode; 1295 int ttybits = 0; 1296 1297 cz_wait_pci_doorbell(cz, "cztty"); 1298 1299 rs_status = CZTTY_CHAN_READ(sc, CHNCTL_RS_STATUS); 1300 op_mode = CZTTY_CHAN_READ(sc, CHNCTL_OP_MODE); 1301 1302 if (ISSET(rs_status, C_RS_RTS)) 1303 SET(ttybits, TIOCM_RTS); 1304 if (ISSET(rs_status, C_RS_CTS)) 1305 SET(ttybits, TIOCM_CTS); 1306 if (ISSET(rs_status, C_RS_DCD)) 1307 SET(ttybits, TIOCM_CAR); 1308 if (ISSET(rs_status, C_RS_DTR)) 1309 SET(ttybits, TIOCM_DTR); 1310 if (ISSET(rs_status, C_RS_RI)) 1311 SET(ttybits, TIOCM_RNG); 1312 if (ISSET(rs_status, C_RS_DSR)) 1313 SET(ttybits, TIOCM_DSR); 1314 1315 if (ISSET(op_mode, C_CH_ENABLE)) 1316 SET(ttybits, TIOCM_LE); 1317 1318 return (ttybits); 1319 } 1320 1321 /* 1322 * czttyparam: 1323 * 1324 * Set Cyclades-Z serial port parameters from termios. 1325 * 1326 * XXX Should just copy the whole termios after making 1327 * XXX sure all the changes could be done. 1328 */ 1329 static int 1330 czttyparam(struct tty *tp, struct termios *t) 1331 { 1332 struct cztty_softc *sc = CZTTY_SOFTC(tp->t_dev); 1333 struct cz_softc *cz = CZTTY_CZ(sc); 1334 u_int32_t rs_status; 1335 int ospeed, cflag; 1336 1337 ospeed = t->c_ospeed; 1338 cflag = t->c_cflag; 1339 1340 /* Check requested parameters. */ 1341 if (ospeed < 0) 1342 return (EINVAL); 1343 if (t->c_ispeed && t->c_ispeed != ospeed) 1344 return (EINVAL); 1345 1346 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR)) { 1347 SET(cflag, CLOCAL); 1348 CLR(cflag, HUPCL); 1349 } 1350 1351 /* 1352 * If there were no changes, don't do anything. This avoids dropping 1353 * input and improves performance when all we did was frob things like 1354 * VMIN and VTIME. 1355 */ 1356 if (tp->t_ospeed == ospeed && 1357 tp->t_cflag == cflag) 1358 return (0); 1359 1360 /* Data bits. */ 1361 sc->sc_chanctl_comm_data_l = 0; 1362 switch (t->c_cflag & CSIZE) { 1363 case CS5: 1364 sc->sc_chanctl_comm_data_l |= C_DL_CS5; 1365 break; 1366 1367 case CS6: 1368 sc->sc_chanctl_comm_data_l |= C_DL_CS6; 1369 break; 1370 1371 case CS7: 1372 sc->sc_chanctl_comm_data_l |= C_DL_CS7; 1373 break; 1374 1375 case CS8: 1376 sc->sc_chanctl_comm_data_l |= C_DL_CS8; 1377 break; 1378 } 1379 1380 /* Stop bits. */ 1381 if (t->c_cflag & CSTOPB) { 1382 if ((sc->sc_chanctl_comm_data_l & C_DL_CS) == C_DL_CS5) 1383 sc->sc_chanctl_comm_data_l |= C_DL_15STOP; 1384 else 1385 sc->sc_chanctl_comm_data_l |= C_DL_2STOP; 1386 } else 1387 sc->sc_chanctl_comm_data_l |= C_DL_1STOP; 1388 1389 /* Parity. */ 1390 if (t->c_cflag & PARENB) { 1391 if (t->c_cflag & PARODD) 1392 sc->sc_chanctl_comm_parity = C_PR_ODD; 1393 else 1394 sc->sc_chanctl_comm_parity = C_PR_EVEN; 1395 } else 1396 sc->sc_chanctl_comm_parity = C_PR_NONE; 1397 1398 /* 1399 * Initialize flow control pins depending on the current flow control 1400 * mode. 1401 */ 1402 if (ISSET(t->c_cflag, CRTSCTS)) { 1403 sc->sc_rs_control_dtr = C_RS_DTR; 1404 sc->sc_chanctl_hw_flow = C_RS_CTS | C_RS_RTS; 1405 } else if (ISSET(t->c_cflag, MDMBUF)) { 1406 sc->sc_rs_control_dtr = 0; 1407 sc->sc_chanctl_hw_flow = C_RS_DCD | C_RS_DTR; 1408 } else { 1409 /* 1410 * If no flow control, then always set RTS. This will make 1411 * the other side happy if it mistakenly thinks we're doing 1412 * RTS/CTS flow control. 1413 */ 1414 sc->sc_rs_control_dtr = C_RS_DTR | C_RS_RTS; 1415 sc->sc_chanctl_hw_flow = 0; 1416 if (ISSET(sc->sc_chanctl_rs_control, C_RS_DTR)) 1417 SET(sc->sc_chanctl_rs_control, C_RS_RTS); 1418 else 1419 CLR(sc->sc_chanctl_rs_control, C_RS_RTS); 1420 } 1421 1422 /* Baud rate. */ 1423 sc->sc_chanctl_comm_baud = ospeed; 1424 1425 /* Copy to tty. */ 1426 tp->t_ispeed = 0; 1427 tp->t_ospeed = t->c_ospeed; 1428 tp->t_cflag = t->c_cflag; 1429 1430 /* 1431 * Now load the channel control structure. 1432 */ 1433 1434 cz_wait_pci_doorbell(cz, "czparam"); 1435 1436 CZTTY_CHAN_WRITE(sc, CHNCTL_COMM_BAUD, sc->sc_chanctl_comm_baud); 1437 CZTTY_CHAN_WRITE(sc, CHNCTL_COMM_DATA_L, sc->sc_chanctl_comm_data_l); 1438 CZTTY_CHAN_WRITE(sc, CHNCTL_COMM_PARITY, sc->sc_chanctl_comm_parity); 1439 CZTTY_CHAN_WRITE(sc, CHNCTL_HW_FLOW, sc->sc_chanctl_hw_flow); 1440 CZTTY_CHAN_WRITE(sc, CHNCTL_RS_CONTROL, sc->sc_chanctl_rs_control); 1441 1442 CZ_FWCTL_WRITE(cz, BRDCTL_HCMD_CHANNEL, sc->sc_channel); 1443 CZ_PLX_WRITE(cz, PLX_PCI_LOCAL_DOORBELL, C_CM_IOCTLW); 1444 1445 cz_wait_pci_doorbell(cz, "czparam"); 1446 1447 CZ_FWCTL_WRITE(cz, BRDCTL_HCMD_CHANNEL, sc->sc_channel); 1448 CZ_PLX_WRITE(cz, PLX_PCI_LOCAL_DOORBELL, C_CM_IOCTLM); 1449 1450 cz_wait_pci_doorbell(cz, "czparam"); 1451 1452 /* 1453 * Update the tty layer's idea of the carrier bit, in case we changed 1454 * CLOCAL. We don't hang up here; we only do that by explicit 1455 * request. 1456 */ 1457 rs_status = CZTTY_CHAN_READ(sc, CHNCTL_RS_STATUS); 1458 (void) (*tp->t_linesw->l_modem)(tp, ISSET(rs_status, C_RS_DCD)); 1459 1460 return (0); 1461 } 1462 1463 /* 1464 * czttystart: 1465 * 1466 * Start or restart transmission. 1467 */ 1468 static void 1469 czttystart(struct tty *tp) 1470 { 1471 struct cztty_softc *sc = CZTTY_SOFTC(tp->t_dev); 1472 int s; 1473 1474 s = spltty(); 1475 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1476 goto out; 1477 if (!ttypull(tp)) 1478 goto out; 1479 cztty_transmit(sc, tp); 1480 out: 1481 splx(s); 1482 } 1483 1484 /* 1485 * czttystop: 1486 * 1487 * Stop output, e.g., for ^S or output flush. 1488 */ 1489 static void 1490 czttystop(struct tty *tp, int flag) 1491 { 1492 1493 /* 1494 * XXX We don't do anything here, yet. Mostly, I don't know 1495 * XXX exactly how this should be implemented on this device. 1496 * XXX We've given a big chunk of data to the MIPS already, 1497 * XXX and I don't know how we request the MIPS to stop sending 1498 * XXX the data. So, punt for now. --thorpej 1499 */ 1500 } 1501 1502 /* 1503 * cztty_diag: 1504 * 1505 * Issue a scheduled diagnostic message. 1506 */ 1507 static void 1508 cztty_diag(void *arg) 1509 { 1510 struct cztty_softc *sc = arg; 1511 struct cz_softc *cz = CZTTY_CZ(sc); 1512 u_int overflows, parity_errors, framing_errors; 1513 int s; 1514 1515 s = spltty(); 1516 1517 overflows = sc->sc_overflows; 1518 sc->sc_overflows = 0; 1519 1520 parity_errors = sc->sc_parity_errors; 1521 sc->sc_parity_errors = 0; 1522 1523 framing_errors = sc->sc_framing_errors; 1524 sc->sc_framing_errors = 0; 1525 1526 sc->sc_errors = 0; 1527 1528 splx(s); 1529 1530 log(LOG_WARNING, 1531 "%s: channel %d: %u overflow%s, %u parity, %u framing error%s\n", 1532 device_xname(cz->cz_dev), sc->sc_channel, 1533 overflows, overflows == 1 ? "" : "s", 1534 parity_errors, 1535 framing_errors, framing_errors == 1 ? "" : "s"); 1536 } 1537 1538 const struct cdevsw cz_cdevsw = { 1539 .d_open = czttyopen, 1540 .d_close = czttyclose, 1541 .d_read = czttyread, 1542 .d_write = czttywrite, 1543 .d_ioctl = czttyioctl, 1544 .d_stop = czttystop, 1545 .d_tty = czttytty, 1546 .d_poll = czttypoll, 1547 .d_mmap = nommap, 1548 .d_kqfilter = ttykqfilter, 1549 .d_flag = D_TTY 1550 }; 1551 1552 /* 1553 * tx and rx ring buffer size macros: 1554 * 1555 * The transmitter and receiver both use ring buffers. For each one, there 1556 * is a get (consumer) and a put (producer) offset. The get value is the 1557 * next byte to be read from the ring, and the put is the next one to be 1558 * put into the ring. get == put means the ring is empty. 1559 * 1560 * For each ring, the firmware controls one of (get, put) and this driver 1561 * controls the other. For transmission, this driver updates put to point 1562 * past the valid data, and the firmware moves get as bytes are sent. Likewise 1563 * for receive, the driver controls put, and this driver controls get. 1564 */ 1565 #define TX_MOVEABLE(g, p, s) (((g) > (p)) ? ((g) - (p) - 1) : ((s) - (p))) 1566 #define RX_MOVEABLE(g, p, s) (((g) > (p)) ? ((s) - (g)) : ((p) - (g))) 1567 1568 /* 1569 * cztty_transmit() 1570 * 1571 * Look at the tty for this port and start sending. 1572 */ 1573 static int 1574 cztty_transmit(struct cztty_softc *sc, struct tty *tp) 1575 { 1576 struct cz_softc *cz = CZTTY_CZ(sc); 1577 u_int move, get, put, size, address; 1578 #ifdef HOSTRAMCODE 1579 int error, done = 0; 1580 #else 1581 int done = 0; 1582 #endif 1583 1584 size = CZTTY_BUF_READ(sc, BUFCTL_TX_BUFSIZE); 1585 get = CZTTY_BUF_READ(sc, BUFCTL_TX_GET); 1586 put = CZTTY_BUF_READ(sc, BUFCTL_TX_PUT); 1587 address = CZTTY_BUF_READ(sc, BUFCTL_TX_BUFADDR); 1588 1589 while ((tp->t_outq.c_cc > 0) && ((move = TX_MOVEABLE(get, put, size)))){ 1590 #ifdef HOSTRAMCODE 1591 if (0) { 1592 move = min(tp->t_outq.c_cc, move); 1593 error = q_to_b(&tp->t_outq, 0, move); 1594 if (error != move) { 1595 printf("%s: channel %d: error moving to " 1596 "transmit buf\n", device_xname(cz->cz_dev), 1597 sc->sc_channel); 1598 move = error; 1599 } 1600 } else { 1601 #endif 1602 move = min(ndqb(&tp->t_outq, 0), move); 1603 bus_space_write_region_1(cz->cz_win_st, cz->cz_win_sh, 1604 address + put, tp->t_outq.c_cf, move); 1605 ndflush(&tp->t_outq, move); 1606 #ifdef HOSTRAMCODE 1607 } 1608 #endif 1609 1610 put = ((put + move) % size); 1611 done = 1; 1612 } 1613 if (done) { 1614 CZTTY_BUF_WRITE(sc, BUFCTL_TX_PUT, put); 1615 } 1616 return (done); 1617 } 1618 1619 static int 1620 cztty_receive(struct cztty_softc *sc, struct tty *tp) 1621 { 1622 struct cz_softc *cz = CZTTY_CZ(sc); 1623 u_int get, put, size, address; 1624 int done = 0, ch; 1625 1626 size = CZTTY_BUF_READ(sc, BUFCTL_RX_BUFSIZE); 1627 get = CZTTY_BUF_READ(sc, BUFCTL_RX_GET); 1628 put = CZTTY_BUF_READ(sc, BUFCTL_RX_PUT); 1629 address = CZTTY_BUF_READ(sc, BUFCTL_RX_BUFADDR); 1630 1631 while ((get != put) && ((tp->t_canq.c_cc + tp->t_rawq.c_cc) < tp->t_hiwat)) { 1632 #ifdef HOSTRAMCODE 1633 if (hostram) { 1634 ch = ((char *)fifoaddr)[get]; 1635 } else { 1636 #endif 1637 ch = bus_space_read_1(cz->cz_win_st, cz->cz_win_sh, 1638 address + get); 1639 #ifdef HOSTRAMCODE 1640 } 1641 #endif 1642 (*tp->t_linesw->l_rint)(ch, tp); 1643 get = (get + 1) % size; 1644 done = 1; 1645 } 1646 if (done) { 1647 CZTTY_BUF_WRITE(sc, BUFCTL_RX_GET, get); 1648 } 1649 return (done); 1650 } 1651